1 \fASxxxx Assembler V01.70 + NoICE + SDCC mods Feb-1999 (Intel 8051), page 1.
236 7 C$_ser.c$102$1$1 = 0097 GR
237 7 C$_ser.c$118$1$1 = 00CF GR
238 7 C$_ser.c$135$1$1 = 0104 GR
239 7 C$_ser.c$143$1$1 = 0154 GR
240 7 C$_ser.c$155$1$1 = 0176 GR
241 7 C$_ser.c$79$1$1 = 0033 GR
257 4 F_ser$ser_txBusy$0$0 = 0000 GR
302 G$RCAP2H$0$0 = 00CB G
303 G$RCAP2L$0$0 = 00CA G
319 G$T2CON_0$0$0 = 00C8 G
320 G$T2CON_1$0$0 = 00C9 G
321 G$T2CON_2$0$0 = 00CA G
322 G$T2CON_3$0$0 = 00CB G
323 G$T2CON_4$0$0 = 00CC G
324 G$T2CON_5$0$0 = 00CD G
325 G$T2CON_6$0$0 = 00CE G
326 G$T2CON_7$0$0 = 00CF G
341 7 G$ser_charAvail$0$0 = 0155 GR
342 7 G$ser_getc$0$0 = 00D0 GR
343 7 G$ser_init$0$0 = 0000 GR
344 7 G$ser_interrupt_handler$0$0 = 0034 GR
345 7 G$ser_printString$0$0 = 0105 GR
346 7 G$ser_putc$0$0 = 0098 GR
347 5 G$ser_rxBuffer$0$0 = 0104 GR
348 5 G$ser_rxIndexIn$0$0 = 0002 GR
349 5 G$ser_rxIndexOut$0$0 = 0003 GR
350 5 G$ser_txBuffer$0$0 = 0004 GR
351 5 G$ser_txIndexIn$0$0 = 0000 GR
352 5 G$ser_txIndexOut$0$0 = 0001 GR
486 7 XG$ser_charAvail$0$0 = 0176 GR
487 7 XG$ser_getc$0$0 = 0104 GR
488 7 XG$ser_init$0$0 = 0033 GR
489 7 XG$ser_interrupt_handler$0$0 = 0097 GR
490 7 XG$ser_printString$0$0 = 0154 GR
491 7 XG$ser_putc$0$0 = 00CF GR
576 7 _ser_charAvail 0155 GR
577 5 _ser_charAvail_ret_1_1 0209 R
579 5 _ser_getc_tmp_1_1 0205 R
581 7 _ser_interrupt_handler 0034 GR
582 7 _ser_printString 0105 GR
583 5 _ser_printString_String_1_1 0206 R
585 5 _ser_putc_c_1_1 0204 R
586 5 _ser_rxBuffer 0104 GR
587 5 _ser_rxIndexIn 0002 GR
588 5 _ser_rxIndexOut 0003 GR
589 5 _ser_txBuffer 0004 GR
591 5 _ser_txIndexIn 0000 GR
592 5 _ser_txIndexOut 0001 GR
770 \fASxxxx Assembler V01.70 + NoICE + SDCC mods Feb-1999 (Intel 8051), page 2.
774 0 _CODE size 0 flags 0
775 1 DSEG size 0 flags 0
776 2 OSEG size 0 flags 4
777 3 ISEG size 0 flags 0
778 4 BSEG size 1 flags 80
779 5 XSEG size 20A flags 40
780 6 GSINIT size 0 flags 20
781 7 CSEG size 177 flags 20