1 1 ;--------------------------------------------------------
2 2 ; File Created by SDCC : FreeWare ANSI-C Compiler
3 3 ; Version 2.1.9Ga Sun Jan 16 17:31:23 2000
5 5 ;--------------------------------------------------------
7 7 ;--------------------------------------------------------
8 8 ; publics variables in this module
9 9 ;--------------------------------------------------------
10 10 .globl __divsint_PARM_2
12 12 ;--------------------------------------------------------
13 13 ; special function registers
14 14 ;--------------------------------------------------------
15 15 ;--------------------------------------------------------
16 16 ; special function bits
17 17 ;--------------------------------------------------------
18 18 ;--------------------------------------------------------
19 19 ; internal ram data
20 20 ;--------------------------------------------------------
22 22 ;--------------------------------------------------------
23 23 ; overlayable items in internal ram
24 24 ;--------------------------------------------------------
25 25 .area OSEG (OVR,DATA)
26 26 ;--------------------------------------------------------
27 27 ; indirectly addressable internal ram data
28 28 ;--------------------------------------------------------
30 30 ;--------------------------------------------------------
32 32 ;--------------------------------------------------------
34 34 ;--------------------------------------------------------
35 35 ; external ram data
36 36 ;--------------------------------------------------------
38 0000 38 __divsint_PARM_2:
40 0002 40 __divsint_a_1_1:
42 42 ;--------------------------------------------------------
43 43 ; global & static initialisations
44 44 ;--------------------------------------------------------
45 45 .area GSINIT (CODE)
46 46 ;--------------------------------------------------------
48 48 ;--------------------------------------------------------
50 0000 50 G$_divsint$0$0 ==.
52 52 ; -----------------------------------------
53 53 ; function _divsint
54 54 ; -----------------------------------------
66 0002 C0 83 66 push dph
67 0004 C0 82 67 push dpl
68 0006 90s00r02 68 mov dptr,#__divsint_a_1_1
70 000B F0 70 movx @dptr,a
73 000F F0 73 movx @dptr,a
75 0010 90s00r02 75 mov dptr,#__divsint_a_1_1
76 0013 E0 76 movx a,@dptr
79 0016 E0 79 movx a,@dptr
80 80 ; Peephole 105 removed redundant mov
82 82 ; Peephole 111 removed ljmp by inverse jump logic
83 0018 30 E7 09 83 jnb acc.7,00106$
92 92 ; Peephole 132 changed ljmp to sjmp
93 0022 80 04 93 sjmp 00107$
95 0024 8A 04 95 mov ar4,r2
96 0026 8B 05 96 mov ar5,r3
98 0028 8C 02 98 mov ar2,r4
99 002A 8D 03 99 mov ar3,r5
101 002C 90s00r00 101 mov dptr,#__divsint_PARM_2
102 002F E0 102 movx a,@dptr
105 0032 E0 105 movx a,@dptr
106 106 ; Peephole 105 removed redundant mov
111 111 ; Peephole 105 removed redundant mov
113 113 ; Peephole 110 removed ljmp by inverse jump logic
114 0038 60 09 114 jz 00108$
118 003C 9C 118 subb a,r4
121 003F 9D 121 subb a,r5
123 123 ; Peephole 132 changed ljmp to sjmp
124 0041 80 04 124 sjmp 00109$
126 0043 8C 07 126 mov ar7,r4
127 0045 8D 00 127 mov ar0,r5
129 0047 90s00r00 129 mov dptr,#__divuint_PARM_2
131 004B F0 131 movx @dptr,a
134 004E F0 134 movx @dptr,a
135 004F C0 06 135 push ar6
136 0051 8A 82 136 mov dpl,r2
137 0053 8B 83 137 mov dph,r3
138 0055 12s00r00 138 lcall __divuint
139 0058 AA 82 139 mov r2,dpl
140 005A AB 83 140 mov r3,dph
141 005C D0 06 141 pop ar6
143 005E 90s00r02 143 mov dptr,#__divsint_a_1_1
144 0061 E0 144 movx a,@dptr
147 0064 E0 147 movx a,@dptr
148 148 ; Peephole 105 removed redundant mov
155 006B 65 04 155 xrl a,ar4
156 156 ; Peephole 110 removed ljmp by inverse jump logic
157 006D 60 0D 157 jz 00102$
162 0071 9A 162 subb a,r2
165 0074 9B 165 subb a,r3
167 0076 8C 82 167 mov dpl,r4
168 0078 8E 83 168 mov dph,r6
169 169 ; Peephole 132 changed ljmp to sjmp
170 007A 80 04 170 sjmp 00104$
173 007C 8A 82 173 mov dpl,r2
174 007E 8B 83 174 mov dph,r3
176 0080 D2 AF 176 setb ea
177 0082 177 C$_divsint.c$43$1$1 ==.
178 0082 178 XG$_divsint$0$0 ==.
180 180 .area CSEG (CODE)