git.gag.com Git - fw/sdcc/blob - device/lib/_divsint.lst

   1                               1 ;--------------------------------------------------------
   2                               2 ; File Created by SDCC : FreeWare ANSI-C Compiler
   3                               3 ; Version 2.1.9Ga Sun Jan 16 17:31:23 2000
   4                               4
   5                               5 ;--------------------------------------------------------
   6                               6         .module _divsint
   7                               7 ;--------------------------------------------------------
   8                               8 ; publics variables in this module
   9                               9 ;--------------------------------------------------------
  10                              10         .globl __divsint_PARM_2
  11                              11         .globl __divsint
  12                              12 ;--------------------------------------------------------
  13                              13 ; special function registers
  14                              14 ;--------------------------------------------------------
  15                              15 ;--------------------------------------------------------
  16                              16 ; special function bits
  17                              17 ;--------------------------------------------------------
  18                              18 ;--------------------------------------------------------
  19                              19 ; internal ram data
  20                              20 ;--------------------------------------------------------
  21                              21         .area   DSEG    (DATA)
  22                              22 ;--------------------------------------------------------
  23                              23 ; overlayable items in internal ram
  24                              24 ;--------------------------------------------------------
  25                              25         .area   OSEG    (OVR,DATA)
  26                              26 ;--------------------------------------------------------
  27                              27 ; indirectly addressable internal ram data
  28                              28 ;--------------------------------------------------------
  29                              29         .area   ISEG    (DATA)
  30                              30 ;--------------------------------------------------------
  31                              31 ; bit data
  32                              32 ;--------------------------------------------------------
  33                              33         .area   BSEG    (BIT)
  34                              34 ;--------------------------------------------------------
  35                              35 ; external ram data
  36                              36 ;--------------------------------------------------------
  37                              37         .area   XSEG    (XDATA)
  38    0000                      38 __divsint_PARM_2:
  39    0000                      39         .ds     0x0002
  40    0002                      40 __divsint_a_1_1:
  41    0002                      41         .ds     0x0002
  42                              42 ;--------------------------------------------------------
  43                              43 ; global & static initialisations
  44                              44 ;--------------------------------------------------------
  45                              45         .area GSINIT (CODE)
  46                              46 ;--------------------------------------------------------
  47                              47 ; code
  48                              48 ;--------------------------------------------------------
  49                              49         .area CSEG (CODE)
  50                     0000     50         G$_divsint$0$0 ==.
  51                              51 ;       _divsint.c 26
  52                              52 ;       -----------------------------------------
  53                              53 ;        function _divsint
  54                              54 ;       -----------------------------------------
  55    0000                      55 __divsint:
  56    0000 C2 AF                56         clr     ea
  57                     0002     57         ar2 = 0x02
  58                     0003     58         ar3 = 0x03
  59                     0004     59         ar4 = 0x04
  60                     0005     60         ar5 = 0x05
  61                     0006     61         ar6 = 0x06
  62                     0007     62         ar7 = 0x07
  63                     0000     63         ar0 = 0x00
  64                     0001     64         ar1 = 0x01
  65                              65 ;       _divsint.c 0
  66    0002 C0 83                66         push    dph
  67    0004 C0 82                67         push    dpl
  68    0006 90s00r02             68         mov     dptr,#__divsint_a_1_1
  69    0009 D0 E0                69         pop     acc
  70    000B F0                   70         movx    @dptr,a
  71    000C D0 E0                71         pop     acc
  72    000E A3                   72         inc     dptr
  73    000F F0                   73         movx    @dptr,a
  74                              74 ;       _divsint.c 33
  75    0010 90s00r02             75         mov     dptr,#__divsint_a_1_1
  76    0013 E0                   76         movx    a,@dptr
  77    0014 FA                   77         mov     r2,a
  78    0015 A3                   78         inc     dptr
  79    0016 E0                   79         movx    a,@dptr
  80                              80 ; Peephole 105   removed redundant mov
  81    0017 FB                   81         mov  r3,a
  82                              82 ; Peephole 111   removed ljmp by inverse jump logic
  83    0018 30 E7 09             83         jnb  acc.7,00106$
  84    001B                      84 00113$:
  85    001B C3                   85         clr     c
  86    001C E4                   86         clr     a
  87    001D 9A                   87         subb    a,r2
  88    001E FC                   88         mov     r4,a
  89    001F E4                   89         clr     a
  90    0020 9B                   90         subb    a,r3
  91    0021 FD                   91         mov     r5,a
  92                              92 ; Peephole 132   changed ljmp to sjmp
  93    0022 80 04                93         sjmp 00107$
  94    0024                      94 00106$:
  95    0024 8A 04                95         mov     ar4,r2
  96    0026 8B 05                96         mov     ar5,r3
  97    0028                      97 00107$:
  98    0028 8C 02                98         mov     ar2,r4
  99    002A 8D 03                99         mov     ar3,r5
 100                             100 ;       _divsint.c 34
 101    002C 90s00r00            101         mov     dptr,#__divsint_PARM_2
 102    002F E0                  102         movx    a,@dptr
 103    0030 FC                  103         mov     r4,a
 104    0031 A3                  104         inc     dptr
 105    0032 E0                  105         movx    a,@dptr
 106                             106 ; Peephole 105   removed redundant mov
 107    0033 FD                  107         mov  r5,a
 108    0034 33                  108         rlc     a
 109    0035 E4                  109         clr     a
 110    0036 33                  110         rlc     a
 111                             111 ; Peephole 105   removed redundant mov
 112    0037 FE                  112         mov  r6,a
 113                             113 ; Peephole 110   removed ljmp by inverse jump logic
 114    0038 60 09               114         jz  00108$
 115    003A                     115 00114$:
 116    003A C3                  116         clr     c
 117    003B E4                  117         clr     a
 118    003C 9C                  118         subb    a,r4
 119    003D FF                  119         mov     r7,a
 120    003E E4                  120         clr     a
 121    003F 9D                  121         subb    a,r5
 122    0040 F8                  122         mov     r0,a
 123                             123 ; Peephole 132   changed ljmp to sjmp
 124    0041 80 04               124         sjmp 00109$
 125    0043                     125 00108$:
 126    0043 8C 07               126         mov     ar7,r4
 127    0045 8D 00               127         mov     ar0,r5
 128    0047                     128 00109$:
 129    0047 90s00r00            129         mov     dptr,#__divuint_PARM_2
 130    004A EF                  130         mov     a,r7
 131    004B F0                  131         movx    @dptr,a
 132    004C A3                  132         inc     dptr
 133    004D E8                  133         mov     a,r0
 134    004E F0                  134         movx    @dptr,a
 135    004F C0 06               135         push    ar6
 136    0051 8A 82               136         mov     dpl,r2
 137    0053 8B 83               137         mov     dph,r3
 138    0055 12s00r00            138         lcall   __divuint
 139    0058 AA 82               139         mov     r2,dpl
 140    005A AB 83               140         mov     r3,dph
 141    005C D0 06               141         pop     ar6
 142                             142 ;       _divsint.c 35
 143    005E 90s00r02            143         mov     dptr,#__divsint_a_1_1
 144    0061 E0                  144         movx    a,@dptr
 145    0062 FC                  145         mov     r4,a
 146    0063 A3                  146         inc     dptr
 147    0064 E0                  147         movx    a,@dptr
 148                             148 ; Peephole 105   removed redundant mov
 149    0065 FD                  149         mov  r5,a
 150    0066 33                  150         rlc     a
 151    0067 E4                  151         clr     a
 152    0068 33                  152         rlc     a
 153    0069 FC                  153         mov     r4,a
 154    006A EE                  154         mov     a,r6
 155    006B 65 04               155         xrl     a,ar4
 156                             156 ; Peephole 110   removed ljmp by inverse jump logic
 157    006D 60 0D               157         jz  00102$
 158    006F                     158 00115$:
 159                             159 ;       _divsint.c 37
 160    006F C3                  160         clr     c
 161    0070 E4                  161         clr     a
 162    0071 9A                  162         subb    a,r2
 163    0072 FC                  163         mov     r4,a
 164    0073 E4                  164         clr     a
 165    0074 9B                  165         subb    a,r3
 166    0075 FE                  166         mov     r6,a
 167    0076 8C 82               167         mov     dpl,r4
 168    0078 8E 83               168         mov     dph,r6
 169                             169 ; Peephole 132   changed ljmp to sjmp
 170    007A 80 04               170         sjmp 00104$
 171    007C                     171 00102$:
 172                             172 ;       _divsint.c 41
 173    007C 8A 82               173         mov     dpl,r2
 174    007E 8B 83               174         mov     dph,r3
 175    0080                     175 00104$:
 176    0080 D2 AF               176         setb    ea
 177                     0082    177         C$_divsint.c$43$1$1 ==.
 178                     0082    178         XG$_divsint$0$0 ==.
 179    0082 22                  179         ret
 180                             180         .area   CSEG    (CODE)