3 * pic18f448.h - PIC18F448 Device Library Header
5 * This file is part of the GNU PIC Library.
8 * The GNU PIC Library is maintained by,
9 * Vangelis Rokas <vrokas@otenet.gr>
15 #ifndef __PIC18F448_H__
16 #define __PIC18F448_H__
18 extern __sfr __at (0xf00) RXF0SIDH;
32 extern volatile __RXF0SIDHbits_t __at (0xf00) RXF0SIDHbits;
34 extern __sfr __at (0xf01) RXF0SIDL;
48 extern volatile __RXF0SIDLbits_t __at (0xf01) RXF0SIDLbits;
50 extern __sfr __at (0xf02) RXF0EIDH;
64 extern volatile __RXF0EIDHbits_t __at (0xf02) RXF0EIDHbits;
66 extern __sfr __at (0xf03) RXF0EIDL;
80 extern volatile __RXF0EIDLbits_t __at (0xf03) RXF0EIDLbits;
82 extern __sfr __at (0xf04) RXF1SIDH;
96 extern volatile __RXF1SIDHbits_t __at (0xf04) RXF1SIDHbits;
98 extern __sfr __at (0xf05) RXF1SIDL;
112 extern volatile __RXF1SIDLbits_t __at (0xf05) RXF1SIDLbits;
114 extern __sfr __at (0xf06) RXF1EIDH;
128 extern volatile __RXF1EIDHbits_t __at (0xf06) RXF1EIDHbits;
130 extern __sfr __at (0xf07) RXF1EIDL;
144 extern volatile __RXF1EIDLbits_t __at (0xf07) RXF1EIDLbits;
146 extern __sfr __at (0xf08) RXF2SIDH;
160 extern volatile __RXF2SIDHbits_t __at (0xf08) RXF2SIDHbits;
162 extern __sfr __at (0xf09) RXF2SIDL;
176 extern volatile __RXF2SIDLbits_t __at (0xf09) RXF2SIDLbits;
178 extern __sfr __at (0xf0a) RXF2EIDH;
192 extern volatile __RXF2EIDHbits_t __at (0xf0a) RXF2EIDHbits;
194 extern __sfr __at (0xf0b) RXF2EIDL;
208 extern volatile __RXF2EIDLbits_t __at (0xf0b) RXF2EIDLbits;
210 extern __sfr __at (0xf0c) RXF3SIDH;
224 extern volatile __RXF3SIDHbits_t __at (0xf0c) RXF3SIDHbits;
226 extern __sfr __at (0xf0d) RXF3SIDL;
240 extern volatile __RXF3SIDLbits_t __at (0xf0d) RXF3SIDLbits;
242 extern __sfr __at (0xf0e) RXF3EIDH;
256 extern volatile __RXF3EIDHbits_t __at (0xf0e) RXF3EIDHbits;
258 extern __sfr __at (0xf0f) RXF3EIDL;
272 extern volatile __RXF3EIDLbits_t __at (0xf0f) RXF3EIDLbits;
274 extern __sfr __at (0xf10) RXF4SIDH;
288 extern volatile __RXF4SIDHbits_t __at (0xf10) RXF4SIDHbits;
290 extern __sfr __at (0xf11) RXF4SIDL;
304 extern volatile __RXF4SIDLbits_t __at (0xf11) RXF4SIDLbits;
306 extern __sfr __at (0xf12) RXF4EIDH;
320 extern volatile __RXF4EIDHbits_t __at (0xf12) RXF4EIDHbits;
322 extern __sfr __at (0xf13) RXF4EIDL;
336 extern volatile __RXF4EIDLbits_t __at (0xf13) RXF4EIDLbits;
338 extern __sfr __at (0xf14) RXF5SIDH;
352 extern volatile __RXF5SIDHbits_t __at (0xf14) RXF5SIDHbits;
354 extern __sfr __at (0xf15) RXF5SIDL;
368 extern volatile __RXF5SIDLbits_t __at (0xf15) RXF5SIDLbits;
370 extern __sfr __at (0xf16) RXF5EIDH;
384 extern volatile __RXF5EIDHbits_t __at (0xf16) RXF5EIDHbits;
386 extern __sfr __at (0xf17) RXF5EIDL;
400 extern volatile __RXF5EIDLbits_t __at (0xf17) RXF5EIDLbits;
402 extern __sfr __at (0xf18) RXM0SIDH;
416 extern volatile __RXM0SIDHbits_t __at (0xf18) RXM0SIDHbits;
418 extern __sfr __at (0xf19) RXM0SIDL;
432 extern volatile __RXM0SIDLbits_t __at (0xf19) RXM0SIDLbits;
434 extern __sfr __at (0xf1a) RXM0EIDH;
448 extern volatile __RXM0EIDHbits_t __at (0xf1a) RXM0EIDHbits;
450 extern __sfr __at (0xf1b) RXM0EIDL;
464 extern volatile __RXM0EIDLbits_t __at (0xf1b) RXM0EIDLbits;
466 extern __sfr __at (0xf1c) RXM1SIDH;
480 extern volatile __RXM1SIDHbits_t __at (0xf1c) RXM1SIDHbits;
482 extern __sfr __at (0xf1d) RXM1SIDL;
496 extern volatile __RXM1SIDLbits_t __at (0xf1d) RXM1SIDLbits;
498 extern __sfr __at (0xf1e) RXM1EIDH;
512 extern volatile __RXM1EIDHbits_t __at (0xf1e) RXM1EIDHbits;
514 extern __sfr __at (0xf1f) RXM1EIDL;
528 extern volatile __RXM1EIDLbits_t __at (0xf1f) RXM1EIDLbits;
530 extern __sfr __at (0xf20) TXB2CON;
544 extern volatile __TXB2CONbits_t __at (0xf20) TXB2CONbits;
546 extern __sfr __at (0xf21) TXB2SIDH;
560 extern volatile __TXB2SIDHbits_t __at (0xf21) TXB2SIDHbits;
562 extern __sfr __at (0xf22) TXB2SIDL;
576 extern volatile __TXB2SIDLbits_t __at (0xf22) TXB2SIDLbits;
578 extern __sfr __at (0xf23) TXB2EIDH;
592 extern volatile __TXB2EIDHbits_t __at (0xf23) TXB2EIDHbits;
594 extern __sfr __at (0xf24) TXB2EIDL;
608 extern volatile __TXB2EIDLbits_t __at (0xf24) TXB2EIDLbits;
610 extern __sfr __at (0xf25) TXB2DLC;
619 unsigned TXB2TXRTR:1;
624 extern volatile __TXB2DLCbits_t __at (0xf25) TXB2DLCbits;
626 extern __sfr __at (0xf26) TXB2D0;
640 extern volatile __TXB2D0bits_t __at (0xf26) TXB2D0bits;
642 extern __sfr __at (0xf27) TXB2D1;
656 extern volatile __TXB2D1bits_t __at (0xf27) TXB2D1bits;
658 extern __sfr __at (0xf28) TXB2D2;
672 extern volatile __TXB2D2bits_t __at (0xf28) TXB2D2bits;
674 extern __sfr __at (0xf29) TXB2D3;
688 extern volatile __TXB2D3bits_t __at (0xf29) TXB2D3bits;
690 extern __sfr __at (0xf2a) TXB2D4;
704 extern volatile __TXB2D4bits_t __at (0xf2a) TXB2D4bits;
706 extern __sfr __at (0xf2b) TXB2D5;
720 extern volatile __TXB2D5bits_t __at (0xf2b) TXB2D5bits;
722 extern __sfr __at (0xf2c) TXB2D6;
736 extern volatile __TXB2D6bits_t __at (0xf2c) TXB2D6bits;
738 extern __sfr __at (0xf2d) TXB2D7;
752 extern volatile __TXB2D7bits_t __at (0xf2d) TXB2D7bits;
754 extern __sfr __at (0xf2e) CANSTATRO4;
766 } __CANSTATRO4bits_t;
768 extern volatile __CANSTATRO4bits_t __at (0xf2e) CANSTATRO4bits;
770 extern __sfr __at (0xf30) TXB1CON;
784 extern volatile __TXB1CONbits_t __at (0xf30) TXB1CONbits;
786 extern __sfr __at (0xf31) TXB1SIDH;
800 extern volatile __TXB1SIDHbits_t __at (0xf31) TXB1SIDHbits;
802 extern __sfr __at (0xf32) TXB1SIDL;
816 extern volatile __TXB1SIDLbits_t __at (0xf32) TXB1SIDLbits;
818 extern __sfr __at (0xf33) TXB1EIDH;
832 extern volatile __TXB1EIDHbits_t __at (0xf33) TXB1EIDHbits;
834 extern __sfr __at (0xf34) TXB1EIDL;
848 extern volatile __TXB1EIDLbits_t __at (0xf34) TXB1EIDLbits;
850 extern __sfr __at (0xf35) TXB1DLC;
864 extern volatile __TXB1DLCbits_t __at (0xf35) TXB1DLCbits;
866 extern __sfr __at (0xf36) TXB1D0;
880 extern volatile __TXB1D0bits_t __at (0xf36) TXB1D0bits;
882 extern __sfr __at (0xf37) TXB1D1;
896 extern volatile __TXB1D1bits_t __at (0xf37) TXB1D1bits;
898 extern __sfr __at (0xf38) TXB1D2;
912 extern volatile __TXB1D2bits_t __at (0xf38) TXB1D2bits;
914 extern __sfr __at (0xf39) TXB1D3;
928 extern volatile __TXB1D3bits_t __at (0xf39) TXB1D3bits;
930 extern __sfr __at (0xf3a) TXB1D4;
944 extern volatile __TXB1D4bits_t __at (0xf3a) TXB1D4bits;
946 extern __sfr __at (0xf3b) TXB1D5;
960 extern volatile __TXB1D5bits_t __at (0xf3b) TXB1D5bits;
962 extern __sfr __at (0xf3c) TXB1D6;
976 extern volatile __TXB1D6bits_t __at (0xf3c) TXB1D6bits;
978 extern __sfr __at (0xf3d) TXB1D7;
992 extern volatile __TXB1D7bits_t __at (0xf3d) TXB1D7bits;
994 extern __sfr __at (0xf3e) CANSTATRO3;
1006 } __CANSTATRO3bits_t;
1008 extern volatile __CANSTATRO3bits_t __at (0xf3e) CANSTATRO3bits;
1010 extern __sfr __at (0xf40) TXB0CON;
1024 extern volatile __TXB0CONbits_t __at (0xf40) TXB0CONbits;
1026 extern __sfr __at (0xf41) TXB0SIDH;
1040 extern volatile __TXB0SIDHbits_t __at (0xf41) TXB0SIDHbits;
1042 extern __sfr __at (0xf42) TXB0SIDL;
1056 extern volatile __TXB0SIDLbits_t __at (0xf42) TXB0SIDLbits;
1058 extern __sfr __at (0xf43) TXB0EIDH;
1072 extern volatile __TXB0EIDHbits_t __at (0xf43) TXB0EIDHbits;
1074 extern __sfr __at (0xf44) TXB0EIDL;
1088 extern volatile __TXB0EIDLbits_t __at (0xf44) TXB0EIDLbits;
1090 extern __sfr __at (0xf45) TXB0DLC;
1104 extern volatile __TXB0DLCbits_t __at (0xf45) TXB0DLCbits;
1106 extern __sfr __at (0xf46) TXB0D0;
1120 extern volatile __TXB0D0bits_t __at (0xf46) TXB0D0bits;
1122 extern __sfr __at (0xf47) TXB0D1;
1136 extern volatile __TXB0D1bits_t __at (0xf47) TXB0D1bits;
1138 extern __sfr __at (0xf48) TXB0D2;
1152 extern volatile __TXB0D2bits_t __at (0xf48) TXB0D2bits;
1154 extern __sfr __at (0xf49) TXB0D3;
1163 unsigned TXBD0D36:1;
1168 extern volatile __TXB0D3bits_t __at (0xf49) TXB0D3bits;
1170 extern __sfr __at (0xf4a) TXB0D4;
1184 extern volatile __TXB0D4bits_t __at (0xf4a) TXB0D4bits;
1186 extern __sfr __at (0xf4b) TXB0D5;
1200 extern volatile __TXB0D5bits_t __at (0xf4b) TXB0D5bits;
1202 extern __sfr __at (0xf4c) TXB0D6;
1216 extern volatile __TXB0D6bits_t __at (0xf4c) TXB0D6bits;
1218 extern __sfr __at (0xf4d) TXB0D7;
1232 extern volatile __TXB0D7bits_t __at (0xf4d) TXB0D7bits;
1234 extern __sfr __at (0xf4e) CANSTATRO2;
1246 } __CANSTATRO2bits_t;
1248 extern volatile __CANSTATRO2bits_t __at (0xf4e) CANSTATRO2bits;
1250 extern __sfr __at (0xf50) RXB1CON;
1264 extern volatile __RXB1CONbits_t __at (0xf50) RXB1CONbits;
1266 extern __sfr __at (0xf51) RXB1SIDH;
1280 extern volatile __RXB1SIDHbits_t __at (0xf51) RXB1SIDHbits;
1282 extern __sfr __at (0xf52) RXB1SIDL;
1296 extern volatile __RXB1SIDLbits_t __at (0xf52) RXB1SIDLbits;
1298 extern __sfr __at (0xf53) RXB1EIDH;
1312 extern volatile __RXB1EIDHbits_t __at (0xf53) RXB1EIDHbits;
1314 extern __sfr __at (0xf54) RXB1EIDL;
1328 extern volatile __RXB1EIDLbits_t __at (0xf54) RXB1EIDLbits;
1330 extern __sfr __at (0xf55) RXB1DLC;
1344 extern volatile __RXB1DLCbits_t __at (0xf55) RXB1DLCbits;
1346 extern __sfr __at (0xf56) RXB1D0;
1360 extern volatile __RXB1D0bits_t __at (0xf56) RXB1D0bits;
1362 extern __sfr __at (0xf57) RXB1D1;
1376 extern volatile __RXB1D1bits_t __at (0xf57) RXB1D1bits;
1378 extern __sfr __at (0xf58) RXB1D2;
1392 extern volatile __RXB1D2bits_t __at (0xf58) RXB1D2bits;
1394 extern __sfr __at (0xf59) RXB1D3;
1408 extern volatile __RXB1D3bits_t __at (0xf59) RXB1D3bits;
1410 extern __sfr __at (0xf5a) RXB1D4;
1424 extern volatile __RXB1D4bits_t __at (0xf5a) RXB1D4bits;
1426 extern __sfr __at (0xf5b) RXB1D5;
1440 extern volatile __RXB1D5bits_t __at (0xf5b) RXB1D5bits;
1442 extern __sfr __at (0xf5c) RXB1D6;
1456 extern volatile __RXB1D6bits_t __at (0xf5c) RXB1D6bits;
1458 extern __sfr __at (0xf5d) RXB1D7;
1472 extern volatile __RXB1D7bits_t __at (0xf5d) RXB1D7bits;
1474 extern __sfr __at (0xf5e) CANSTATRO1;
1486 } __CANSTATRO1bits_t;
1488 extern volatile __CANSTATRO1bits_t __at (0xf5e) CANSTATRO1bits;
1490 extern __sfr __at (0xf60) RXB0CON;
1494 unsigned RXB0DBEN_R:1;
1495 unsigned RXB0DBEN:1;
1504 extern volatile __RXB0CONbits_t __at (0xf60) RXB0CONbits;
1506 extern __sfr __at (0xf61) RXB0SIDH;
1520 extern volatile __RXB0SIDHbits_t __at (0xf61) RXB0SIDHbits;
1522 extern __sfr __at (0xf62) RXB0SIDL;
1536 extern volatile __RXB0SIDLbits_t __at (0xf62) RXB0SIDLbits;
1538 extern __sfr __at (0xf63) RXB0EIDH;
1552 extern volatile __RXB0EIDHbits_t __at (0xf63) RXB0EIDHbits;
1554 extern __sfr __at (0xf64) RXB0EIDL;
1568 extern volatile __RXB0EIDLbits_t __at (0xf64) RXB0EIDLbits;
1570 extern __sfr __at (0xf65) RXB0DLC;
1584 extern volatile __RXB0DLCbits_t __at (0xf65) RXB0DLCbits;
1586 extern __sfr __at (0xf66) RXB0D0;
1587 extern __sfr __at (0xf67) RXB0D1;
1588 extern __sfr __at (0xf68) RXB0D2;
1589 extern __sfr __at (0xf69) RXB0D3;
1590 extern __sfr __at (0xf6a) RXB0D4;
1591 extern __sfr __at (0xf6b) RXB0D5;
1592 extern __sfr __at (0xf6c) RXB0D6;
1593 extern __sfr __at (0xf6d) RXB0D7;
1594 extern __sfr __at (0xf6e) CANSTAT;
1608 extern volatile __CANSTATbits_t __at (0xf6e) CANSTATbits;
1610 extern __sfr __at (0xf6f) CANCON;
1624 extern volatile __CANCONbits_t __at (0xf6f) CANCONbits;
1626 extern __sfr __at (0xf70) BRGCON1;
1640 extern volatile __BRGCON1bits_t __at (0xf70) BRGCON1bits;
1642 extern __sfr __at (0xf71) BRGCON2;
1652 unsigned SEG2PHTS:1;
1656 extern volatile __BRGCON2bits_t __at (0xf71) BRGCON2bits;
1658 extern __sfr __at (0xf72) BRGCON3;
1672 extern volatile __BRGCON3bits_t __at (0xf72) BRGCON3bits;
1674 extern __sfr __at (0xf73) CIOCON;
1688 extern volatile __CIOCONbits_t __at (0xf73) CIOCONbits;
1690 extern __sfr __at (0xf74) COMSTAT;
1699 unsigned RXB1OVFL:1;
1700 unsigned RXB0OVFL:1;
1704 extern volatile __COMSTATbits_t __at (0xf74) COMSTATbits;
1706 extern __sfr __at (0xf75) RXERRCNT;
1720 extern volatile __RXERRCNTbits_t __at (0xf75) RXERRCNTbits;
1722 extern __sfr __at (0xf76) TXERRCNT;
1736 extern volatile __TXERRCNTbits_t __at (0xf76) TXERRCNTbits;
1738 extern __sfr __at (0xf80) PORTA;
1785 extern volatile __PORTAbits_t __at (0xf80) PORTAbits;
1787 extern __sfr __at (0xf81) PORTB;
1812 extern volatile __PORTBbits_t __at (0xf81) PORTBbits;
1814 extern __sfr __at (0xf82) PORTC;
1850 extern volatile __PORTCbits_t __at (0xf82) PORTCbits;
1852 extern __sfr __at (0xf83) PORTD;
1877 extern volatile __PORTDbits_t __at (0xf83) PORTDbits;
1879 extern __sfr __at (0xf84) PORTE;
1915 extern volatile __PORTEbits_t __at (0xf84) PORTEbits;
1917 extern __sfr __at (0xf89) LATA;
1931 extern volatile __LATAbits_t __at (0xf89) LATAbits;
1933 extern __sfr __at (0xf8a) LATB;
1947 extern volatile __LATBbits_t __at (0xf8a) LATBbits;
1949 extern __sfr __at (0xf8b) LATC;
1963 extern volatile __LATCbits_t __at (0xf8b) LATCbits;
1965 extern __sfr __at (0xf8c) LATD;
1979 extern volatile __LATDbits_t __at (0xf8c) LATDbits;
1981 extern __sfr __at (0xf8d) LATE;
1995 extern volatile __LATEbits_t __at (0xf8d) LATEbits;
1997 extern __sfr __at (0xf92) TRISA;
2011 extern volatile __TRISAbits_t __at (0xf92) TRISAbits;
2013 extern __sfr __at (0xf93) TRISB;
2027 extern volatile __TRISBbits_t __at (0xf93) TRISBbits;
2029 extern __sfr __at (0xf94) TRISC;
2043 extern volatile __TRISCbits_t __at (0xf94) TRISCbits;
2045 extern __sfr __at (0xf95) TRISD;
2059 extern volatile __TRISDbits_t __at (0xf95) TRISDbits;
2061 extern __sfr __at (0xf96) TRISE;
2075 extern volatile __TRISEbits_t __at (0xf96) TRISEbits;
2077 extern __sfr __at (0xf9d) PIE1;
2091 extern volatile __PIE1bits_t __at (0xf9d) PIE1bits;
2093 extern __sfr __at (0xf9e) PIR1;
2107 extern volatile __PIR1bits_t __at (0xf9e) PIR1bits;
2109 extern __sfr __at (0xf9f) IPR1;
2123 extern volatile __IPR1bits_t __at (0xf9f) IPR1bits;
2125 extern __sfr __at (0xfa0) PIE2;
2139 extern volatile __PIE2bits_t __at (0xfa0) PIE2bits;
2141 extern __sfr __at (0xfa1) PIR2;
2155 extern volatile __PIR2bits_t __at (0xfa1) PIR2bits;
2157 extern __sfr __at (0xfa2) IPR2;
2171 extern volatile __IPR2bits_t __at (0xfa2) IPR2bits;
2173 extern __sfr __at (0xfa3) PIE3;
2187 extern volatile __PIE3bits_t __at (0xfa3) PIE3bits;
2189 extern __sfr __at (0xfa4) PIR3;
2203 extern volatile __PIR3bits_t __at (0xfa4) PIR3bits;
2205 extern __sfr __at (0xfa5) IPR3;
2219 extern volatile __IPR3bits_t __at (0xfa5) IPR3bits;
2221 extern __sfr __at (0xfa6) EECON1;
2235 extern volatile __EECON1bits_t __at (0xfa6) EECON1bits;
2237 extern __sfr __at (0xfa7) EECON2;
2238 extern __sfr __at (0xfa8) EEDATA;
2239 extern __sfr __at (0xfa9) EEADR;
2240 extern __sfr __at (0xfab) RCSTA;
2254 extern volatile __RCSTAbits_t __at (0xfab) RCSTAbits;
2256 extern __sfr __at (0xfac) TXSTA;
2270 extern volatile __TXSTAbits_t __at (0xfac) TXSTAbits;
2272 extern __sfr __at (0xfad) TXREG;
2273 extern __sfr __at (0xfae) RCREG;
2274 extern __sfr __at (0xfaf) SPBRG;
2275 extern __sfr __at (0xfb0) PSPCON;
2289 extern volatile __PSPCONbits_t __at (0xfb0) PSPCONbits;
2291 extern __sfr __at (0xfb1) T3CON;
2305 extern volatile __T3CONbits_t __at (0xfb1) T3CONbits;
2307 extern __sfr __at (0xfb2) TMR3L;
2308 extern __sfr __at (0xfb3) TMR3H;
2309 extern __sfr __at (0xfb4) CMCON;
2323 extern volatile __CMCONbits_t __at (0xfb4) CMCONbits;
2325 extern __sfr __at (0xfb5) CVRCON;
2339 extern volatile __CVRCONbits_t __at (0xfb5) CVRCONbits;
2341 extern __sfr __at (0xfb6) ECCPAS;
2355 extern volatile __ECCPASbits_t __at (0xfb6) ECCPASbits;
2357 extern __sfr __at (0xfb7) ECCP1DEL;
2371 extern volatile __ECCP1DELbits_t __at (0xfb7) ECCP1DELbits;
2373 extern __sfr __at (0xfba) ECCP1CON;
2387 extern volatile __ECCP1CONbits_t __at (0xfba) ECCP1CONbits;
2389 extern __sfr __at (0xfbb) ECCPR1L;
2390 extern __sfr __at (0xfbc) ECCPR1H;
2391 extern __sfr __at (0xfbd) CCP1CON;
2405 extern volatile __CCP1CONbits_t __at (0xfbd) CCP1CONbits;
2407 extern __sfr __at (0xfbe) CCPR1L;
2408 extern __sfr __at (0xfbf) CCPR1H;
2409 extern __sfr __at (0xfc1) ADCON1;
2423 extern volatile __ADCON1bits_t __at (0xfc1) ADCON1bits;
2425 extern __sfr __at (0xfc2) ADCON0;
2439 extern volatile __ADCON0bits_t __at (0xfc2) ADCON0bits;
2441 extern __sfr __at (0xfc3) ADRESL;
2442 extern __sfr __at (0xfc4) ADRESH;
2443 extern __sfr __at (0xfc5) SSPCON2;
2457 extern volatile __SSPCON2bits_t __at (0xfc5) SSPCON2bits;
2459 extern __sfr __at (0xfc6) SSPCON1;
2473 extern volatile __SSPCON1bits_t __at (0xfc6) SSPCON1bits;
2475 extern __sfr __at (0xfc7) SSPSTAT;
2489 extern volatile __SSPSTATbits_t __at (0xfc7) SSPSTATbits;
2491 extern __sfr __at (0xfc8) SSPADD;
2492 extern __sfr __at (0xfc9) SSPBUF;
2493 extern __sfr __at (0xfca) T2CON;
2507 extern volatile __T2CONbits_t __at (0xfca) T2CONbits;
2509 extern __sfr __at (0xfcb) PR2;
2510 extern __sfr __at (0xfcc) TMR2;
2511 extern __sfr __at (0xfcd) T1CON;
2516 unsigned NOT_T1SYNC:1;
2525 extern volatile __T1CONbits_t __at (0xfcd) T1CONbits;
2527 extern __sfr __at (0xfce) TMR1L;
2528 extern __sfr __at (0xfcf) TMR1H;
2529 extern __sfr __at (0xfd0) RCON;
2543 extern volatile __RCONbits_t __at (0xfd0) RCONbits;
2545 extern __sfr __at (0xfd1) WDTCON;
2570 extern volatile __WDTCONbits_t __at (0xfd1) WDTCONbits;
2572 extern __sfr __at (0xfd2) LVDCON;
2597 extern volatile __LVDCONbits_t __at (0xfd2) LVDCONbits;
2599 extern __sfr __at (0xfd3) OSCCON;
2613 extern volatile __OSCCONbits_t __at (0xfd3) OSCCONbits;
2615 extern __sfr __at (0xfd5) T0CON;
2629 extern volatile __T0CONbits_t __at (0xfd5) T0CONbits;
2631 extern __sfr __at (0xfd6) TMR0L;
2632 extern __sfr __at (0xfd7) TMR0H;
2633 extern __sfr __at (0xfd8) STATUS;
2647 extern volatile __STATUSbits_t __at (0xfd8) STATUSbits;
2649 extern __sfr __at (0xfd9) FSR2L;
2650 extern __sfr __at (0xfda) FSR2H;
2651 extern __sfr __at (0xfdb) PLUSW2;
2652 extern __sfr __at (0xfdc) PREINC2;
2653 extern __sfr __at (0xfdd) POSTDEC2;
2654 extern __sfr __at (0xfde) POSTINC2;
2655 extern __sfr __at (0xfdf) INDF2;
2656 extern __sfr __at (0xfe0) BSR;
2657 extern __sfr __at (0xfe1) FSR1L;
2658 extern __sfr __at (0xfe2) FSR1H;
2659 extern __sfr __at (0xfe3) PLUSW1;
2660 extern __sfr __at (0xfe4) PREINC1;
2661 extern __sfr __at (0xfe5) POSTDEC1;
2662 extern __sfr __at (0xfe6) POSTINC1;
2663 extern __sfr __at (0xfe7) INDF1;
2664 extern __sfr __at (0xfe8) WREG;
2665 extern __sfr __at (0xfe9) FSR0L;
2666 extern __sfr __at (0xfea) FSR0H;
2667 extern __sfr __at (0xfeb) PLUSW0;
2668 extern __sfr __at (0xfec) PREINC0;
2669 extern __sfr __at (0xfed) POSTDEC0;
2670 extern __sfr __at (0xfee) POSTINC0;
2671 extern __sfr __at (0xfef) INDF0;
2672 extern __sfr __at (0xff0) INTCON3;
2697 extern volatile __INTCON3bits_t __at (0xff0) INTCON3bits;
2699 extern __sfr __at (0xff1) INTCON2;
2713 extern volatile __INTCON2bits_t __at (0xff1) INTCON2bits;
2715 extern __sfr __at (0xff2) INTCON;
2739 extern volatile __INTCONbits_t __at (0xff2) INTCONbits;
2741 extern __sfr __at (0xff3) PRODL;
2742 extern __sfr __at (0xff4) PRODH;
2743 extern __sfr __at (0xff5) TABLAT;
2744 extern __sfr __at (0xff6) TBLPTRL;
2745 extern __sfr __at (0xff7) TBLPTRH;
2746 extern __sfr __at (0xff8) TBLPTRU;
2747 extern __sfr __at (0xff9) PCL;
2748 extern __sfr __at (0xffa) PCLATH;
2749 extern __sfr __at (0xffb) PCLATU;
2750 extern __sfr __at (0xffc) STKPTR;
2764 extern volatile __STKPTRbits_t __at (0xffc) STKPTRbits;
2766 extern __sfr __at (0xffd) TOSL;
2767 extern __sfr __at (0xffe) TOSH;
2768 extern __sfr __at (0xfff) TOSU;
2771 /* Configuration registers locations */
2772 #define __CONFIG1H 0x300001
2773 #define __CONFIG2L 0x300002
2774 #define __CONFIG2H 0x300003
2775 #define __CONFIG4L 0x300006
2776 #define __CONFIG5L 0x300008
2777 #define __CONFIG5H 0x300009
2778 #define __CONFIG6L 0x30000A
2779 #define __CONFIG6H 0x30000B
2780 #define __CONFIG7L 0x30000C
2781 #define __CONFIG7H 0x30000D
2785 /* Oscillator 1H options */
2786 #define _OSC_RC_OSC2_1H 0xFF /* RC-OSC2 as RA6 */
2787 #define _OSC_HS_PLL_1H 0xFE /* HS-PLL Enabled */
2788 #define _OSC_EC_OSC2_RA6_1H 0xFD /* EC-OSC2 as RA6 */
2789 #define _OSC_EC_OSC2_Clock_Out_1H 0xFC /* EC-OSC2 as Clock_Out */
2790 #define _OSC_RC_1H 0xFB /* RC */
2791 #define _OSC_HS_1H 0xFA /* HS */
2792 #define _OSC_XT_1H 0xF9 /* XT */
2793 #define _OSC_LP_1H 0xF8 /* LP */
2795 /* Osc. Switch Enable 1H options */
2796 #define _OSCS_OFF_1H 0xFF /* Disabled */
2797 #define _OSCS_ON_1H 0xDF /* Enabled */
2799 /* Power Up Timer 2L options */
2800 #define _PUT_OFF_2L 0xFF /* Disabled */
2801 #define _PUT_ON_2L 0xFE /* Enabled */
2803 /* Brown Out Detect 2L options */
2804 #define _BODEN_ON_2L 0xFF /* Enabled */
2805 #define _BODEN_OFF_2L 0xFD /* Disabled */
2807 /* Brown Out Voltage 2L options */
2808 #define _BODENV_2_0V_2L 0xFF /* 2.0V */
2809 #define _BODENV_2_7V_2L 0xFB /* 2.7V */
2810 #define _BODENV_4_2V_2L 0xF7 /* 4.2V */
2811 #define _BODENV_4_5V_2L 0xF3 /* 4.5V */
2813 /* Watchdog Timer 2H options */
2814 #define _WDT_ON_2H 0xFF /* Enabled */
2815 #define _WDT_OFF_2H 0xFE /* Disabled */
2817 /* Watchdog Postscaler 2H options */
2818 #define _WDTPS_1_128_2H 0xFF /* 1:128 */
2819 #define _WDTPS_1_64_2H 0xFD /* 1:64 */
2820 #define _WDTPS_1_32_2H 0xFB /* 1:32 */
2821 #define _WDTPS_1_16_2H 0xF9 /* 1:16 */
2822 #define _WDTPS_1_8_2H 0xF7 /* 1:8 */
2823 #define _WDTPS_1_4_2H 0xF5 /* 1:4 */
2824 #define _WDTPS_1_2_2H 0xF3 /* 1:2 */
2825 #define _WDTPS_1_1_2H 0xF1 /* 1:1 */
2827 /* Low Voltage Program 4L options */
2828 #define _LVP_ON_4L 0xFF /* Enabled */
2829 #define _LVP_OFF_4L 0xFB /* Disabled */
2831 /* Background Debug 4L options */
2832 #define _BACKBUG_OFF_4L 0xFF /* Disabled */
2833 #define _BACKBUG_ON_4L 0x7F /* Enabled */
2835 /* Stack Overflow Reset 4L options */
2836 #define _STVR_ON_4L 0xFF /* Enabled */
2837 #define _STVR_OFF_4L 0xFE /* Disabled */
2839 /* Code Protect 00200-01FFF 5L options */
2840 #define _CP_0_OFF_5L 0xFF /* Disabled */
2841 #define _CP_0_ON_5L 0xFE /* Enabled */
2843 /* Code Protect 02000-03FFF 5L options */
2844 #define _CP_1_OFF_5L 0xFF /* Disabled */
2845 #define _CP_1_ON_5L 0xFD /* Enabled */
2847 /* Data EE Read Protect 5H options */
2848 #define _CPD_OFF_5H 0xFF /* Disabled */
2849 #define _CPD_ON_5H 0x7F /* Enabled */
2851 /* Code Protect Boot 5H options */
2852 #define _CPB_OFF_5H 0xFF /* Disabled */
2853 #define _CPB_ON_5H 0xBF /* Enabled */
2855 /* Table Write Protect 00200-01FFF 6L options */
2856 #define _WRT_0_OFF_6L 0xFF /* Disabled */
2857 #define _WRT_0_ON_6L 0xFE /* Enabled */
2859 /* Table Write Protect 02000-03FFF 6L options */
2860 #define _WRT_1_OFF_6L 0xFF /* Disabled */
2861 #define _WRT_1_ON_6L 0xFD /* Enabled */
2863 /* Data EE Write Protect 6H options */
2864 #define _WRTD_OFF_6H 0xFF /* Disabled */
2865 #define _WRTD_ON_6H 0x7F /* Enabled */
2867 /* Table Write Protect Boot 6H options */
2868 #define _WRTB_OFF_6H 0xFF /* Disabled */
2869 #define _WRTB_ON_6H 0xBF /* Enabled */
2871 /* Config. Write Protect 6H options */
2872 #define _WRTC_OFF_6H 0xFF /* Disabled */
2873 #define _WRTC_ON_6H 0xDF /* Enabled */
2875 /* Table Read Protect 00200-01FFF 7L options */
2876 #define _EBTR_0_OFF_7L 0xFF /* Disabled */
2877 #define _EBTR_0_ON_7L 0xFE /* Enabled */
2879 /* Table Read Protect 02000-03FFF 7L options */
2880 #define _EBTR_1_OFF_7L 0xFF /* Disabled */
2881 #define _EBTR_1_ON_7L 0xFD /* Enabled */
2883 /* Table Read Protect Boot 7H options */
2884 #define _EBTRB_OFF_7H 0xFF /* Disabled */
2885 #define _EBTRB_ON_7H 0xBF /* Enabled */
2888 /* Device ID locations */
2889 #define __IDLOC0 0x200000
2890 #define __IDLOC1 0x200001
2891 #define __IDLOC2 0x200002
2892 #define __IDLOC3 0x200003
2893 #define __IDLOC4 0x200004
2894 #define __IDLOC5 0x200005
2895 #define __IDLOC6 0x200006
2896 #define __IDLOC7 0x200007