3 * pic18f242.h - PIC18F242 Device Library Header
5 * This file is part of the GNU PIC Library.
8 * The GNU PIC Library is maintained by,
9 * Vangelis Rokas <vrokas@otenet.gr>
15 #ifndef __PIC18F242_H__
16 #define __PIC18F242_H__
18 extern __sfr __at (0xf80) PORTA;
65 extern volatile __PORTAbits_t __at (0xf80) PORTAbits;
67 extern __sfr __at (0xf81) PORTB;
92 extern volatile __PORTBbits_t __at (0xf81) PORTBbits;
94 extern __sfr __at (0xf82) PORTC;
130 extern volatile __PORTCbits_t __at (0xf82) PORTCbits;
132 extern __sfr __at (0xf89) LATA;
146 extern volatile __LATAbits_t __at (0xf89) LATAbits;
148 extern __sfr __at (0xf8a) LATB;
162 extern volatile __LATBbits_t __at (0xf8a) LATBbits;
164 extern __sfr __at (0xf8b) LATC;
178 extern volatile __LATCbits_t __at (0xf8b) LATCbits;
180 extern __sfr __at (0xf92) TRISA;
194 extern volatile __TRISAbits_t __at (0xf92) TRISAbits;
196 extern __sfr __at (0xf93) TRISB;
210 extern volatile __TRISBbits_t __at (0xf93) TRISBbits;
212 extern __sfr __at (0xf94) TRISC;
226 extern volatile __TRISCbits_t __at (0xf94) TRISCbits;
228 extern __sfr __at (0xf9d) PIE1;
242 extern volatile __PIE1bits_t __at (0xf9d) PIE1bits;
244 extern __sfr __at (0xf9e) PIR1;
258 extern volatile __PIR1bits_t __at (0xf9e) PIR1bits;
260 extern __sfr __at (0xf9f) IPR1;
274 extern volatile __IPR1bits_t __at (0xf9f) IPR1bits;
276 extern __sfr __at (0xfa0) PIE2;
290 extern volatile __PIE2bits_t __at (0xfa0) PIE2bits;
292 extern __sfr __at (0xfa1) PIR2;
306 extern volatile __PIR2bits_t __at (0xfa1) PIR2bits;
308 extern __sfr __at (0xfa2) IPR2;
322 extern volatile __IPR2bits_t __at (0xfa2) IPR2bits;
324 extern __sfr __at (0xfa6) EECON1;
338 extern volatile __EECON1bits_t __at (0xfa6) EECON1bits;
340 extern __sfr __at (0xfa7) EECON2;
341 extern __sfr __at (0xfa8) EEDATA;
342 extern __sfr __at (0xfa9) EEADR;
343 extern __sfr __at (0xfab) RCSTA;
357 extern volatile __RCSTAbits_t __at (0xfab) RCSTAbits;
359 extern __sfr __at (0xfac) TXSTA;
373 extern volatile __TXSTAbits_t __at (0xfac) TXSTAbits;
375 extern __sfr __at (0xfad) TXREG;
376 extern __sfr __at (0xfae) RCREG;
377 extern __sfr __at (0xfaf) SPBRG;
378 extern __sfr __at (0xfb1) T3CON;
392 extern volatile __T3CONbits_t __at (0xfb1) T3CONbits;
394 extern __sfr __at (0xfb2) TMR3L;
395 extern __sfr __at (0xfb3) TMR3H;
396 extern __sfr __at (0xfba) CCP2CON;
410 extern volatile __CCP2CONbits_t __at (0xfba) CCP2CONbits;
412 extern __sfr __at (0xfbb) CCPR2L;
413 extern __sfr __at (0xfbc) CCPR2H;
414 extern __sfr __at (0xfbd) CCP1CON;
428 extern volatile __CCP1CONbits_t __at (0xfbd) CCP1CONbits;
430 extern __sfr __at (0xfbe) CCPR1L;
431 extern __sfr __at (0xfbf) CCPR1H;
432 extern __sfr __at (0xfc1) ADCON1;
446 extern volatile __ADCON1bits_t __at (0xfc1) ADCON1bits;
448 extern __sfr __at (0xfc2) ADCON0;
462 extern volatile __ADCON0bits_t __at (0xfc2) ADCON0bits;
464 extern __sfr __at (0xfc3) ADRESL;
465 extern __sfr __at (0xfc4) ADRESH;
466 extern __sfr __at (0xfc5) SSPCON2;
480 extern volatile __SSPCON2bits_t __at (0xfc5) SSPCON2bits;
482 extern __sfr __at (0xfc6) SSPCON1;
496 extern volatile __SSPCON1bits_t __at (0xfc6) SSPCON1bits;
498 extern __sfr __at (0xfc7) SSPSTAT;
512 extern volatile __SSPSTATbits_t __at (0xfc7) SSPSTATbits;
514 extern __sfr __at (0xfc8) SSPADD;
515 extern __sfr __at (0xfc9) SSPBUF;
516 extern __sfr __at (0xfca) T2CON;
530 extern volatile __T2CONbits_t __at (0xfca) T2CONbits;
532 extern __sfr __at (0xfcb) PR2;
533 extern __sfr __at (0xfcc) TMR2;
534 extern __sfr __at (0xfcd) T1CON;
539 unsigned NOT_T1SYNC:1;
548 extern volatile __T1CONbits_t __at (0xfcd) T1CONbits;
550 extern __sfr __at (0xfce) TMR1L;
551 extern __sfr __at (0xfcf) TMR1H;
552 extern __sfr __at (0xfd0) RCON;
566 extern volatile __RCONbits_t __at (0xfd0) RCONbits;
568 extern __sfr __at (0xfd1) WDTCON;
593 extern volatile __WDTCONbits_t __at (0xfd1) WDTCONbits;
595 extern __sfr __at (0xfd2) LVDCON;
620 extern volatile __LVDCONbits_t __at (0xfd2) LVDCONbits;
622 extern __sfr __at (0xfd3) OSCCON;
636 extern volatile __OSCCONbits_t __at (0xfd3) OSCCONbits;
638 extern __sfr __at (0xfd5) T0CON;
652 extern volatile __T0CONbits_t __at (0xfd5) T0CONbits;
654 extern __sfr __at (0xfd6) TMR0L;
655 extern __sfr __at (0xfd7) TMR0H;
656 extern __sfr __at (0xfd8) STATUS;
670 extern volatile __STATUSbits_t __at (0xfd8) STATUSbits;
672 extern __sfr __at (0xfd9) FSR2L;
673 extern __sfr __at (0xfda) FSR2H;
674 extern __sfr __at (0xfdb) PLUSW2;
675 extern __sfr __at (0xfdc) PREINC2;
676 extern __sfr __at (0xfdd) POSTDEC2;
677 extern __sfr __at (0xfde) POSTINC2;
678 extern __sfr __at (0xfdf) INDF2;
679 extern __sfr __at (0xfe0) BSR;
680 extern __sfr __at (0xfe1) FSR1L;
681 extern __sfr __at (0xfe2) FSR1H;
682 extern __sfr __at (0xfe3) PLUSW1;
683 extern __sfr __at (0xfe4) PREINC1;
684 extern __sfr __at (0xfe5) POSTDEC1;
685 extern __sfr __at (0xfe6) POSTINC1;
686 extern __sfr __at (0xfe7) INDF1;
687 extern __sfr __at (0xfe8) WREG;
688 extern __sfr __at (0xfe9) FSR0L;
689 extern __sfr __at (0xfea) FSR0H;
690 extern __sfr __at (0xfeb) PLUSW0;
691 extern __sfr __at (0xfec) PREINC0;
692 extern __sfr __at (0xfed) POSTDEC0;
693 extern __sfr __at (0xfee) POSTINC0;
694 extern __sfr __at (0xfef) INDF0;
695 extern __sfr __at (0xff0) INTCON3;
720 extern volatile __INTCON3bits_t __at (0xff0) INTCON3bits;
722 extern __sfr __at (0xff1) INTCON2;
736 extern volatile __INTCON2bits_t __at (0xff1) INTCON2bits;
738 extern __sfr __at (0xff2) INTCON;
752 extern volatile __INTCONbits_t __at (0xff2) INTCONbits;
754 extern __sfr __at (0xff3) PRODL;
755 extern __sfr __at (0xff4) PRODH;
756 extern __sfr __at (0xff5) TABLAT;
757 extern __sfr __at (0xff6) TBLPTRL;
758 extern __sfr __at (0xff7) TBLPTRH;
759 extern __sfr __at (0xff8) TBLPTRU;
760 extern __sfr __at (0xff9) PCL;
761 extern __sfr __at (0xffa) PCLATH;
762 extern __sfr __at (0xffb) PCLATU;
763 extern __sfr __at (0xffc) STKPTR;
777 extern volatile __STKPTRbits_t __at (0xffc) STKPTRbits;
779 extern __sfr __at (0xffd) TOSL;
780 extern __sfr __at (0xffe) TOSH;
781 extern __sfr __at (0xfff) TOSU;
784 /* Configuration registers locations */
785 #define __CONFIG1H 0x300001
786 #define __CONFIG2L 0x300002
787 #define __CONFIG2H 0x300003
788 #define __CONFIG3H 0x300005
789 #define __CONFIG4L 0x300006
790 #define __CONFIG5L 0x300008
791 #define __CONFIG5H 0x300009
792 #define __CONFIG6L 0x30000A
793 #define __CONFIG6H 0x30000B
794 #define __CONFIG7L 0x30000C
795 #define __CONFIG7H 0x30000D
799 /* Oscillator 1H options */
800 #define _OSC_RC_OSC2_1H 0xFF /* RC-OSC2 as RA6 */
801 #define _OSC_HS_PLL_1H 0xFE /* HS-PLL Enabled */
802 #define _OSC_EC_OSC2_RA6_1H 0xFD /* EC-OSC2 as RA6 */
803 #define _OSC_EC_OSC2_Clock_Out_1H 0xFC /* EC-OSC2 as Clock_Out */
804 #define _OSC_RC_1H 0xFB /* RC */
805 #define _OSC_HS_1H 0xFA /* HS */
806 #define _OSC_XT_1H 0xF9 /* XT */
807 #define _OSC_LP_1H 0xF8 /* LP */
809 /* Osc. Switch Enable 1H options */
810 #define _OSCS_OFF_1H 0xFF /* Disabled */
811 #define _OSCS_ON_1H 0xDF /* Enabled */
813 /* Power Up Timer 2L options */
814 #define _PUT_OFF_2L 0xFF /* Disabled */
815 #define _PUT_ON_2L 0xFE /* Enabled */
817 /* Brown Out Detect 2L options */
818 #define _BODEN_ON_2L 0xFF /* Enabled */
819 #define _BODEN_OFF_2L 0xFD /* Disabled */
821 /* Brown Out Voltage 2L options */
822 #define _BODENV_2_0V_2L 0xFF /* 2.0V */
823 #define _BODENV_2_7V_2L 0xFB /* 2.7V */
824 #define _BODENV_4_2V_2L 0xF7 /* 4.2V */
825 #define _BODENV_4_5V_2L 0xF3 /* 4.5V */
827 /* Watchdog Timer 2H options */
828 #define _WDT_ON_2H 0xFF /* Enabled */
829 #define _WDT_OFF_2H 0xFE /* Disabled */
831 /* Watchdog Postscaler 2H options */
832 #define _WDTPS_1_128_2H 0xFF /* 1:128 */
833 #define _WDTPS_1_64_2H 0xFD /* 1:64 */
834 #define _WDTPS_1_32_2H 0xFB /* 1:32 */
835 #define _WDTPS_1_16_2H 0xF9 /* 1:16 */
836 #define _WDTPS_1_8_2H 0xF7 /* 1:8 */
837 #define _WDTPS_1_4_2H 0xF5 /* 1:4 */
838 #define _WDTPS_1_2_2H 0xF3 /* 1:2 */
839 #define _WDTPS_1_1_2H 0xF1 /* 1:1 */
841 /* CCP2 Mux 3H options */
842 #define _CCP2MUX_RC1_3H 0xFF /* RC1 */
843 #define _CCP2MUX_RB3_3H 0xFE /* RB3 */
845 /* Low Voltage Program 4L options */
846 #define _LVP_ON_4L 0xFF /* Enabled */
847 #define _LVP_OFF_4L 0xFB /* Disabled */
849 /* Background Debug 4L options */
850 #define _BACKBUG_OFF_4L 0xFF /* Disabled */
851 #define _BACKBUG_ON_4L 0x7F /* Enabled */
853 /* Stack Overflow Reset 4L options */
854 #define _STVR_ON_4L 0xFF /* Enabled */
855 #define _STVR_OFF_4L 0xFE /* Disabled */
857 /* Code Protect 00200-01FFF 5L options */
858 #define _CP_0_OFF_5L 0xFF /* Disabled */
859 #define _CP_0_ON_5L 0xFE /* Enabled */
861 /* Code Protect 02000-03FFF 5L options */
862 #define _CP_1_OFF_5L 0xFF /* Disabled */
863 #define _CP_1_ON_5L 0xFD /* Enabled */
865 /* Data EE Read Protect 5H options */
866 #define _CPD_OFF_5H 0xFF /* Disabled */
867 #define _CPD_ON_5H 0x7F /* Enabled */
869 /* Code Protect Boot 5H options */
870 #define _CPB_OFF_5H 0xFF /* Disabled */
871 #define _CPB_ON_5H 0xBF /* Enabled */
873 /* Table Write Protect 00200-01FFF 6L options */
874 #define _WRT_0_OFF_6L 0xFF /* Disabled */
875 #define _WRT_0_ON_6L 0xFE /* Enabled */
877 /* Table Write Protect 02000-03FFF 6L options */
878 #define _WRT_1_OFF_6L 0xFF /* Disabled */
879 #define _WRT_1_ON_6L 0xFD /* Enabled */
881 /* Data EE Write Protect 6H options */
882 #define _WRTD_OFF_6H 0xFF /* Disabled */
883 #define _WRTD_ON_6H 0x7F /* Enabled */
885 /* Table Write Protect Boot 6H options */
886 #define _WRTB_OFF_6H 0xFF /* Disabled */
887 #define _WRTB_ON_6H 0xBF /* Enabled */
889 /* Config. Write Protect 6H options */
890 #define _WRTC_OFF_6H 0xFF /* Disabled */
891 #define _WRTC_ON_6H 0xDF /* Enabled */
893 /* Table Read Protect 00200-01FFF 7L options */
894 #define _EBTR_0_OFF_7L 0xFF /* Disabled */
895 #define _EBTR_0_ON_7L 0xFE /* Enabled */
897 /* Table Read Protect 02000-03FFF 7L options */
898 #define _EBTR_1_OFF_7L 0xFF /* Disabled */
899 #define _EBTR_1_ON_7L 0xFD /* Enabled */
901 /* Table Read Protect Boot 7H options */
902 #define _EBTRB_OFF_7H 0xFF /* Disabled */
903 #define _EBTRB_ON_7H 0xBF /* Enabled */
906 /* Device ID locations */
907 #define __IDLOC0 0x200000
908 #define __IDLOC1 0x200001
909 #define __IDLOC2 0x200002
910 #define __IDLOC3 0x200003
911 #define __IDLOC4 0x200004
912 #define __IDLOC5 0x200005
913 #define __IDLOC6 0x200006
914 #define __IDLOC7 0x200007