2 // Register Declarations for Microchip 16F917 Processor
5 // This header file was automatically generated by:
9 // Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved
11 // SDCC is licensed under the GNU Public license (GPL) v2. Note that
12 // this license covers the code to the compiler and other executables,
13 // but explicitly does not cover any code or objects generated by sdcc.
14 // We have not yet decided on a license for the run time libraries, but
15 // it will not put any requirements on code linked against it. See:
17 // http://www.gnu.org/copyleft/gpl/html
19 // See http://sdcc.sourceforge.net/ for the latest information on sdcc.
26 // Register addresses.
28 #define INDF_ADDR 0x0000
29 #define TMR0_ADDR 0x0001
30 #define PCL_ADDR 0x0002
31 #define STATUS_ADDR 0x0003
32 #define FSR_ADDR 0x0004
33 #define PORTA_ADDR 0x0005
34 #define PORTB_ADDR 0x0006
35 #define PORTC_ADDR 0x0007
36 #define PORTD_ADDR 0x0008
37 #define PORTE_ADDR 0x0009
38 #define PCLATH_ADDR 0x000A
39 #define INTCON_ADDR 0x000B
40 #define PIR1_ADDR 0x000C
41 #define PIR2_ADDR 0x000D
42 #define TMR1L_ADDR 0x000E
43 #define TMR1H_ADDR 0x000F
44 #define T1CON_ADDR 0x0010
45 #define TMR2_ADDR 0x0011
46 #define T2CON_ADDR 0x0012
47 #define SSPBUF_ADDR 0x0013
48 #define SSPCON_ADDR 0x0014
49 #define CCPR1L_ADDR 0x0015
50 #define CCPR1H_ADDR 0x0016
51 #define CCP1CON_ADDR 0x0017
52 #define RCSTA_ADDR 0x0018
53 #define TXREG_ADDR 0x0019
54 #define RCREG_ADDR 0x001A
55 #define CCPR2L_ADDR 0x001B
56 #define CCPR2H_ADDR 0x001C
57 #define CCP2CON_ADDR 0x001D
58 #define ADRESH_ADDR 0x001E
59 #define ADCON0_ADDR 0x001F
60 #define OPTION_REG_ADDR 0x0081
61 #define TRISA_ADDR 0x0085
62 #define TRISB_ADDR 0x0086
63 #define TRISC_ADDR 0x0087
64 #define TRISD_ADDR 0x0088
65 #define TRISE_ADDR 0x0089
66 #define PIE1_ADDR 0x008C
67 #define PIE2_ADDR 0x008D
68 #define PCON_ADDR 0x008E
69 #define OSCCON_ADDR 0x008F
70 #define OSCTUNE_ADDR 0x0090
71 #define ANSEL_ADDR 0x0091
72 #define PR2_ADDR 0x0092
73 #define SSPADD_ADDR 0x0093
74 #define SSPSTAT_ADDR 0x0094
75 #define WPUB_ADDR 0x0095
76 #define WPU_ADDR 0x0095
77 #define IOCB_ADDR 0x0096
78 #define IOC_ADDR 0x0096
79 #define CMCON1_ADDR 0x0097
80 #define TXSTA_ADDR 0x0098
81 #define SPBRG_ADDR 0x0099
82 #define CMCON0_ADDR 0x009C
83 #define VRCON_ADDR 0x009D
84 #define ADRESL_ADDR 0x009E
85 #define ADCON1_ADDR 0x009F
86 #define WDTCON_ADDR 0x0105
87 #define LCDCON_ADDR 0x0107
88 #define LCDPS_ADDR 0x0108
89 #define LVDCON_ADDR 0x0109
90 #define EEDATL_ADDR 0x010C
91 #define EEADRL_ADDR 0x010D
92 #define EEDATH_ADDR 0x010E
93 #define EEADRH_ADDR 0x010F
94 #define LCDDATA0_ADDR 0x0110
95 #define LCDDATA1_ADDR 0x0111
96 #define LCDDATA2_ADDR 0x0112
97 #define LCDDATA3_ADDR 0x0113
98 #define LCDDATA4_ADDR 0x0114
99 #define LCDDATA5_ADDR 0x0115
100 #define LCDDATA6_ADDR 0x0116
101 #define LCDDATA7_ADDR 0x0117
102 #define LCDDATA8_ADDR 0x0118
103 #define LCDDATA9_ADDR 0x0119
104 #define LCDDATA10_ADDR 0x011A
105 #define LCDDATA11_ADDR 0x011B
106 #define LCDSE0_ADDR 0x011C
107 #define LCDSE1_ADDR 0x011D
108 #define LCDSE2_ADDR 0x011E
109 #define EECON1_ADDR 0x018C
110 #define EECON2_ADDR 0x018D
113 // Memory organization.
119 // P16F917.INC Standard Header File, Version 1.00 Microchip Technology, Inc.
122 // This header file defines configurations, registers, and other useful bits of
123 // information for the PIC16F917 microcontroller.
124 // These names are taken to match the data sheets as closely as possible.
126 // Note that the processor must be selected before this file is
127 // included. The processor may be selected the following ways:
129 // 1. Command line switch:
130 // C:\ MPASM MYFILE.ASM /PIC16F917
131 // 2. LIST directive in the source file
133 // 3. Processor Type entry in the MPASM full-screen interface
135 //==========================================================================
139 //==========================================================================
142 //1.00 06/11/04 Initial Release
143 //1.01 08/16/04 Added EECON2
146 //==========================================================================
150 //==========================================================================
153 // MESSG "Processor-header file mismatch. Verify selected processor."
156 //==========================================================================
158 // Register Definitions
160 //==========================================================================
165 //----- Register Files------------------------------------------------------
167 extern __data __at (INDF_ADDR) volatile char INDF;
168 extern __sfr __at (TMR0_ADDR) TMR0;
169 extern __data __at (PCL_ADDR) volatile char PCL;
170 extern __sfr __at (STATUS_ADDR) STATUS;
171 extern __sfr __at (FSR_ADDR) FSR;
172 extern __sfr __at (PORTA_ADDR) PORTA;
173 extern __sfr __at (PORTB_ADDR) PORTB;
174 extern __sfr __at (PORTC_ADDR) PORTC;
175 extern __sfr __at (PORTD_ADDR) PORTD;
176 extern __sfr __at (PORTE_ADDR) PORTE;
177 extern __sfr __at (PCLATH_ADDR) PCLATH;
178 extern __sfr __at (INTCON_ADDR) INTCON;
179 extern __sfr __at (PIR1_ADDR) PIR1;
180 extern __sfr __at (PIR2_ADDR) PIR2;
181 extern __sfr __at (TMR1L_ADDR) TMR1L;
182 extern __sfr __at (TMR1H_ADDR) TMR1H;
183 extern __sfr __at (T1CON_ADDR) T1CON;
184 extern __sfr __at (TMR2_ADDR) TMR2;
185 extern __sfr __at (T2CON_ADDR) T2CON;
186 extern __sfr __at (SSPBUF_ADDR) SSPBUF;
187 extern __sfr __at (SSPCON_ADDR) SSPCON;
188 extern __sfr __at (CCPR1L_ADDR) CCPR1L;
189 extern __sfr __at (CCPR1H_ADDR) CCPR1H;
190 extern __sfr __at (CCP1CON_ADDR) CCP1CON;
191 extern __sfr __at (RCSTA_ADDR) RCSTA;
192 extern __sfr __at (TXREG_ADDR) TXREG;
193 extern __sfr __at (RCREG_ADDR) RCREG;
194 extern __sfr __at (CCPR2L_ADDR) CCPR2L;
195 extern __sfr __at (CCPR2H_ADDR) CCPR2H;
196 extern __sfr __at (CCP2CON_ADDR) CCP2CON;
197 extern __sfr __at (ADRESH_ADDR) ADRESH;
198 extern __sfr __at (ADCON0_ADDR) ADCON0;
200 extern __sfr __at (OPTION_REG_ADDR) OPTION_REG;
201 extern __sfr __at (TRISA_ADDR) TRISA;
202 extern __sfr __at (TRISB_ADDR) TRISB;
203 extern __sfr __at (TRISC_ADDR) TRISC;
204 extern __sfr __at (TRISD_ADDR) TRISD;
205 extern __sfr __at (TRISE_ADDR) TRISE;
206 extern __sfr __at (PIE1_ADDR) PIE1;
207 extern __sfr __at (PIE2_ADDR) PIE2;
208 extern __sfr __at (PCON_ADDR) PCON;
209 extern __sfr __at (OSCCON_ADDR) OSCCON;
210 extern __sfr __at (OSCTUNE_ADDR) OSCTUNE;
211 extern __sfr __at (ANSEL_ADDR) ANSEL;
212 extern __sfr __at (PR2_ADDR) PR2;
213 extern __sfr __at (SSPADD_ADDR) SSPADD;
214 extern __sfr __at (SSPSTAT_ADDR) SSPSTAT;
215 extern __sfr __at (WPUB_ADDR) WPUB;
216 extern __sfr __at (WPU_ADDR) WPU;
217 extern __sfr __at (IOCB_ADDR) IOCB;
218 extern __sfr __at (IOC_ADDR) IOC;
219 extern __sfr __at (CMCON1_ADDR) CMCON1;
220 extern __sfr __at (TXSTA_ADDR) TXSTA;
221 extern __sfr __at (SPBRG_ADDR) SPBRG;
222 extern __sfr __at (CMCON0_ADDR) CMCON0;
223 extern __sfr __at (VRCON_ADDR) VRCON;
224 extern __sfr __at (ADRESL_ADDR) ADRESL;
225 extern __sfr __at (ADCON1_ADDR) ADCON1;
227 extern __sfr __at (WDTCON_ADDR) WDTCON;
228 extern __sfr __at (LCDCON_ADDR) LCDCON;
229 extern __sfr __at (LCDPS_ADDR) LCDPS;
230 extern __sfr __at (LVDCON_ADDR) LVDCON;
231 extern __sfr __at (EEDATL_ADDR) EEDATL;
232 extern __sfr __at (EEADRL_ADDR) EEADRL;
233 extern __sfr __at (EEDATH_ADDR) EEDATH;
234 extern __sfr __at (EEADRH_ADDR) EEADRH;
235 extern __sfr __at (LCDDATA0_ADDR) LCDDATA0;
236 extern __sfr __at (LCDDATA1_ADDR) LCDDATA1;
237 extern __sfr __at (LCDDATA2_ADDR) LCDDATA2;
238 extern __sfr __at (LCDDATA3_ADDR) LCDDATA3;
239 extern __sfr __at (LCDDATA4_ADDR) LCDDATA4;
240 extern __sfr __at (LCDDATA5_ADDR) LCDDATA5;
241 extern __sfr __at (LCDDATA6_ADDR) LCDDATA6;
242 extern __sfr __at (LCDDATA7_ADDR) LCDDATA7;
243 extern __sfr __at (LCDDATA8_ADDR) LCDDATA8;
244 extern __sfr __at (LCDDATA9_ADDR) LCDDATA9;
245 extern __sfr __at (LCDDATA10_ADDR) LCDDATA10;
246 extern __sfr __at (LCDDATA11_ADDR) LCDDATA11;
247 extern __sfr __at (LCDSE0_ADDR) LCDSE0;
248 extern __sfr __at (LCDSE1_ADDR) LCDSE1;
249 extern __sfr __at (LCDSE2_ADDR) LCDSE2;
251 extern __sfr __at (EECON1_ADDR) EECON1;
252 extern __sfr __at (EECON2_ADDR) EECON2;
255 //----- STATUS Bits --------------------------------------------------------
258 //----- INTCON Bits --------------------------------------------------------
261 //----- PIR1 Bits ----------------------------------------------------------
264 //----- PIR2 Bits ----------------------------------------------------------
267 //----- T1CON Bits ---------------------------------------------------------
270 //----- T2CON Bits ---------------------------------------------------------
273 //----- SSPCON Bits --------------------------------------------------------
276 //----- CCP1CON Bits -------------------------------------------------------
279 //----- RCSTA Bits ---------------------------------------------------------
282 //----- CCP2CON Bits -------------------------------------------------------
285 //----- ADCON0 Bits --------------------------------------------------------
288 //----- OPTION_REG Bits -----------------------------------------------------
291 //----- PIE1 Bits ----------------------------------------------------------
294 //----- PIE2 Bits ----------------------------------------------------------
297 //----- PCON Bits ----------------------------------------------------------
300 //----- OSCCON Bits -------------------------------------------------------
303 //----- OSCTUNE Bits -------------------------------------------------------
307 //----- ANSEL Bits ---------------------------------------------------------
311 //----- SSPSTAT Bits -------------------------------------------------------
315 //----- WPUB Bits -------------------------------------------------------
318 //----- WPU Bits -------------------------------------------------------
322 //----- IOCB Bits -------------------------------------------------------
326 //----- IOC Bits -------------------------------------------------------
330 //----- CMCON1 Bits --------------------------------------------------------
333 //----- TXSTA Bits ---------------------------------------------------------
337 //----- CMCON0 Bits ---------------------------------------------------------
340 //----- VRCON Bits --------------------------------------------------------
343 //----- ADCON1 Bits --------------------------------------------------------
346 //----- WDTCON Bits --------------------------------------------------------
349 //----- LCDCON Bits --------------------------------------------------------
352 //----- LCDPS Bits ---------------------------------------------------------
355 //----- LVDCON Bits --------------------------------------------------------
358 //----- LCDDAT0 Bits -------------------------------------------------------
362 //----- LCDDAT1 Bits -------------------------------------------------------
366 //----- LCDDAT2 Bits -------------------------------------------------------
370 //----- LCDDAT3 Bits -------------------------------------------------------
374 //----- LCDDAT4 Bits -------------------------------------------------------
378 //----- LCDDAT5 Bits -------------------------------------------------------
382 //----- LCDDAT6 Bits -------------------------------------------------------
386 //----- LCDDAT7 Bits -------------------------------------------------------
390 //----- LCDDAT8 Bits -------------------------------------------------------
394 //----- LCDDAT9 Bits -------------------------------------------------------
398 //----- LCDDAT10 Bits -------------------------------------------------------
402 //----- LCDDAT11 Bits -------------------------------------------------------
406 //----- LCDSE0 Bits --------------------------------------------------------
410 //----- LCDSE1 Bits --------------------------------------------------------
414 //----- LCDSE3 Bits --------------------------------------------------------
418 //----- EECON1 Bits --------------------------------------------------------
422 //==========================================================================
426 //==========================================================================
429 // __BADRAM H'9A'-H'9B'
431 // __BADRAM H'185', H'187'-H'189', H'18D'-H'18F'
433 //==========================================================================
435 // Configuration Bits
437 //==========================================================================
439 #define _CONFIG 0x2007
441 //Configuration Byte 1 Options
442 #define _DEBUG_ON 0x2FFF
443 #define _DEBUG_OFF 0x3FFF
444 #define _FCMEN_ON 0x3FFF
445 #define _FCMEN_OFF 0x37FF
446 #define _IESO_ON 0x3FFF
447 #define _IESO_OFF 0x3BFF
448 #define _BOD_ON 0x3FFF
449 #define _BOD_NSLEEP 0x3EFF
450 #define _BOD_SBODEN 0x3DFF
451 #define _BOD_OFF 0x3CFF
452 #define _CPD_ON 0x3F7F
453 #define _CPD_OFF 0x3FFF
454 #define _CP_ON 0x3FBF
455 #define _CP_OFF 0x3FFF
456 #define _MCLRE_ON 0x3FFF
457 #define _MCLRE_OFF 0x3FDF
458 #define _PWRTE_ON 0x3FEF
459 #define _PWRTE_OFF 0x3FFF
460 #define _WDT_ON 0x3FFF
461 #define _WDT_OFF 0x3FF7
462 #define _LP_OSC 0x3FF8
463 #define _XT_OSC 0x3FF9
464 #define _HS_OSC 0x3FFA
465 #define _EC_OSC 0x3FFB
466 #define _INTRC_OSC_NOCLKOUT 0x3FFC
467 #define _INTRC_OSC_CLKOUT 0x3FFD
468 #define _EXTRC_OSC_NOCLKOUT 0x3FFE
469 #define _EXTRC_OSC_CLKOUT 0x3FFF
470 #define _INTOSCIO 0x3FFC
471 #define _INTOSC 0x3FFD
472 #define _EXTRCIO 0x3FFE
473 #define _EXTRC 0x3FFF
478 // ----- ADCON0 bits --------------------
481 unsigned char ADON:1;
482 unsigned char NOT_DONE:1;
483 unsigned char CHS0:1;
484 unsigned char CHS1:1;
485 unsigned char CHS2:1;
486 unsigned char VCFG0:1;
487 unsigned char VCFG1:1;
488 unsigned char ADFM:1;
492 unsigned char GO_DONE:1;
501 extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits;
503 #define ADON ADCON0_bits.ADON
504 #define NOT_DONE ADCON0_bits.NOT_DONE
505 #define GO_DONE ADCON0_bits.GO_DONE
506 #define CHS0 ADCON0_bits.CHS0
507 #define CHS1 ADCON0_bits.CHS1
508 #define CHS2 ADCON0_bits.CHS2
509 #define VCFG0 ADCON0_bits.VCFG0
510 #define VCFG1 ADCON0_bits.VCFG1
511 #define ADFM ADCON0_bits.ADFM
513 // ----- ADCON1 bits --------------------
520 unsigned char ADCS0:1;
521 unsigned char ADCS1:1;
522 unsigned char ADCS2:1;
526 extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits;
528 #define ADCS0 ADCON1_bits.ADCS0
529 #define ADCS1 ADCON1_bits.ADCS1
530 #define ADCS2 ADCON1_bits.ADCS2
532 // ----- ANSEL bits --------------------
545 extern volatile __ANSEL_bits_t __at(ANSEL_ADDR) ANSEL_bits;
547 #define AN0 ANSEL_bits.AN0
548 #define AN1 ANSEL_bits.AN1
549 #define AN2 ANSEL_bits.AN2
550 #define AN3 ANSEL_bits.AN3
551 #define AN4 ANSEL_bits.AN4
552 #define AN5 ANSEL_bits.AN5
553 #define AN6 ANSEL_bits.AN6
554 #define AN7 ANSEL_bits.AN7
556 // ----- CCP1CON bits --------------------
559 unsigned char CCP1M0:1;
560 unsigned char CCP1M1:1;
561 unsigned char CCP1M2:1;
562 unsigned char CCP1M3:1;
563 unsigned char CCP1Y:1;
564 unsigned char CCP1X:1;
569 extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits;
571 #define CCP1M0 CCP1CON_bits.CCP1M0
572 #define CCP1M1 CCP1CON_bits.CCP1M1
573 #define CCP1M2 CCP1CON_bits.CCP1M2
574 #define CCP1M3 CCP1CON_bits.CCP1M3
575 #define CCP1Y CCP1CON_bits.CCP1Y
576 #define CCP1X CCP1CON_bits.CCP1X
578 // ----- CCP2CON bits --------------------
581 unsigned char CCP2M0:1;
582 unsigned char CCP2M1:1;
583 unsigned char CCP2M2:1;
584 unsigned char CCP2M3:1;
585 unsigned char CCP2Y:1;
586 unsigned char CCP2X:1;
591 extern volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits;
593 #define CCP2M0 CCP2CON_bits.CCP2M0
594 #define CCP2M1 CCP2CON_bits.CCP2M1
595 #define CCP2M2 CCP2CON_bits.CCP2M2
596 #define CCP2M3 CCP2CON_bits.CCP2M3
597 #define CCP2Y CCP2CON_bits.CCP2Y
598 #define CCP2X CCP2CON_bits.CCP2X
600 // ----- CMCON0 bits --------------------
607 unsigned char C1INV:1;
608 unsigned char C2INV:1;
609 unsigned char C1OUT:1;
610 unsigned char C2OUT:1;
613 extern volatile __CMCON0_bits_t __at(CMCON0_ADDR) CMCON0_bits;
615 #define CM0 CMCON0_bits.CM0
616 #define CM1 CMCON0_bits.CM1
617 #define CM2 CMCON0_bits.CM2
618 #define CIS CMCON0_bits.CIS
619 #define C1INV CMCON0_bits.C1INV
620 #define C2INV CMCON0_bits.C2INV
621 #define C1OUT CMCON0_bits.C1OUT
622 #define C2OUT CMCON0_bits.C2OUT
624 // ----- CMCON1 bits --------------------
627 unsigned char C2SYNC:1;
628 unsigned char T1GSS:1;
637 extern volatile __CMCON1_bits_t __at(CMCON1_ADDR) CMCON1_bits;
639 #define C2SYNC CMCON1_bits.C2SYNC
640 #define T1GSS CMCON1_bits.T1GSS
642 // ----- EECON1 bits --------------------
647 unsigned char WREN:1;
648 unsigned char WRERR:1;
652 unsigned char EEPGD:1;
655 unsigned char EERD:1;
656 unsigned char EEWR:1;
665 extern volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits;
667 #define RD EECON1_bits.RD
668 #define EERD EECON1_bits.EERD
669 #define WR EECON1_bits.WR
670 #define EEWR EECON1_bits.EEWR
671 #define WREN EECON1_bits.WREN
672 #define WRERR EECON1_bits.WRERR
673 #define EEPGD EECON1_bits.EEPGD
675 // ----- INTCON bits --------------------
678 unsigned char RBIF:1;
679 unsigned char INTF:1;
680 unsigned char T0IF:1;
681 unsigned char RBIE:1;
682 unsigned char INTE:1;
683 unsigned char T0IE:1;
684 unsigned char PEIE:1;
690 unsigned char TMR0IF:1;
693 unsigned char TMR0IE:1;
698 extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits;
700 #define RBIF INTCON_bits.RBIF
701 #define INTF INTCON_bits.INTF
702 #define T0IF INTCON_bits.T0IF
703 #define TMR0IF INTCON_bits.TMR0IF
704 #define RBIE INTCON_bits.RBIE
705 #define INTE INTCON_bits.INTE
706 #define T0IE INTCON_bits.T0IE
707 #define TMR0IE INTCON_bits.TMR0IE
708 #define PEIE INTCON_bits.PEIE
709 #define GIE INTCON_bits.GIE
711 // ----- IOC bits --------------------
718 unsigned char IOC4:1;
719 unsigned char IOC5:1;
720 unsigned char IOC6:1;
721 unsigned char IOC7:1;
724 extern volatile __IOC_bits_t __at(IOC_ADDR) IOC_bits;
726 #define IOC4 IOC_bits.IOC4
727 #define IOC5 IOC_bits.IOC5
728 #define IOC6 IOC_bits.IOC6
729 #define IOC7 IOC_bits.IOC7
731 // ----- IOCB bits --------------------
738 unsigned char IOCB4:1;
739 unsigned char IOCB5:1;
740 unsigned char IOCB6:1;
741 unsigned char IOCB7:1;
744 extern volatile __IOCB_bits_t __at(IOCB_ADDR) IOCB_bits;
746 #define IOCB4 IOCB_bits.IOCB4
747 #define IOCB5 IOCB_bits.IOCB5
748 #define IOCB6 IOCB_bits.IOCB6
749 #define IOCB7 IOCB_bits.IOCB7
751 // ----- LCDCON bits --------------------
754 unsigned char LMUX0:1;
755 unsigned char LMUX1:1;
758 unsigned char VLCDEN:1;
759 unsigned char WERR:1;
760 unsigned char SLPEN:1;
761 unsigned char LCDEN:1;
764 extern volatile __LCDCON_bits_t __at(LCDCON_ADDR) LCDCON_bits;
766 #define LMUX0 LCDCON_bits.LMUX0
767 #define LMUX1 LCDCON_bits.LMUX1
768 #define CS0 LCDCON_bits.CS0
769 #define CS1 LCDCON_bits.CS1
770 #define VLCDEN LCDCON_bits.VLCDEN
771 #define WERR LCDCON_bits.WERR
772 #define SLPEN LCDCON_bits.SLPEN
773 #define LCDEN LCDCON_bits.LCDEN
775 // ----- LCDDATA0 bits --------------------
778 unsigned char SEG0COM0:1;
779 unsigned char SEG1COM0:1;
780 unsigned char SEG2COM0:1;
781 unsigned char SEG3COM0:1;
782 unsigned char SEG4COM0:1;
783 unsigned char SEG5COM0:1;
784 unsigned char SEG6COM0:1;
785 unsigned char SEG7COM0:1;
788 unsigned char S0C0:1;
789 unsigned char S1C0:1;
790 unsigned char S2C0:1;
791 unsigned char S3C0:1;
792 unsigned char S4C0:1;
793 unsigned char S5C0:1;
794 unsigned char S6C0:1;
795 unsigned char S7C0:1;
798 extern volatile __LCDDATA0_bits_t __at(LCDDATA0_ADDR) LCDDATA0_bits;
800 #define SEG0COM0 LCDDATA0_bits.SEG0COM0
801 #define S0C0 LCDDATA0_bits.S0C0
802 #define SEG1COM0 LCDDATA0_bits.SEG1COM0
803 #define S1C0 LCDDATA0_bits.S1C0
804 #define SEG2COM0 LCDDATA0_bits.SEG2COM0
805 #define S2C0 LCDDATA0_bits.S2C0
806 #define SEG3COM0 LCDDATA0_bits.SEG3COM0
807 #define S3C0 LCDDATA0_bits.S3C0
808 #define SEG4COM0 LCDDATA0_bits.SEG4COM0
809 #define S4C0 LCDDATA0_bits.S4C0
810 #define SEG5COM0 LCDDATA0_bits.SEG5COM0
811 #define S5C0 LCDDATA0_bits.S5C0
812 #define SEG6COM0 LCDDATA0_bits.SEG6COM0
813 #define S6C0 LCDDATA0_bits.S6C0
814 #define SEG7COM0 LCDDATA0_bits.SEG7COM0
815 #define S7C0 LCDDATA0_bits.S7C0
817 // ----- LCDDATA1 bits --------------------
820 unsigned char SEG8COM0:1;
821 unsigned char SEG9COM0:1;
822 unsigned char SEG10COM0:1;
823 unsigned char SEG11COM0:1;
824 unsigned char SEG12COM0:1;
825 unsigned char SEG13COM0:1;
826 unsigned char SEG14COM0:1;
827 unsigned char SEG15COM0:1;
830 unsigned char S8C0:1;
831 unsigned char S9C0:1;
832 unsigned char S10C0:1;
833 unsigned char S11C0:1;
834 unsigned char S12C0:1;
835 unsigned char S13C0:1;
836 unsigned char S14C0:1;
837 unsigned char S15C0:1;
840 extern volatile __LCDDATA1_bits_t __at(LCDDATA1_ADDR) LCDDATA1_bits;
842 #define SEG8COM0 LCDDATA1_bits.SEG8COM0
843 #define S8C0 LCDDATA1_bits.S8C0
844 #define SEG9COM0 LCDDATA1_bits.SEG9COM0
845 #define S9C0 LCDDATA1_bits.S9C0
846 #define SEG10COM0 LCDDATA1_bits.SEG10COM0
847 #define S10C0 LCDDATA1_bits.S10C0
848 #define SEG11COM0 LCDDATA1_bits.SEG11COM0
849 #define S11C0 LCDDATA1_bits.S11C0
850 #define SEG12COM0 LCDDATA1_bits.SEG12COM0
851 #define S12C0 LCDDATA1_bits.S12C0
852 #define SEG13COM0 LCDDATA1_bits.SEG13COM0
853 #define S13C0 LCDDATA1_bits.S13C0
854 #define SEG14COM0 LCDDATA1_bits.SEG14COM0
855 #define S14C0 LCDDATA1_bits.S14C0
856 #define SEG15COM0 LCDDATA1_bits.SEG15COM0
857 #define S15C0 LCDDATA1_bits.S15C0
859 // ----- LCDDATA10 bits --------------------
862 unsigned char SEG8COM3:1;
863 unsigned char SEG9COM3:1;
864 unsigned char SEG10COM3:1;
865 unsigned char SEG11COM3:1;
866 unsigned char SEG12COM3:1;
867 unsigned char SEG13COM3:1;
868 unsigned char SEG14COM3:1;
869 unsigned char SEG15COM3:1;
872 unsigned char S8C3:1;
873 unsigned char S9C3:1;
874 unsigned char S10C3:1;
875 unsigned char S11C3:1;
876 unsigned char S12C3:1;
877 unsigned char S13C3:1;
878 unsigned char S14C3:1;
879 unsigned char S15C3:1;
881 } __LCDDATA10_bits_t;
882 extern volatile __LCDDATA10_bits_t __at(LCDDATA10_ADDR) LCDDATA10_bits;
884 #define SEG8COM3 LCDDATA10_bits.SEG8COM3
885 #define S8C3 LCDDATA10_bits.S8C3
886 #define SEG9COM3 LCDDATA10_bits.SEG9COM3
887 #define S9C3 LCDDATA10_bits.S9C3
888 #define SEG10COM3 LCDDATA10_bits.SEG10COM3
889 #define S10C3 LCDDATA10_bits.S10C3
890 #define SEG11COM3 LCDDATA10_bits.SEG11COM3
891 #define S11C3 LCDDATA10_bits.S11C3
892 #define SEG12COM3 LCDDATA10_bits.SEG12COM3
893 #define S12C3 LCDDATA10_bits.S12C3
894 #define SEG13COM3 LCDDATA10_bits.SEG13COM3
895 #define S13C3 LCDDATA10_bits.S13C3
896 #define SEG14COM3 LCDDATA10_bits.SEG14COM3
897 #define S14C3 LCDDATA10_bits.S14C3
898 #define SEG15COM3 LCDDATA10_bits.SEG15COM3
899 #define S15C3 LCDDATA10_bits.S15C3
901 // ----- LCDDATA11 bits --------------------
904 unsigned char SEG16COM3:1;
905 unsigned char SEG17COM3:1;
906 unsigned char SEG18COM3:1;
907 unsigned char SEG19COM3:1;
908 unsigned char SEG20COM3:1;
909 unsigned char SEG21COM3:1;
910 unsigned char SEG22COM3:1;
911 unsigned char SEG23COM3:1;
914 unsigned char S16C3:1;
915 unsigned char S17C3:1;
916 unsigned char S18C3:1;
917 unsigned char S19C3:1;
918 unsigned char S20C3:1;
919 unsigned char S21C3:1;
920 unsigned char S22C3:1;
921 unsigned char S23C3:1;
923 } __LCDDATA11_bits_t;
924 extern volatile __LCDDATA11_bits_t __at(LCDDATA11_ADDR) LCDDATA11_bits;
926 #define SEG16COM3 LCDDATA11_bits.SEG16COM3
927 #define S16C3 LCDDATA11_bits.S16C3
928 #define SEG17COM3 LCDDATA11_bits.SEG17COM3
929 #define S17C3 LCDDATA11_bits.S17C3
930 #define SEG18COM3 LCDDATA11_bits.SEG18COM3
931 #define S18C3 LCDDATA11_bits.S18C3
932 #define SEG19COM3 LCDDATA11_bits.SEG19COM3
933 #define S19C3 LCDDATA11_bits.S19C3
934 #define SEG20COM3 LCDDATA11_bits.SEG20COM3
935 #define S20C3 LCDDATA11_bits.S20C3
936 #define SEG21COM3 LCDDATA11_bits.SEG21COM3
937 #define S21C3 LCDDATA11_bits.S21C3
938 #define SEG22COM3 LCDDATA11_bits.SEG22COM3
939 #define S22C3 LCDDATA11_bits.S22C3
940 #define SEG23COM3 LCDDATA11_bits.SEG23COM3
941 #define S23C3 LCDDATA11_bits.S23C3
943 // ----- LCDDATA2 bits --------------------
946 unsigned char SEG16COM0:1;
947 unsigned char SEG17COM0:1;
948 unsigned char SEG18COM0:1;
949 unsigned char SEG19COM0:1;
950 unsigned char SEG20COM0:1;
951 unsigned char SEG21COM0:1;
952 unsigned char SEG22COM0:1;
953 unsigned char SEG23COM0:1;
956 unsigned char S16C0:1;
957 unsigned char S17C0:1;
958 unsigned char S18C0:1;
959 unsigned char S19C0:1;
960 unsigned char S20C0:1;
961 unsigned char S21C0:1;
962 unsigned char S22C0:1;
963 unsigned char S23C0:1;
966 extern volatile __LCDDATA2_bits_t __at(LCDDATA2_ADDR) LCDDATA2_bits;
968 #define SEG16COM0 LCDDATA2_bits.SEG16COM0
969 #define S16C0 LCDDATA2_bits.S16C0
970 #define SEG17COM0 LCDDATA2_bits.SEG17COM0
971 #define S17C0 LCDDATA2_bits.S17C0
972 #define SEG18COM0 LCDDATA2_bits.SEG18COM0
973 #define S18C0 LCDDATA2_bits.S18C0
974 #define SEG19COM0 LCDDATA2_bits.SEG19COM0
975 #define S19C0 LCDDATA2_bits.S19C0
976 #define SEG20COM0 LCDDATA2_bits.SEG20COM0
977 #define S20C0 LCDDATA2_bits.S20C0
978 #define SEG21COM0 LCDDATA2_bits.SEG21COM0
979 #define S21C0 LCDDATA2_bits.S21C0
980 #define SEG22COM0 LCDDATA2_bits.SEG22COM0
981 #define S22C0 LCDDATA2_bits.S22C0
982 #define SEG23COM0 LCDDATA2_bits.SEG23COM0
983 #define S23C0 LCDDATA2_bits.S23C0
985 // ----- LCDDATA3 bits --------------------
988 unsigned char SEG0COM1:1;
989 unsigned char SEG1COM1:1;
990 unsigned char SEG2COM1:1;
991 unsigned char SEG3COM1:1;
992 unsigned char SEG4COM1:1;
993 unsigned char SEG5COM1:1;
994 unsigned char SEG6COM1:1;
995 unsigned char SEG7COM1:1;
998 unsigned char S0C1:1;
999 unsigned char S1C1:1;
1000 unsigned char S2C1:1;
1001 unsigned char S3C1:1;
1002 unsigned char S4C1:1;
1003 unsigned char S5C1:1;
1004 unsigned char S6C1:1;
1005 unsigned char S7C1:1;
1007 } __LCDDATA3_bits_t;
1008 extern volatile __LCDDATA3_bits_t __at(LCDDATA3_ADDR) LCDDATA3_bits;
1010 #define SEG0COM1 LCDDATA3_bits.SEG0COM1
1011 #define S0C1 LCDDATA3_bits.S0C1
1012 #define SEG1COM1 LCDDATA3_bits.SEG1COM1
1013 #define S1C1 LCDDATA3_bits.S1C1
1014 #define SEG2COM1 LCDDATA3_bits.SEG2COM1
1015 #define S2C1 LCDDATA3_bits.S2C1
1016 #define SEG3COM1 LCDDATA3_bits.SEG3COM1
1017 #define S3C1 LCDDATA3_bits.S3C1
1018 #define SEG4COM1 LCDDATA3_bits.SEG4COM1
1019 #define S4C1 LCDDATA3_bits.S4C1
1020 #define SEG5COM1 LCDDATA3_bits.SEG5COM1
1021 #define S5C1 LCDDATA3_bits.S5C1
1022 #define SEG6COM1 LCDDATA3_bits.SEG6COM1
1023 #define S6C1 LCDDATA3_bits.S6C1
1024 #define SEG7COM1 LCDDATA3_bits.SEG7COM1
1025 #define S7C1 LCDDATA3_bits.S7C1
1027 // ----- LCDDATA4 bits --------------------
1030 unsigned char SEG8COM1:1;
1031 unsigned char SEG9COM1:1;
1032 unsigned char SEG10COM1:1;
1033 unsigned char SEG11COM1:1;
1034 unsigned char SEG12COM1:1;
1035 unsigned char SEG13COM1:1;
1036 unsigned char SEG14COM1:1;
1037 unsigned char SEG15COM1:1;
1040 unsigned char S8C1:1;
1041 unsigned char S9C1:1;
1042 unsigned char S10C1:1;
1043 unsigned char S11C1:1;
1044 unsigned char S12C1:1;
1045 unsigned char S13C1:1;
1046 unsigned char S14C1:1;
1047 unsigned char S15C1:1;
1049 } __LCDDATA4_bits_t;
1050 extern volatile __LCDDATA4_bits_t __at(LCDDATA4_ADDR) LCDDATA4_bits;
1052 #define SEG8COM1 LCDDATA4_bits.SEG8COM1
1053 #define S8C1 LCDDATA4_bits.S8C1
1054 #define SEG9COM1 LCDDATA4_bits.SEG9COM1
1055 #define S9C1 LCDDATA4_bits.S9C1
1056 #define SEG10COM1 LCDDATA4_bits.SEG10COM1
1057 #define S10C1 LCDDATA4_bits.S10C1
1058 #define SEG11COM1 LCDDATA4_bits.SEG11COM1
1059 #define S11C1 LCDDATA4_bits.S11C1
1060 #define SEG12COM1 LCDDATA4_bits.SEG12COM1
1061 #define S12C1 LCDDATA4_bits.S12C1
1062 #define SEG13COM1 LCDDATA4_bits.SEG13COM1
1063 #define S13C1 LCDDATA4_bits.S13C1
1064 #define SEG14COM1 LCDDATA4_bits.SEG14COM1
1065 #define S14C1 LCDDATA4_bits.S14C1
1066 #define SEG15COM1 LCDDATA4_bits.SEG15COM1
1067 #define S15C1 LCDDATA4_bits.S15C1
1069 // ----- LCDDATA5 bits --------------------
1072 unsigned char SEG16COM1:1;
1073 unsigned char SEG17COM1:1;
1074 unsigned char SEG18COM1:1;
1075 unsigned char SEG19COM1:1;
1076 unsigned char SEG20COM1:1;
1077 unsigned char SEG21COM1:1;
1078 unsigned char SEG22COM1:1;
1079 unsigned char SEG23COM1:1;
1082 unsigned char S16C1:1;
1083 unsigned char S17C1:1;
1084 unsigned char S18C1:1;
1085 unsigned char S19C1:1;
1086 unsigned char S20C1:1;
1087 unsigned char S21C1:1;
1088 unsigned char S22C1:1;
1089 unsigned char S23C1:1;
1091 } __LCDDATA5_bits_t;
1092 extern volatile __LCDDATA5_bits_t __at(LCDDATA5_ADDR) LCDDATA5_bits;
1094 #define SEG16COM1 LCDDATA5_bits.SEG16COM1
1095 #define S16C1 LCDDATA5_bits.S16C1
1096 #define SEG17COM1 LCDDATA5_bits.SEG17COM1
1097 #define S17C1 LCDDATA5_bits.S17C1
1098 #define SEG18COM1 LCDDATA5_bits.SEG18COM1
1099 #define S18C1 LCDDATA5_bits.S18C1
1100 #define SEG19COM1 LCDDATA5_bits.SEG19COM1
1101 #define S19C1 LCDDATA5_bits.S19C1
1102 #define SEG20COM1 LCDDATA5_bits.SEG20COM1
1103 #define S20C1 LCDDATA5_bits.S20C1
1104 #define SEG21COM1 LCDDATA5_bits.SEG21COM1
1105 #define S21C1 LCDDATA5_bits.S21C1
1106 #define SEG22COM1 LCDDATA5_bits.SEG22COM1
1107 #define S22C1 LCDDATA5_bits.S22C1
1108 #define SEG23COM1 LCDDATA5_bits.SEG23COM1
1109 #define S23C1 LCDDATA5_bits.S23C1
1111 // ----- LCDDATA6 bits --------------------
1114 unsigned char SEG0COM2:1;
1115 unsigned char SEG1COM2:1;
1116 unsigned char SEG2COM2:1;
1117 unsigned char SEG3COM2:1;
1118 unsigned char SEG4COM2:1;
1119 unsigned char SEG5COM2:1;
1120 unsigned char SEG6COM2:1;
1121 unsigned char SEG7COM2:1;
1124 unsigned char S0C2:1;
1125 unsigned char S1C2:1;
1126 unsigned char S2C2:1;
1127 unsigned char S3C2:1;
1128 unsigned char S4C2:1;
1129 unsigned char S5C2:1;
1130 unsigned char S6C2:1;
1131 unsigned char S7C2:1;
1133 } __LCDDATA6_bits_t;
1134 extern volatile __LCDDATA6_bits_t __at(LCDDATA6_ADDR) LCDDATA6_bits;
1136 #define SEG0COM2 LCDDATA6_bits.SEG0COM2
1137 #define S0C2 LCDDATA6_bits.S0C2
1138 #define SEG1COM2 LCDDATA6_bits.SEG1COM2
1139 #define S1C2 LCDDATA6_bits.S1C2
1140 #define SEG2COM2 LCDDATA6_bits.SEG2COM2
1141 #define S2C2 LCDDATA6_bits.S2C2
1142 #define SEG3COM2 LCDDATA6_bits.SEG3COM2
1143 #define S3C2 LCDDATA6_bits.S3C2
1144 #define SEG4COM2 LCDDATA6_bits.SEG4COM2
1145 #define S4C2 LCDDATA6_bits.S4C2
1146 #define SEG5COM2 LCDDATA6_bits.SEG5COM2
1147 #define S5C2 LCDDATA6_bits.S5C2
1148 #define SEG6COM2 LCDDATA6_bits.SEG6COM2
1149 #define S6C2 LCDDATA6_bits.S6C2
1150 #define SEG7COM2 LCDDATA6_bits.SEG7COM2
1151 #define S7C2 LCDDATA6_bits.S7C2
1153 // ----- LCDDATA7 bits --------------------
1156 unsigned char SEG8COM2:1;
1157 unsigned char SEG9COM2:1;
1158 unsigned char SEG10COM2:1;
1159 unsigned char SEG11COM2:1;
1160 unsigned char SEG12COM2:1;
1161 unsigned char SEG13COM2:1;
1162 unsigned char SEG14COM2:1;
1163 unsigned char SEG15COM2:1;
1166 unsigned char S8C2:1;
1167 unsigned char S9C2:1;
1168 unsigned char S10C2:1;
1169 unsigned char S11C2:1;
1170 unsigned char S12C2:1;
1171 unsigned char S13C2:1;
1172 unsigned char S14C2:1;
1173 unsigned char S15C2:1;
1175 } __LCDDATA7_bits_t;
1176 extern volatile __LCDDATA7_bits_t __at(LCDDATA7_ADDR) LCDDATA7_bits;
1178 #define SEG8COM2 LCDDATA7_bits.SEG8COM2
1179 #define S8C2 LCDDATA7_bits.S8C2
1180 #define SEG9COM2 LCDDATA7_bits.SEG9COM2
1181 #define S9C2 LCDDATA7_bits.S9C2
1182 #define SEG10COM2 LCDDATA7_bits.SEG10COM2
1183 #define S10C2 LCDDATA7_bits.S10C2
1184 #define SEG11COM2 LCDDATA7_bits.SEG11COM2
1185 #define S11C2 LCDDATA7_bits.S11C2
1186 #define SEG12COM2 LCDDATA7_bits.SEG12COM2
1187 #define S12C2 LCDDATA7_bits.S12C2
1188 #define SEG13COM2 LCDDATA7_bits.SEG13COM2
1189 #define S13C2 LCDDATA7_bits.S13C2
1190 #define SEG14COM2 LCDDATA7_bits.SEG14COM2
1191 #define S14C2 LCDDATA7_bits.S14C2
1192 #define SEG15COM2 LCDDATA7_bits.SEG15COM2
1193 #define S15C2 LCDDATA7_bits.S15C2
1195 // ----- LCDDATA8 bits --------------------
1198 unsigned char SEG16COM2:1;
1199 unsigned char SEG17COM2:1;
1200 unsigned char SEG18COM2:1;
1201 unsigned char SEG19COM2:1;
1202 unsigned char SEG20COM2:1;
1203 unsigned char SEG21COM2:1;
1204 unsigned char SEG22COM2:1;
1205 unsigned char SEG23COM2:1;
1208 unsigned char S16C2:1;
1209 unsigned char S17C2:1;
1210 unsigned char S18C2:1;
1211 unsigned char S19C2:1;
1212 unsigned char S20C2:1;
1213 unsigned char S21C2:1;
1214 unsigned char S22C2:1;
1215 unsigned char S23C2:1;
1217 } __LCDDATA8_bits_t;
1218 extern volatile __LCDDATA8_bits_t __at(LCDDATA8_ADDR) LCDDATA8_bits;
1220 #define SEG16COM2 LCDDATA8_bits.SEG16COM2
1221 #define S16C2 LCDDATA8_bits.S16C2
1222 #define SEG17COM2 LCDDATA8_bits.SEG17COM2
1223 #define S17C2 LCDDATA8_bits.S17C2
1224 #define SEG18COM2 LCDDATA8_bits.SEG18COM2
1225 #define S18C2 LCDDATA8_bits.S18C2
1226 #define SEG19COM2 LCDDATA8_bits.SEG19COM2
1227 #define S19C2 LCDDATA8_bits.S19C2
1228 #define SEG20COM2 LCDDATA8_bits.SEG20COM2
1229 #define S20C2 LCDDATA8_bits.S20C2
1230 #define SEG21COM2 LCDDATA8_bits.SEG21COM2
1231 #define S21C2 LCDDATA8_bits.S21C2
1232 #define SEG22COM2 LCDDATA8_bits.SEG22COM2
1233 #define S22C2 LCDDATA8_bits.S22C2
1234 #define SEG23COM2 LCDDATA8_bits.SEG23COM2
1235 #define S23C2 LCDDATA8_bits.S23C2
1237 // ----- LCDDATA9 bits --------------------
1240 unsigned char SEG0COM3:1;
1241 unsigned char SEG1COM3:1;
1242 unsigned char SEG2COM3:1;
1243 unsigned char SEG3COM3:1;
1244 unsigned char SEG4COM3:1;
1245 unsigned char SEG5COM3:1;
1246 unsigned char SEG6COM3:1;
1247 unsigned char SEG7COM3:1;
1250 unsigned char S0C3:1;
1251 unsigned char S1C3:1;
1252 unsigned char S2C3:1;
1253 unsigned char S3C3:1;
1254 unsigned char S4C3:1;
1255 unsigned char S5C3:1;
1256 unsigned char S6C3:1;
1257 unsigned char S7C3:1;
1259 } __LCDDATA9_bits_t;
1260 extern volatile __LCDDATA9_bits_t __at(LCDDATA9_ADDR) LCDDATA9_bits;
1262 #define SEG0COM3 LCDDATA9_bits.SEG0COM3
1263 #define S0C3 LCDDATA9_bits.S0C3
1264 #define SEG1COM3 LCDDATA9_bits.SEG1COM3
1265 #define S1C3 LCDDATA9_bits.S1C3
1266 #define SEG2COM3 LCDDATA9_bits.SEG2COM3
1267 #define S2C3 LCDDATA9_bits.S2C3
1268 #define SEG3COM3 LCDDATA9_bits.SEG3COM3
1269 #define S3C3 LCDDATA9_bits.S3C3
1270 #define SEG4COM3 LCDDATA9_bits.SEG4COM3
1271 #define S4C3 LCDDATA9_bits.S4C3
1272 #define SEG5COM3 LCDDATA9_bits.SEG5COM3
1273 #define S5C3 LCDDATA9_bits.S5C3
1274 #define SEG6COM3 LCDDATA9_bits.SEG6COM3
1275 #define S6C3 LCDDATA9_bits.S6C3
1276 #define SEG7COM3 LCDDATA9_bits.SEG7COM3
1277 #define S7C3 LCDDATA9_bits.S7C3
1279 // ----- LCDPS bits --------------------
1282 unsigned char LP0:1;
1283 unsigned char LP1:1;
1284 unsigned char LP2:1;
1285 unsigned char LP3:1;
1287 unsigned char LCDA:1;
1288 unsigned char BIASMD:1;
1289 unsigned char WFT:1;
1292 extern volatile __LCDPS_bits_t __at(LCDPS_ADDR) LCDPS_bits;
1294 #define LP0 LCDPS_bits.LP0
1295 #define LP1 LCDPS_bits.LP1
1296 #define LP2 LCDPS_bits.LP2
1297 #define LP3 LCDPS_bits.LP3
1298 #define WA LCDPS_bits.WA
1299 #define LCDA LCDPS_bits.LCDA
1300 #define BIASMD LCDPS_bits.BIASMD
1301 #define WFT LCDPS_bits.WFT
1303 // ----- LCDSE0 bits --------------------
1306 unsigned char SE0:1;
1307 unsigned char SE1:1;
1308 unsigned char SE2:1;
1309 unsigned char SE3:1;
1310 unsigned char SE4:1;
1311 unsigned char SE5:1;
1312 unsigned char SE6:1;
1313 unsigned char SE7:1;
1316 unsigned char SEGEN0:1;
1317 unsigned char SEGEN1:1;
1318 unsigned char SEGEN2:1;
1319 unsigned char SEGEN3:1;
1320 unsigned char SEGEN4:1;
1321 unsigned char SEGEN5:1;
1322 unsigned char SEGEN6:1;
1323 unsigned char SEGEN7:1;
1326 extern volatile __LCDSE0_bits_t __at(LCDSE0_ADDR) LCDSE0_bits;
1328 #define SE0 LCDSE0_bits.SE0
1329 #define SEGEN0 LCDSE0_bits.SEGEN0
1330 #define SE1 LCDSE0_bits.SE1
1331 #define SEGEN1 LCDSE0_bits.SEGEN1
1332 #define SE2 LCDSE0_bits.SE2
1333 #define SEGEN2 LCDSE0_bits.SEGEN2
1334 #define SE3 LCDSE0_bits.SE3
1335 #define SEGEN3 LCDSE0_bits.SEGEN3
1336 #define SE4 LCDSE0_bits.SE4
1337 #define SEGEN4 LCDSE0_bits.SEGEN4
1338 #define SE5 LCDSE0_bits.SE5
1339 #define SEGEN5 LCDSE0_bits.SEGEN5
1340 #define SE6 LCDSE0_bits.SE6
1341 #define SEGEN6 LCDSE0_bits.SEGEN6
1342 #define SE7 LCDSE0_bits.SE7
1343 #define SEGEN7 LCDSE0_bits.SEGEN7
1345 // ----- LCDSE1 bits --------------------
1348 unsigned char SE8:1;
1349 unsigned char SE9:1;
1350 unsigned char SE10:1;
1351 unsigned char SE11:1;
1352 unsigned char SE12:1;
1353 unsigned char SE13:1;
1354 unsigned char SE14:1;
1355 unsigned char SE15:1;
1358 unsigned char SEGEN8:1;
1359 unsigned char SEGEN9:1;
1360 unsigned char SEGEN10:1;
1361 unsigned char SEGEN11:1;
1362 unsigned char SEGEN12:1;
1363 unsigned char SEGEN13:1;
1364 unsigned char SEGEN14:1;
1365 unsigned char SEGEN15:1;
1368 extern volatile __LCDSE1_bits_t __at(LCDSE1_ADDR) LCDSE1_bits;
1370 #define SE8 LCDSE1_bits.SE8
1371 #define SEGEN8 LCDSE1_bits.SEGEN8
1372 #define SE9 LCDSE1_bits.SE9
1373 #define SEGEN9 LCDSE1_bits.SEGEN9
1374 #define SE10 LCDSE1_bits.SE10
1375 #define SEGEN10 LCDSE1_bits.SEGEN10
1376 #define SE11 LCDSE1_bits.SE11
1377 #define SEGEN11 LCDSE1_bits.SEGEN11
1378 #define SE12 LCDSE1_bits.SE12
1379 #define SEGEN12 LCDSE1_bits.SEGEN12
1380 #define SE13 LCDSE1_bits.SE13
1381 #define SEGEN13 LCDSE1_bits.SEGEN13
1382 #define SE14 LCDSE1_bits.SE14
1383 #define SEGEN14 LCDSE1_bits.SEGEN14
1384 #define SE15 LCDSE1_bits.SE15
1385 #define SEGEN15 LCDSE1_bits.SEGEN15
1387 // ----- LCDSE2 bits --------------------
1390 unsigned char SE16:1;
1391 unsigned char SE17:1;
1392 unsigned char SE18:1;
1393 unsigned char SE19:1;
1394 unsigned char SE20:1;
1395 unsigned char SE21:1;
1396 unsigned char SE22:1;
1397 unsigned char SE23:1;
1400 unsigned char SEGEN16:1;
1401 unsigned char SEGEN17:1;
1402 unsigned char SEGEN18:1;
1403 unsigned char SEGEN19:1;
1404 unsigned char SEGEN20:1;
1405 unsigned char SEGEN21:1;
1406 unsigned char SEGEN22:1;
1407 unsigned char SEGEN23:1;
1410 extern volatile __LCDSE2_bits_t __at(LCDSE2_ADDR) LCDSE2_bits;
1412 #define SE16 LCDSE2_bits.SE16
1413 #define SEGEN16 LCDSE2_bits.SEGEN16
1414 #define SE17 LCDSE2_bits.SE17
1415 #define SEGEN17 LCDSE2_bits.SEGEN17
1416 #define SE18 LCDSE2_bits.SE18
1417 #define SEGEN18 LCDSE2_bits.SEGEN18
1418 #define SE19 LCDSE2_bits.SE19
1419 #define SEGEN19 LCDSE2_bits.SEGEN19
1420 #define SE20 LCDSE2_bits.SE20
1421 #define SEGEN20 LCDSE2_bits.SEGEN20
1422 #define SE21 LCDSE2_bits.SE21
1423 #define SEGEN21 LCDSE2_bits.SEGEN21
1424 #define SE22 LCDSE2_bits.SE22
1425 #define SEGEN22 LCDSE2_bits.SEGEN22
1426 #define SE23 LCDSE2_bits.SE23
1427 #define SEGEN23 LCDSE2_bits.SEGEN23
1429 // ----- LVDCON bits --------------------
1432 unsigned char LVDL0:1;
1433 unsigned char LVDL1:1;
1434 unsigned char LVDL2:1;
1436 unsigned char LVDEN:1;
1437 unsigned char IRVST:1;
1442 extern volatile __LVDCON_bits_t __at(LVDCON_ADDR) LVDCON_bits;
1444 #define LVDL0 LVDCON_bits.LVDL0
1445 #define LVDL1 LVDCON_bits.LVDL1
1446 #define LVDL2 LVDCON_bits.LVDL2
1447 #define LVDEN LVDCON_bits.LVDEN
1448 #define IRVST LVDCON_bits.IRVST
1450 // ----- OPTION_REG bits --------------------
1453 unsigned char PS0:1;
1454 unsigned char PS1:1;
1455 unsigned char PS2:1;
1456 unsigned char PSA:1;
1457 unsigned char T0SE:1;
1458 unsigned char T0CS:1;
1459 unsigned char INTEDG:1;
1460 unsigned char NOT_RBPU:1;
1462 } __OPTION_REG_bits_t;
1463 extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits;
1465 #define PS0 OPTION_REG_bits.PS0
1466 #define PS1 OPTION_REG_bits.PS1
1467 #define PS2 OPTION_REG_bits.PS2
1468 #define PSA OPTION_REG_bits.PSA
1469 #define T0SE OPTION_REG_bits.T0SE
1470 #define T0CS OPTION_REG_bits.T0CS
1471 #define INTEDG OPTION_REG_bits.INTEDG
1472 #define NOT_RBPU OPTION_REG_bits.NOT_RBPU
1474 // ----- OSCCON bits --------------------
1477 unsigned char SCS:1;
1478 unsigned char LTS:1;
1479 unsigned char HTS:1;
1480 unsigned char OSTS:1;
1481 unsigned char IRCF0:1;
1482 unsigned char IRCF1:1;
1483 unsigned char IRCF2:1;
1487 extern volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits;
1489 #define SCS OSCCON_bits.SCS
1490 #define LTS OSCCON_bits.LTS
1491 #define HTS OSCCON_bits.HTS
1492 #define OSTS OSCCON_bits.OSTS
1493 #define IRCF0 OSCCON_bits.IRCF0
1494 #define IRCF1 OSCCON_bits.IRCF1
1495 #define IRCF2 OSCCON_bits.IRCF2
1497 // ----- OSCTUNE bits --------------------
1500 unsigned char TUN0:1;
1501 unsigned char TUN1:1;
1502 unsigned char TUN2:1;
1503 unsigned char TUN3:1;
1504 unsigned char TUN4:1;
1510 extern volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits;
1512 #define TUN0 OSCTUNE_bits.TUN0
1513 #define TUN1 OSCTUNE_bits.TUN1
1514 #define TUN2 OSCTUNE_bits.TUN2
1515 #define TUN3 OSCTUNE_bits.TUN3
1516 #define TUN4 OSCTUNE_bits.TUN4
1518 // ----- PCON bits --------------------
1521 unsigned char NOT_BO:1;
1522 unsigned char NOT_POR:1;
1525 unsigned char SBOREN:1;
1531 unsigned char NOT_BOR:1;
1541 extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits;
1543 #define NOT_BO PCON_bits.NOT_BO
1544 #define NOT_BOR PCON_bits.NOT_BOR
1545 #define NOT_POR PCON_bits.NOT_POR
1546 #define SBOREN PCON_bits.SBOREN
1548 // ----- PIE1 bits --------------------
1551 unsigned char TMR1IE:1;
1552 unsigned char TMR2IE:1;
1553 unsigned char CCP1IE:1;
1554 unsigned char SSPIE:1;
1555 unsigned char TXIE:1;
1556 unsigned char RCIE:1;
1557 unsigned char ADIE:1;
1558 unsigned char EEIE:1;
1561 extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits;
1563 #define TMR1IE PIE1_bits.TMR1IE
1564 #define TMR2IE PIE1_bits.TMR2IE
1565 #define CCP1IE PIE1_bits.CCP1IE
1566 #define SSPIE PIE1_bits.SSPIE
1567 #define TXIE PIE1_bits.TXIE
1568 #define RCIE PIE1_bits.RCIE
1569 #define ADIE PIE1_bits.ADIE
1570 #define EEIE PIE1_bits.EEIE
1572 // ----- PIE2 bits --------------------
1575 unsigned char CCP2IE:1;
1577 unsigned char LVDIE:1;
1579 unsigned char LCDIE:1;
1580 unsigned char C1IE:1;
1581 unsigned char C2IE:1;
1582 unsigned char OSFIE:1;
1585 extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits;
1587 #define CCP2IE PIE2_bits.CCP2IE
1588 #define LVDIE PIE2_bits.LVDIE
1589 #define LCDIE PIE2_bits.LCDIE
1590 #define C1IE PIE2_bits.C1IE
1591 #define C2IE PIE2_bits.C2IE
1592 #define OSFIE PIE2_bits.OSFIE
1594 // ----- PIR1 bits --------------------
1597 unsigned char TMR1IF:1;
1598 unsigned char TMR2IF:1;
1599 unsigned char CCP1IF:1;
1600 unsigned char SSPIF:1;
1601 unsigned char TXIF:1;
1602 unsigned char RCIF:1;
1603 unsigned char ADIF:1;
1604 unsigned char EEIF:1;
1607 extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits;
1609 #define TMR1IF PIR1_bits.TMR1IF
1610 #define TMR2IF PIR1_bits.TMR2IF
1611 #define CCP1IF PIR1_bits.CCP1IF
1612 #define SSPIF PIR1_bits.SSPIF
1613 #define TXIF PIR1_bits.TXIF
1614 #define RCIF PIR1_bits.RCIF
1615 #define ADIF PIR1_bits.ADIF
1616 #define EEIF PIR1_bits.EEIF
1618 // ----- PIR2 bits --------------------
1621 unsigned char CCP2IF:1;
1623 unsigned char LVDIF:1;
1625 unsigned char LCDIF:1;
1626 unsigned char C1IF:1;
1627 unsigned char C2IF:1;
1628 unsigned char OSFIF:1;
1631 extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits;
1633 #define CCP2IF PIR2_bits.CCP2IF
1634 #define LVDIF PIR2_bits.LVDIF
1635 #define LCDIF PIR2_bits.LCDIF
1636 #define C1IF PIR2_bits.C1IF
1637 #define C2IF PIR2_bits.C2IF
1638 #define OSFIF PIR2_bits.OSFIF
1640 // ----- PORTA bits --------------------
1643 unsigned char RA0:1;
1644 unsigned char RA1:1;
1645 unsigned char RA2:1;
1646 unsigned char RA3:1;
1647 unsigned char RA4:1;
1648 unsigned char RA5:1;
1653 extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits;
1655 #define RA0 PORTA_bits.RA0
1656 #define RA1 PORTA_bits.RA1
1657 #define RA2 PORTA_bits.RA2
1658 #define RA3 PORTA_bits.RA3
1659 #define RA4 PORTA_bits.RA4
1660 #define RA5 PORTA_bits.RA5
1662 // ----- PORTB bits --------------------
1665 unsigned char RB0:1;
1666 unsigned char RB1:1;
1667 unsigned char RB2:1;
1668 unsigned char RB3:1;
1669 unsigned char RB4:1;
1670 unsigned char RB5:1;
1671 unsigned char RB6:1;
1672 unsigned char RB7:1;
1675 extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits;
1677 #define RB0 PORTB_bits.RB0
1678 #define RB1 PORTB_bits.RB1
1679 #define RB2 PORTB_bits.RB2
1680 #define RB3 PORTB_bits.RB3
1681 #define RB4 PORTB_bits.RB4
1682 #define RB5 PORTB_bits.RB5
1683 #define RB6 PORTB_bits.RB6
1684 #define RB7 PORTB_bits.RB7
1686 // ----- PORTC bits --------------------
1689 unsigned char RC0:1;
1690 unsigned char RC1:1;
1691 unsigned char RC2:1;
1692 unsigned char RC3:1;
1693 unsigned char RC4:1;
1694 unsigned char RC5:1;
1695 unsigned char RC6:1;
1696 unsigned char RC7:1;
1699 extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits;
1701 #define RC0 PORTC_bits.RC0
1702 #define RC1 PORTC_bits.RC1
1703 #define RC2 PORTC_bits.RC2
1704 #define RC3 PORTC_bits.RC3
1705 #define RC4 PORTC_bits.RC4
1706 #define RC5 PORTC_bits.RC5
1707 #define RC6 PORTC_bits.RC6
1708 #define RC7 PORTC_bits.RC7
1710 // ----- PORTD bits --------------------
1713 unsigned char RD0:1;
1714 unsigned char RD1:1;
1715 unsigned char RD2:1;
1716 unsigned char RD3:1;
1717 unsigned char RD4:1;
1718 unsigned char RD5:1;
1719 unsigned char RD6:1;
1720 unsigned char RD7:1;
1723 extern volatile __PORTD_bits_t __at(PORTD_ADDR) PORTD_bits;
1725 #define RD0 PORTD_bits.RD0
1726 #define RD1 PORTD_bits.RD1
1727 #define RD2 PORTD_bits.RD2
1728 #define RD3 PORTD_bits.RD3
1729 #define RD4 PORTD_bits.RD4
1730 #define RD5 PORTD_bits.RD5
1731 #define RD6 PORTD_bits.RD6
1732 #define RD7 PORTD_bits.RD7
1734 // ----- PORTE bits --------------------
1737 unsigned char RE0:1;
1738 unsigned char RE1:1;
1739 unsigned char RE2:1;
1747 extern volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits;
1749 #define RE0 PORTE_bits.RE0
1750 #define RE1 PORTE_bits.RE1
1751 #define RE2 PORTE_bits.RE2
1753 // ----- RCSTA bits --------------------
1756 unsigned char RX9D:1;
1757 unsigned char OERR:1;
1758 unsigned char FERR:1;
1759 unsigned char ADDEN:1;
1760 unsigned char CREN:1;
1761 unsigned char SREN:1;
1762 unsigned char RX9:1;
1763 unsigned char SPEN:1;
1766 unsigned char RCD8:1;
1772 unsigned char RC9:1;
1782 unsigned char NOT_RC8:1;
1792 unsigned char RC8_9:1;
1796 extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits;
1798 #define RX9D RCSTA_bits.RX9D
1799 #define RCD8 RCSTA_bits.RCD8
1800 #define OERR RCSTA_bits.OERR
1801 #define FERR RCSTA_bits.FERR
1802 #define ADDEN RCSTA_bits.ADDEN
1803 #define CREN RCSTA_bits.CREN
1804 #define SREN RCSTA_bits.SREN
1805 #define RX9 RCSTA_bits.RX9
1806 #define RC9 RCSTA_bits.RC9
1807 #define NOT_RC8 RCSTA_bits.NOT_RC8
1808 #define RC8_9 RCSTA_bits.RC8_9
1809 #define SPEN RCSTA_bits.SPEN
1811 // ----- SSPCON bits --------------------
1814 unsigned char SSPM0:1;
1815 unsigned char SSPM1:1;
1816 unsigned char SSPM2:1;
1817 unsigned char SSPM3:1;
1818 unsigned char CKP:1;
1819 unsigned char SSPEN:1;
1820 unsigned char SSPOV:1;
1821 unsigned char WCOL:1;
1824 extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits;
1826 #define SSPM0 SSPCON_bits.SSPM0
1827 #define SSPM1 SSPCON_bits.SSPM1
1828 #define SSPM2 SSPCON_bits.SSPM2
1829 #define SSPM3 SSPCON_bits.SSPM3
1830 #define CKP SSPCON_bits.CKP
1831 #define SSPEN SSPCON_bits.SSPEN
1832 #define SSPOV SSPCON_bits.SSPOV
1833 #define WCOL SSPCON_bits.WCOL
1835 // ----- SSPSTAT bits --------------------
1844 unsigned char CKE:1;
1845 unsigned char SMP:1;
1850 unsigned char I2C_READ:1;
1851 unsigned char I2C_START:1;
1852 unsigned char I2C_STOP:1;
1853 unsigned char I2C_DATA:1;
1860 unsigned char NOT_W:1;
1863 unsigned char NOT_A:1;
1870 unsigned char NOT_WRITE:1;
1873 unsigned char NOT_ADDRESS:1;
1880 unsigned char R_W:1;
1883 unsigned char D_A:1;
1890 unsigned char READ_WRITE:1;
1893 unsigned char DATA_ADDRESS:1;
1898 extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits;
1900 #define BF SSPSTAT_bits.BF
1901 #define UA SSPSTAT_bits.UA
1902 #define R SSPSTAT_bits.R
1903 #define I2C_READ SSPSTAT_bits.I2C_READ
1904 #define NOT_W SSPSTAT_bits.NOT_W
1905 #define NOT_WRITE SSPSTAT_bits.NOT_WRITE
1906 #define R_W SSPSTAT_bits.R_W
1907 #define READ_WRITE SSPSTAT_bits.READ_WRITE
1908 #define S SSPSTAT_bits.S
1909 #define I2C_START SSPSTAT_bits.I2C_START
1910 #define P SSPSTAT_bits.P
1911 #define I2C_STOP SSPSTAT_bits.I2C_STOP
1912 #define D SSPSTAT_bits.D
1913 #define I2C_DATA SSPSTAT_bits.I2C_DATA
1914 #define NOT_A SSPSTAT_bits.NOT_A
1915 #define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS
1916 #define D_A SSPSTAT_bits.D_A
1917 #define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS
1918 #define CKE SSPSTAT_bits.CKE
1919 #define SMP SSPSTAT_bits.SMP
1921 // ----- STATUS bits --------------------
1927 unsigned char NOT_PD:1;
1928 unsigned char NOT_TO:1;
1929 unsigned char RP0:1;
1930 unsigned char RP1:1;
1931 unsigned char IRP:1;
1934 extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits;
1936 #define C STATUS_bits.C
1937 #define DC STATUS_bits.DC
1938 #define Z STATUS_bits.Z
1939 #define NOT_PD STATUS_bits.NOT_PD
1940 #define NOT_TO STATUS_bits.NOT_TO
1941 #define RP0 STATUS_bits.RP0
1942 #define RP1 STATUS_bits.RP1
1943 #define IRP STATUS_bits.IRP
1945 // ----- T1CON bits --------------------
1948 unsigned char TMR1ON:1;
1949 unsigned char TMR1CS:1;
1950 unsigned char NOT_T1SYNC:1;
1951 unsigned char T1OSCEN:1;
1952 unsigned char T1CKPS0:1;
1953 unsigned char T1CKPS1:1;
1954 unsigned char T1GE:1;
1955 unsigned char T1GINV:1;
1960 unsigned char T1INSYNC:1;
1970 unsigned char T1SYNC:1;
1978 extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits;
1980 #define TMR1ON T1CON_bits.TMR1ON
1981 #define TMR1CS T1CON_bits.TMR1CS
1982 #define NOT_T1SYNC T1CON_bits.NOT_T1SYNC
1983 #define T1INSYNC T1CON_bits.T1INSYNC
1984 #define T1SYNC T1CON_bits.T1SYNC
1985 #define T1OSCEN T1CON_bits.T1OSCEN
1986 #define T1CKPS0 T1CON_bits.T1CKPS0
1987 #define T1CKPS1 T1CON_bits.T1CKPS1
1988 #define T1GE T1CON_bits.T1GE
1989 #define T1GINV T1CON_bits.T1GINV
1991 // ----- T2CON bits --------------------
1994 unsigned char T2CKPS0:1;
1995 unsigned char T2CKPS1:1;
1996 unsigned char TMR2ON:1;
1997 unsigned char TOUTPS0:1;
1998 unsigned char TOUTPS1:1;
1999 unsigned char TOUTPS2:1;
2000 unsigned char TOUTPS3:1;
2004 extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits;
2006 #define T2CKPS0 T2CON_bits.T2CKPS0
2007 #define T2CKPS1 T2CON_bits.T2CKPS1
2008 #define TMR2ON T2CON_bits.TMR2ON
2009 #define TOUTPS0 T2CON_bits.TOUTPS0
2010 #define TOUTPS1 T2CON_bits.TOUTPS1
2011 #define TOUTPS2 T2CON_bits.TOUTPS2
2012 #define TOUTPS3 T2CON_bits.TOUTPS3
2014 // ----- TRISA bits --------------------
2017 unsigned char TRISA0:1;
2018 unsigned char TRISA1:1;
2019 unsigned char TRISA2:1;
2020 unsigned char TRISA3:1;
2021 unsigned char TRISA4:1;
2022 unsigned char TRISA5:1;
2027 extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits;
2029 #define TRISA0 TRISA_bits.TRISA0
2030 #define TRISA1 TRISA_bits.TRISA1
2031 #define TRISA2 TRISA_bits.TRISA2
2032 #define TRISA3 TRISA_bits.TRISA3
2033 #define TRISA4 TRISA_bits.TRISA4
2034 #define TRISA5 TRISA_bits.TRISA5
2036 // ----- TRISB bits --------------------
2039 unsigned char TRISB0:1;
2040 unsigned char TRISB1:1;
2041 unsigned char TRISB2:1;
2042 unsigned char TRISB3:1;
2043 unsigned char TRISB4:1;
2044 unsigned char TRISB5:1;
2045 unsigned char TRISB6:1;
2046 unsigned char TRISB7:1;
2049 extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits;
2051 #define TRISB0 TRISB_bits.TRISB0
2052 #define TRISB1 TRISB_bits.TRISB1
2053 #define TRISB2 TRISB_bits.TRISB2
2054 #define TRISB3 TRISB_bits.TRISB3
2055 #define TRISB4 TRISB_bits.TRISB4
2056 #define TRISB5 TRISB_bits.TRISB5
2057 #define TRISB6 TRISB_bits.TRISB6
2058 #define TRISB7 TRISB_bits.TRISB7
2060 // ----- TRISC bits --------------------
2063 unsigned char TRISC0:1;
2064 unsigned char TRISC1:1;
2065 unsigned char TRISC2:1;
2066 unsigned char TRISC3:1;
2067 unsigned char TRISC4:1;
2068 unsigned char TRISC5:1;
2069 unsigned char TRISC6:1;
2070 unsigned char TRISC7:1;
2073 extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits;
2075 #define TRISC0 TRISC_bits.TRISC0
2076 #define TRISC1 TRISC_bits.TRISC1
2077 #define TRISC2 TRISC_bits.TRISC2
2078 #define TRISC3 TRISC_bits.TRISC3
2079 #define TRISC4 TRISC_bits.TRISC4
2080 #define TRISC5 TRISC_bits.TRISC5
2081 #define TRISC6 TRISC_bits.TRISC6
2082 #define TRISC7 TRISC_bits.TRISC7
2084 // ----- TRISD bits --------------------
2087 unsigned char TRISD0:1;
2088 unsigned char TRISD1:1;
2089 unsigned char TRISD2:1;
2090 unsigned char TRISD3:1;
2091 unsigned char TRISD4:1;
2092 unsigned char TRISD5:1;
2093 unsigned char TRISD6:1;
2094 unsigned char TRISD7:1;
2097 extern volatile __TRISD_bits_t __at(TRISD_ADDR) TRISD_bits;
2099 #define TRISD0 TRISD_bits.TRISD0
2100 #define TRISD1 TRISD_bits.TRISD1
2101 #define TRISD2 TRISD_bits.TRISD2
2102 #define TRISD3 TRISD_bits.TRISD3
2103 #define TRISD4 TRISD_bits.TRISD4
2104 #define TRISD5 TRISD_bits.TRISD5
2105 #define TRISD6 TRISD_bits.TRISD6
2106 #define TRISD7 TRISD_bits.TRISD7
2108 // ----- TRISE bits --------------------
2111 unsigned char TRISE0:1;
2112 unsigned char TRISE1:1;
2113 unsigned char TRISE2:1;
2121 extern volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits;
2123 #define TRISE0 TRISE_bits.TRISE0
2124 #define TRISE1 TRISE_bits.TRISE1
2125 #define TRISE2 TRISE_bits.TRISE2
2127 // ----- TXSTA bits --------------------
2130 unsigned char TX9D:1;
2131 unsigned char TRMT:1;
2132 unsigned char BRGH:1;
2134 unsigned char SYNC:1;
2135 unsigned char TXEN:1;
2136 unsigned char TX9:1;
2137 unsigned char CSRC:1;
2140 unsigned char TXD8:1;
2146 unsigned char NOT_TX8:1;
2156 unsigned char TX8_9:1;
2160 extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits;
2162 #define TX9D TXSTA_bits.TX9D
2163 #define TXD8 TXSTA_bits.TXD8
2164 #define TRMT TXSTA_bits.TRMT
2165 #define BRGH TXSTA_bits.BRGH
2166 #define SYNC TXSTA_bits.SYNC
2167 #define TXEN TXSTA_bits.TXEN
2168 #define TX9 TXSTA_bits.TX9
2169 #define NOT_TX8 TXSTA_bits.NOT_TX8
2170 #define TX8_9 TXSTA_bits.TX8_9
2171 #define CSRC TXSTA_bits.CSRC
2173 // ----- VRCON bits --------------------
2176 unsigned char VR0:1;
2177 unsigned char VR1:1;
2178 unsigned char VR2:1;
2179 unsigned char VR3:1;
2181 unsigned char VRR:1;
2183 unsigned char VREN:1;
2186 extern volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits;
2188 #define VR0 VRCON_bits.VR0
2189 #define VR1 VRCON_bits.VR1
2190 #define VR2 VRCON_bits.VR2
2191 #define VR3 VRCON_bits.VR3
2192 #define VRR VRCON_bits.VRR
2193 #define VREN VRCON_bits.VREN
2195 // ----- WDTCON bits --------------------
2198 unsigned char SWDTEN:1;
2199 unsigned char WDTPS0:1;
2200 unsigned char WDTPS1:1;
2201 unsigned char WDTPS2:1;
2202 unsigned char WDTPS3:1;
2208 unsigned char SWDTE:1;
2218 extern volatile __WDTCON_bits_t __at(WDTCON_ADDR) WDTCON_bits;
2220 #define SWDTEN WDTCON_bits.SWDTEN
2221 #define SWDTE WDTCON_bits.SWDTE
2222 #define WDTPS0 WDTCON_bits.WDTPS0
2223 #define WDTPS1 WDTCON_bits.WDTPS1
2224 #define WDTPS2 WDTCON_bits.WDTPS2
2225 #define WDTPS3 WDTCON_bits.WDTPS3
2227 // ----- WPU bits --------------------
2230 unsigned char WPU0:1;
2231 unsigned char WPU1:1;
2232 unsigned char WPU2:1;
2233 unsigned char WPU3:1;
2234 unsigned char WPU4:1;
2235 unsigned char WPU5:1;
2236 unsigned char WPU6:1;
2237 unsigned char WPU7:1;
2240 extern volatile __WPU_bits_t __at(WPU_ADDR) WPU_bits;
2242 #define WPU0 WPU_bits.WPU0
2243 #define WPU1 WPU_bits.WPU1
2244 #define WPU2 WPU_bits.WPU2
2245 #define WPU3 WPU_bits.WPU3
2246 #define WPU4 WPU_bits.WPU4
2247 #define WPU5 WPU_bits.WPU5
2248 #define WPU6 WPU_bits.WPU6
2249 #define WPU7 WPU_bits.WPU7
2251 // ----- WPUB bits --------------------
2254 unsigned char WPUB0:1;
2255 unsigned char WPUB1:1;
2256 unsigned char WPUB2:1;
2257 unsigned char WPUB3:1;
2258 unsigned char WPUB4:1;
2259 unsigned char WPUB5:1;
2260 unsigned char WPUB6:1;
2261 unsigned char WPUB7:1;
2264 extern volatile __WPUB_bits_t __at(WPUB_ADDR) WPUB_bits;
2266 #define WPUB0 WPUB_bits.WPUB0
2267 #define WPUB1 WPUB_bits.WPUB1
2268 #define WPUB2 WPUB_bits.WPUB2
2269 #define WPUB3 WPUB_bits.WPUB3
2270 #define WPUB4 WPUB_bits.WPUB4
2271 #define WPUB5 WPUB_bits.WPUB5
2272 #define WPUB6 WPUB_bits.WPUB6
2273 #define WPUB7 WPUB_bits.WPUB7