2 // Register Declarations for Microchip 16F913 Processor
5 // This header file was automatically generated by:
9 // Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved
11 // SDCC is licensed under the GNU Public license (GPL) v2. Note that
12 // this license covers the code to the compiler and other executables,
13 // but explicitly does not cover any code or objects generated by sdcc.
14 // We have not yet decided on a license for the run time libraries, but
15 // it will not put any requirements on code linked against it. See:
17 // http://www.gnu.org/copyleft/gpl/html
19 // See http://sdcc.sourceforge.net/ for the latest information on sdcc.
26 // Register addresses.
28 #define INDF_ADDR 0x0000
29 #define TMR0_ADDR 0x0001
30 #define PCL_ADDR 0x0002
31 #define STATUS_ADDR 0x0003
32 #define FSR_ADDR 0x0004
33 #define PORTA_ADDR 0x0005
34 #define PORTB_ADDR 0x0006
35 #define PORTC_ADDR 0x0007
36 #define PORTE_ADDR 0x0009
37 #define PCLATH_ADDR 0x000A
38 #define INTCON_ADDR 0x000B
39 #define PIR1_ADDR 0x000C
40 #define PIR2_ADDR 0x000D
41 #define TMR1L_ADDR 0x000E
42 #define TMR1H_ADDR 0x000F
43 #define T1CON_ADDR 0x0010
44 #define TMR2_ADDR 0x0011
45 #define T2CON_ADDR 0x0012
46 #define SSPBUF_ADDR 0x0013
47 #define SSPCON_ADDR 0x0014
48 #define CCPR1L_ADDR 0x0015
49 #define CCPR1H_ADDR 0x0016
50 #define CCP1CON_ADDR 0x0017
51 #define RCSTA_ADDR 0x0018
52 #define TXREG_ADDR 0x0019
53 #define RCREG_ADDR 0x001A
54 #define ADRESH_ADDR 0x001E
55 #define ADCON0_ADDR 0x001F
56 #define OPTION_REG_ADDR 0x0081
57 #define TRISA_ADDR 0x0085
58 #define TRISB_ADDR 0x0086
59 #define TRISC_ADDR 0x0087
60 #define TRISE_ADDR 0x0089
61 #define PIE1_ADDR 0x008C
62 #define PIE2_ADDR 0x008D
63 #define PCON_ADDR 0x008E
64 #define OSCCON_ADDR 0x008F
65 #define OSCTUNE_ADDR 0x0090
66 #define ANSEL_ADDR 0x0091
67 #define PR2_ADDR 0x0092
68 #define SSPADD_ADDR 0x0093
69 #define SSPSTAT_ADDR 0x0094
70 #define WPUB_ADDR 0x0095
71 #define WPU_ADDR 0x0095
72 #define IOCB_ADDR 0x0096
73 #define IOC_ADDR 0x0096
74 #define CMCON1_ADDR 0x0097
75 #define TXSTA_ADDR 0x0098
76 #define SPBRG_ADDR 0x0099
77 #define CMCON0_ADDR 0x009C
78 #define VRCON_ADDR 0x009D
79 #define ADRESL_ADDR 0x009E
80 #define ADCON1_ADDR 0x009F
81 #define WDTCON_ADDR 0x0105
82 #define LCDCON_ADDR 0x0107
83 #define LCDPS_ADDR 0x0108
84 #define LVDCON_ADDR 0x0109
85 #define EEDATL_ADDR 0x010C
86 #define EEADRL_ADDR 0x010D
87 #define EEDATH_ADDR 0x010E
88 #define EEADRH_ADDR 0x010F
89 #define LCDDATA0_ADDR 0x0110
90 #define LCDDATA1_ADDR 0x0111
91 #define LCDDATA3_ADDR 0x0113
92 #define LCDDATA4_ADDR 0x0114
93 #define LCDDATA6_ADDR 0x0116
94 #define LCDDATA7_ADDR 0x0117
95 #define LCDDATA9_ADDR 0x0119
96 #define LCDDATA10_ADDR 0x011A
97 #define LCDSE0_ADDR 0x011C
98 #define LCDSE1_ADDR 0x011D
99 #define EECON1_ADDR 0x018C
100 #define EECON2_ADDR 0x018D
103 // Memory organization.
109 // P16F913.INC Standard Header File, Version 1.00 Microchip Technology, Inc.
112 // This header file defines configurations, registers, and other useful bits of
113 // information for the PIC16F913 microcontroller.
114 // These names are taken to match the data sheets as closely as possible.
116 // Note that the processor must be selected before this file is
117 // included. The processor may be selected the following ways:
119 // 1. Command line switch:
120 // C:\ MPASM MYFILE.ASM /PIC16F913
121 // 2. LIST directive in the source file
123 // 3. Processor Type entry in the MPASM full-screen interface
125 //==========================================================================
129 //==========================================================================
132 //1.00 06/11/04 Initial Release
133 //1.01 06/18/04 Corrected typo in 'bad ram' section
134 //1.02 08/16/04 Added EECON2
137 //==========================================================================
141 //==========================================================================
144 // MESSG "Processor-header file mismatch. Verify selected processor."
147 //==========================================================================
149 // Register Definitions
151 //==========================================================================
156 //----- Register Files------------------------------------------------------
158 extern __data __at (INDF_ADDR) volatile char INDF;
159 extern __sfr __at (TMR0_ADDR) TMR0;
160 extern __data __at (PCL_ADDR) volatile char PCL;
161 extern __sfr __at (STATUS_ADDR) STATUS;
162 extern __sfr __at (FSR_ADDR) FSR;
163 extern __sfr __at (PORTA_ADDR) PORTA;
164 extern __sfr __at (PORTB_ADDR) PORTB;
165 extern __sfr __at (PORTC_ADDR) PORTC;
166 extern __sfr __at (PORTE_ADDR) PORTE;
167 extern __sfr __at (PCLATH_ADDR) PCLATH;
168 extern __sfr __at (INTCON_ADDR) INTCON;
169 extern __sfr __at (PIR1_ADDR) PIR1;
170 extern __sfr __at (PIR2_ADDR) PIR2;
171 extern __sfr __at (TMR1L_ADDR) TMR1L;
172 extern __sfr __at (TMR1H_ADDR) TMR1H;
173 extern __sfr __at (T1CON_ADDR) T1CON;
174 extern __sfr __at (TMR2_ADDR) TMR2;
175 extern __sfr __at (T2CON_ADDR) T2CON;
176 extern __sfr __at (SSPBUF_ADDR) SSPBUF;
177 extern __sfr __at (SSPCON_ADDR) SSPCON;
178 extern __sfr __at (CCPR1L_ADDR) CCPR1L;
179 extern __sfr __at (CCPR1H_ADDR) CCPR1H;
180 extern __sfr __at (CCP1CON_ADDR) CCP1CON;
181 extern __sfr __at (RCSTA_ADDR) RCSTA;
182 extern __sfr __at (TXREG_ADDR) TXREG;
183 extern __sfr __at (RCREG_ADDR) RCREG;
184 extern __sfr __at (ADRESH_ADDR) ADRESH;
185 extern __sfr __at (ADCON0_ADDR) ADCON0;
187 extern __sfr __at (OPTION_REG_ADDR) OPTION_REG;
188 extern __sfr __at (TRISA_ADDR) TRISA;
189 extern __sfr __at (TRISB_ADDR) TRISB;
190 extern __sfr __at (TRISC_ADDR) TRISC;
191 extern __sfr __at (TRISE_ADDR) TRISE;
192 extern __sfr __at (PIE1_ADDR) PIE1;
193 extern __sfr __at (PIE2_ADDR) PIE2;
194 extern __sfr __at (PCON_ADDR) PCON;
195 extern __sfr __at (OSCCON_ADDR) OSCCON;
196 extern __sfr __at (OSCTUNE_ADDR) OSCTUNE;
197 extern __sfr __at (ANSEL_ADDR) ANSEL;
198 extern __sfr __at (PR2_ADDR) PR2;
199 extern __sfr __at (SSPADD_ADDR) SSPADD;
200 extern __sfr __at (SSPSTAT_ADDR) SSPSTAT;
201 extern __sfr __at (WPUB_ADDR) WPUB;
202 extern __sfr __at (WPU_ADDR) WPU;
203 extern __sfr __at (IOCB_ADDR) IOCB;
204 extern __sfr __at (IOC_ADDR) IOC;
205 extern __sfr __at (CMCON1_ADDR) CMCON1;
206 extern __sfr __at (TXSTA_ADDR) TXSTA;
207 extern __sfr __at (SPBRG_ADDR) SPBRG;
208 extern __sfr __at (CMCON0_ADDR) CMCON0;
209 extern __sfr __at (VRCON_ADDR) VRCON;
210 extern __sfr __at (ADRESL_ADDR) ADRESL;
211 extern __sfr __at (ADCON1_ADDR) ADCON1;
213 extern __sfr __at (WDTCON_ADDR) WDTCON;
214 extern __sfr __at (LCDCON_ADDR) LCDCON;
215 extern __sfr __at (LCDPS_ADDR) LCDPS;
216 extern __sfr __at (LVDCON_ADDR) LVDCON;
217 extern __sfr __at (EEDATL_ADDR) EEDATL;
218 extern __sfr __at (EEADRL_ADDR) EEADRL;
219 extern __sfr __at (EEDATH_ADDR) EEDATH;
220 extern __sfr __at (EEADRH_ADDR) EEADRH;
221 extern __sfr __at (LCDDATA0_ADDR) LCDDATA0;
222 extern __sfr __at (LCDDATA1_ADDR) LCDDATA1;
223 extern __sfr __at (LCDDATA3_ADDR) LCDDATA3;
224 extern __sfr __at (LCDDATA4_ADDR) LCDDATA4;
225 extern __sfr __at (LCDDATA6_ADDR) LCDDATA6;
226 extern __sfr __at (LCDDATA7_ADDR) LCDDATA7;
227 extern __sfr __at (LCDDATA9_ADDR) LCDDATA9;
228 extern __sfr __at (LCDDATA10_ADDR) LCDDATA10;
229 extern __sfr __at (LCDSE0_ADDR) LCDSE0;
230 extern __sfr __at (LCDSE1_ADDR) LCDSE1;
232 extern __sfr __at (EECON1_ADDR) EECON1;
233 extern __sfr __at (EECON2_ADDR) EECON2;
235 //----- STATUS Bits --------------------------------------------------------
238 //----- INTCON Bits --------------------------------------------------------
241 //----- PIR1 Bits ----------------------------------------------------------
244 //----- PIR2 Bits ----------------------------------------------------------
247 //----- T1CON Bits ---------------------------------------------------------
250 //----- T2CON Bits ---------------------------------------------------------
253 //----- SSPCON Bits --------------------------------------------------------
256 //----- CCP1CON Bits -------------------------------------------------------
259 //----- RCSTA Bits ---------------------------------------------------------
263 //----- ADCON0 Bits --------------------------------------------------------
266 //----- OPTION Bits -----------------------------------------------------
269 //----- PIE1 Bits ----------------------------------------------------------
272 //----- PIE2 Bits ----------------------------------------------------------
275 //----- PCON Bits ----------------------------------------------------------
278 //----- OSCCON Bits -------------------------------------------------------
281 //----- OSCTUNE Bits -------------------------------------------------------
285 //----- ANSEL Bits ---------------------------------------------------------
289 //----- SSPSTAT Bits -------------------------------------------------------
293 //----- WPUB Bits -------------------------------------------------------
296 //----- WPU Bits -------------------------------------------------------
300 //----- IOCB Bits -------------------------------------------------------
304 //----- IOC Bits -------------------------------------------------------
308 //----- CMCON1 Bits --------------------------------------------------------
311 //----- TXSTA Bits ---------------------------------------------------------
315 //----- CMCON0 Bits ---------------------------------------------------------
318 //----- VRCON Bits --------------------------------------------------------
321 //----- ADCON1 Bits --------------------------------------------------------
324 //----- WDTCON Bits --------------------------------------------------------
327 //----- LCDCON Bits --------------------------------------------------------
330 //----- LCDPS Bits ---------------------------------------------------------
333 //----- LVDCON Bits --------------------------------------------------------
336 //----- LCDDATA0 Bits -------------------------------------------------------
340 //----- LCDDATA1 Bits -------------------------------------------------------
345 //----- LCDDATA3 Bits -------------------------------------------------------
349 //----- LCDDATA4 Bits -------------------------------------------------------
354 //----- LCDDATA6 Bits -------------------------------------------------------
358 //----- LCDDATA7 Bits -------------------------------------------------------
363 //----- LCDDATA9 Bits -------------------------------------------------------
367 //----- LCDDATA10 Bits -------------------------------------------------------
372 //----- LCDSE0 Bits --------------------------------------------------------
376 //----- LCDSE1 Bits --------------------------------------------------------
381 //----- EECON1 Bits --------------------------------------------------------
385 //==========================================================================
389 //==========================================================================
392 // __BADRAM H'08', H'1B'-H'1D'
393 // __BADRAM H'88', H'9A'-H'9B'
394 // __BADRAM H'112', H'115', H'118', H'11B',H'11E'-H'11F'
395 // __BADRAM H'185', H'187'-H'189', H'18D'-H'1EF'
397 //==========================================================================
399 // Configuration Bits
401 //==========================================================================
403 #define _CONFIG 0x2007
405 //Configuration Byte 1 Options
406 #define _DEBUG_ON 0x2FFF
407 #define _DEBUG_OFF 0x3FFF
408 #define _FCMEN_ON 0x3FFF
409 #define _FCMEN_OFF 0x37FF
410 #define _IESO_ON 0x3FFF
411 #define _IESO_OFF 0x3BFF
412 #define _BOD_ON 0x3FFF
413 #define _BOD_NSLEEP 0x3EFF
414 #define _BOD_SBODEN 0x3DFF
415 #define _BOD_OFF 0x3CFF
416 #define _CPD_ON 0x3F7F
417 #define _CPD_OFF 0x3FFF
418 #define _CP_ON 0x3FBF
419 #define _CP_OFF 0x3FFF
420 #define _MCLRE_ON 0x3FFF
421 #define _MCLRE_OFF 0x3FDF
422 #define _PWRTE_ON 0x3FEF
423 #define _PWRTE_OFF 0x3FFF
424 #define _WDT_ON 0x3FFF
425 #define _WDT_OFF 0x3FF7
426 #define _LP_OSC 0x3FF8
427 #define _XT_OSC 0x3FF9
428 #define _HS_OSC 0x3FFA
429 #define _EC_OSC 0x3FFB
430 #define _INTRC_OSC_NOCLKOUT 0x3FFC
431 #define _INTRC_OSC_CLKOUT 0x3FFD
432 #define _EXTRC_OSC_NOCLKOUT 0x3FFE
433 #define _EXTRC_OSC_CLKOUT 0x3FFF
434 #define _INTOSCIO 0x3FFC
435 #define _INTOSC 0x3FFD
436 #define _EXTRCIO 0x3FFE
437 #define _EXTRC 0x3FFF
442 // ----- ADCON0 bits --------------------
445 unsigned char ADON:1;
446 unsigned char NOT_DONE:1;
447 unsigned char CHS0:1;
448 unsigned char CHS1:1;
449 unsigned char CHS2:1;
450 unsigned char VCFG0:1;
451 unsigned char VCFG1:1;
452 unsigned char ADFM:1;
456 unsigned char GO_DONE:1;
465 extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits;
467 #define ADON ADCON0_bits.ADON
468 #define NOT_DONE ADCON0_bits.NOT_DONE
469 #define GO_DONE ADCON0_bits.GO_DONE
470 #define CHS0 ADCON0_bits.CHS0
471 #define CHS1 ADCON0_bits.CHS1
472 #define CHS2 ADCON0_bits.CHS2
473 #define VCFG0 ADCON0_bits.VCFG0
474 #define VCFG1 ADCON0_bits.VCFG1
475 #define ADFM ADCON0_bits.ADFM
477 // ----- ADCON1 bits --------------------
484 unsigned char ADCS0:1;
485 unsigned char ADCS1:1;
486 unsigned char ADCS2:1;
490 extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits;
492 #define ADCS0 ADCON1_bits.ADCS0
493 #define ADCS1 ADCON1_bits.ADCS1
494 #define ADCS2 ADCON1_bits.ADCS2
496 // ----- ANSEL bits --------------------
509 extern volatile __ANSEL_bits_t __at(ANSEL_ADDR) ANSEL_bits;
511 #define AN0 ANSEL_bits.AN0
512 #define AN1 ANSEL_bits.AN1
513 #define AN2 ANSEL_bits.AN2
514 #define AN3 ANSEL_bits.AN3
515 #define AN4 ANSEL_bits.AN4
517 // ----- CCP1CON bits --------------------
520 unsigned char CCP1M0:1;
521 unsigned char CCP1M1:1;
522 unsigned char CCP1M2:1;
523 unsigned char CCP1M3:1;
524 unsigned char CCP1Y:1;
525 unsigned char CCP1X:1;
530 extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits;
532 #define CCP1M0 CCP1CON_bits.CCP1M0
533 #define CCP1M1 CCP1CON_bits.CCP1M1
534 #define CCP1M2 CCP1CON_bits.CCP1M2
535 #define CCP1M3 CCP1CON_bits.CCP1M3
536 #define CCP1Y CCP1CON_bits.CCP1Y
537 #define CCP1X CCP1CON_bits.CCP1X
539 // ----- CMCON0 bits --------------------
546 unsigned char C1INV:1;
547 unsigned char C2INV:1;
548 unsigned char C1OUT:1;
549 unsigned char C2OUT:1;
552 extern volatile __CMCON0_bits_t __at(CMCON0_ADDR) CMCON0_bits;
554 #define CM0 CMCON0_bits.CM0
555 #define CM1 CMCON0_bits.CM1
556 #define CM2 CMCON0_bits.CM2
557 #define CIS CMCON0_bits.CIS
558 #define C1INV CMCON0_bits.C1INV
559 #define C2INV CMCON0_bits.C2INV
560 #define C1OUT CMCON0_bits.C1OUT
561 #define C2OUT CMCON0_bits.C2OUT
563 // ----- CMCON1 bits --------------------
566 unsigned char C2SYNC:1;
567 unsigned char T1GSS:1;
576 extern volatile __CMCON1_bits_t __at(CMCON1_ADDR) CMCON1_bits;
578 #define C2SYNC CMCON1_bits.C2SYNC
579 #define T1GSS CMCON1_bits.T1GSS
581 // ----- EECON1 bits --------------------
586 unsigned char WREN:1;
587 unsigned char WRERR:1;
591 unsigned char EEPGD:1;
594 unsigned char EERD:1;
595 unsigned char EEWR:1;
604 extern volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits;
606 #define RD EECON1_bits.RD
607 #define EERD EECON1_bits.EERD
608 #define WR EECON1_bits.WR
609 #define EEWR EECON1_bits.EEWR
610 #define WREN EECON1_bits.WREN
611 #define WRERR EECON1_bits.WRERR
612 #define EEPGD EECON1_bits.EEPGD
614 // ----- INTCON bits --------------------
617 unsigned char RBIF:1;
618 unsigned char INTF:1;
619 unsigned char T0IF:1;
620 unsigned char RBIE:1;
621 unsigned char INTE:1;
622 unsigned char T0IE:1;
623 unsigned char PEIE:1;
629 unsigned char TMR0IF:1;
632 unsigned char TMR0IE:1;
637 extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits;
639 #define RBIF INTCON_bits.RBIF
640 #define INTF INTCON_bits.INTF
641 #define T0IF INTCON_bits.T0IF
642 #define TMR0IF INTCON_bits.TMR0IF
643 #define RBIE INTCON_bits.RBIE
644 #define INTE INTCON_bits.INTE
645 #define T0IE INTCON_bits.T0IE
646 #define TMR0IE INTCON_bits.TMR0IE
647 #define PEIE INTCON_bits.PEIE
648 #define GIE INTCON_bits.GIE
650 // ----- IOC bits --------------------
657 unsigned char IOC4:1;
658 unsigned char IOC5:1;
659 unsigned char IOC6:1;
660 unsigned char IOC7:1;
663 extern volatile __IOC_bits_t __at(IOC_ADDR) IOC_bits;
665 #define IOC4 IOC_bits.IOC4
666 #define IOC5 IOC_bits.IOC5
667 #define IOC6 IOC_bits.IOC6
668 #define IOC7 IOC_bits.IOC7
670 // ----- IOCB bits --------------------
677 unsigned char IOCB4:1;
678 unsigned char IOCB5:1;
679 unsigned char IOCB6:1;
680 unsigned char IOCB7:1;
683 extern volatile __IOCB_bits_t __at(IOCB_ADDR) IOCB_bits;
685 #define IOCB4 IOCB_bits.IOCB4
686 #define IOCB5 IOCB_bits.IOCB5
687 #define IOCB6 IOCB_bits.IOCB6
688 #define IOCB7 IOCB_bits.IOCB7
690 // ----- LCDCON bits --------------------
693 unsigned char LMUX0:1;
694 unsigned char LMUX1:1;
697 unsigned char VLCDEN:1;
698 unsigned char WERR:1;
699 unsigned char SLPEN:1;
700 unsigned char LCDEN:1;
703 extern volatile __LCDCON_bits_t __at(LCDCON_ADDR) LCDCON_bits;
705 #define LMUX0 LCDCON_bits.LMUX0
706 #define LMUX1 LCDCON_bits.LMUX1
707 #define CS0 LCDCON_bits.CS0
708 #define CS1 LCDCON_bits.CS1
709 #define VLCDEN LCDCON_bits.VLCDEN
710 #define WERR LCDCON_bits.WERR
711 #define SLPEN LCDCON_bits.SLPEN
712 #define LCDEN LCDCON_bits.LCDEN
714 // ----- LCDDATA0 bits --------------------
717 unsigned char SEG0COM0:1;
718 unsigned char SEG1COM0:1;
719 unsigned char SEG2COM0:1;
720 unsigned char SEG3COM0:1;
721 unsigned char SEG4COM0:1;
722 unsigned char SEG5COM0:1;
723 unsigned char SEG6COM0:1;
724 unsigned char SEG7COM0:1;
727 unsigned char S0C0:1;
728 unsigned char S1C0:1;
729 unsigned char S2C0:1;
730 unsigned char S3C0:1;
731 unsigned char S4C0:1;
732 unsigned char S5C0:1;
733 unsigned char S6C0:1;
734 unsigned char S7C0:1;
737 extern volatile __LCDDATA0_bits_t __at(LCDDATA0_ADDR) LCDDATA0_bits;
739 #define SEG0COM0 LCDDATA0_bits.SEG0COM0
740 #define S0C0 LCDDATA0_bits.S0C0
741 #define SEG1COM0 LCDDATA0_bits.SEG1COM0
742 #define S1C0 LCDDATA0_bits.S1C0
743 #define SEG2COM0 LCDDATA0_bits.SEG2COM0
744 #define S2C0 LCDDATA0_bits.S2C0
745 #define SEG3COM0 LCDDATA0_bits.SEG3COM0
746 #define S3C0 LCDDATA0_bits.S3C0
747 #define SEG4COM0 LCDDATA0_bits.SEG4COM0
748 #define S4C0 LCDDATA0_bits.S4C0
749 #define SEG5COM0 LCDDATA0_bits.SEG5COM0
750 #define S5C0 LCDDATA0_bits.S5C0
751 #define SEG6COM0 LCDDATA0_bits.SEG6COM0
752 #define S6C0 LCDDATA0_bits.S6C0
753 #define SEG7COM0 LCDDATA0_bits.SEG7COM0
754 #define S7C0 LCDDATA0_bits.S7C0
756 // ----- LCDDATA1 bits --------------------
759 unsigned char SEG8COM0:1;
760 unsigned char SEG9COM0:1;
761 unsigned char SEG10COM0:1;
762 unsigned char SEG11COM0:1;
763 unsigned char SEG12COM0:1;
764 unsigned char SEG13COM0:1;
765 unsigned char SEG14COM0:1;
766 unsigned char SEG15COM0:1;
769 unsigned char S8C0:1;
770 unsigned char S9C0:1;
771 unsigned char S10C0:1;
772 unsigned char S11C0:1;
773 unsigned char S12C0:1;
774 unsigned char S13C0:1;
775 unsigned char S14C0:1;
776 unsigned char S15C0:1;
779 extern volatile __LCDDATA1_bits_t __at(LCDDATA1_ADDR) LCDDATA1_bits;
781 #define SEG8COM0 LCDDATA1_bits.SEG8COM0
782 #define S8C0 LCDDATA1_bits.S8C0
783 #define SEG9COM0 LCDDATA1_bits.SEG9COM0
784 #define S9C0 LCDDATA1_bits.S9C0
785 #define SEG10COM0 LCDDATA1_bits.SEG10COM0
786 #define S10C0 LCDDATA1_bits.S10C0
787 #define SEG11COM0 LCDDATA1_bits.SEG11COM0
788 #define S11C0 LCDDATA1_bits.S11C0
789 #define SEG12COM0 LCDDATA1_bits.SEG12COM0
790 #define S12C0 LCDDATA1_bits.S12C0
791 #define SEG13COM0 LCDDATA1_bits.SEG13COM0
792 #define S13C0 LCDDATA1_bits.S13C0
793 #define SEG14COM0 LCDDATA1_bits.SEG14COM0
794 #define S14C0 LCDDATA1_bits.S14C0
795 #define SEG15COM0 LCDDATA1_bits.SEG15COM0
796 #define S15C0 LCDDATA1_bits.S15C0
798 // ----- LCDDATA10 bits --------------------
801 unsigned char SEG8COM3:1;
802 unsigned char SEG9COM3:1;
803 unsigned char SEG10COM3:1;
804 unsigned char SEG11COM3:1;
805 unsigned char SEG12COM3:1;
806 unsigned char SEG13COM3:1;
807 unsigned char SEG14COM3:1;
808 unsigned char SEG15COM3:1;
811 unsigned char S8C3:1;
812 unsigned char S9C3:1;
813 unsigned char S10C3:1;
814 unsigned char S11C3:1;
815 unsigned char S12C3:1;
816 unsigned char S13C3:1;
817 unsigned char S14C3:1;
818 unsigned char S15C3:1;
820 } __LCDDATA10_bits_t;
821 extern volatile __LCDDATA10_bits_t __at(LCDDATA10_ADDR) LCDDATA10_bits;
823 #define SEG8COM3 LCDDATA10_bits.SEG8COM3
824 #define S8C3 LCDDATA10_bits.S8C3
825 #define SEG9COM3 LCDDATA10_bits.SEG9COM3
826 #define S9C3 LCDDATA10_bits.S9C3
827 #define SEG10COM3 LCDDATA10_bits.SEG10COM3
828 #define S10C3 LCDDATA10_bits.S10C3
829 #define SEG11COM3 LCDDATA10_bits.SEG11COM3
830 #define S11C3 LCDDATA10_bits.S11C3
831 #define SEG12COM3 LCDDATA10_bits.SEG12COM3
832 #define S12C3 LCDDATA10_bits.S12C3
833 #define SEG13COM3 LCDDATA10_bits.SEG13COM3
834 #define S13C3 LCDDATA10_bits.S13C3
835 #define SEG14COM3 LCDDATA10_bits.SEG14COM3
836 #define S14C3 LCDDATA10_bits.S14C3
837 #define SEG15COM3 LCDDATA10_bits.SEG15COM3
838 #define S15C3 LCDDATA10_bits.S15C3
840 // ----- LCDDATA3 bits --------------------
843 unsigned char SEG0COM1:1;
844 unsigned char SEG1COM1:1;
845 unsigned char SEG2COM1:1;
846 unsigned char SEG3COM1:1;
847 unsigned char SEG4COM1:1;
848 unsigned char SEG5COM1:1;
849 unsigned char SEG6COM1:1;
850 unsigned char SEG7COM1:1;
853 unsigned char S0C1:1;
854 unsigned char S1C1:1;
855 unsigned char S2C1:1;
856 unsigned char S3C1:1;
857 unsigned char S4C1:1;
858 unsigned char S5C1:1;
859 unsigned char S6C1:1;
860 unsigned char S7C1:1;
863 extern volatile __LCDDATA3_bits_t __at(LCDDATA3_ADDR) LCDDATA3_bits;
865 #define SEG0COM1 LCDDATA3_bits.SEG0COM1
866 #define S0C1 LCDDATA3_bits.S0C1
867 #define SEG1COM1 LCDDATA3_bits.SEG1COM1
868 #define S1C1 LCDDATA3_bits.S1C1
869 #define SEG2COM1 LCDDATA3_bits.SEG2COM1
870 #define S2C1 LCDDATA3_bits.S2C1
871 #define SEG3COM1 LCDDATA3_bits.SEG3COM1
872 #define S3C1 LCDDATA3_bits.S3C1
873 #define SEG4COM1 LCDDATA3_bits.SEG4COM1
874 #define S4C1 LCDDATA3_bits.S4C1
875 #define SEG5COM1 LCDDATA3_bits.SEG5COM1
876 #define S5C1 LCDDATA3_bits.S5C1
877 #define SEG6COM1 LCDDATA3_bits.SEG6COM1
878 #define S6C1 LCDDATA3_bits.S6C1
879 #define SEG7COM1 LCDDATA3_bits.SEG7COM1
880 #define S7C1 LCDDATA3_bits.S7C1
882 // ----- LCDDATA4 bits --------------------
885 unsigned char SEG8COM1:1;
886 unsigned char SEG9COM1:1;
887 unsigned char SEG10COM1:1;
888 unsigned char SEG11COM1:1;
889 unsigned char SEG12COM1:1;
890 unsigned char SEG13COM1:1;
891 unsigned char SEG14COM1:1;
892 unsigned char SEG15COM1:1;
895 unsigned char S8C1:1;
896 unsigned char S9C1:1;
897 unsigned char S10C1:1;
898 unsigned char S11C1:1;
899 unsigned char S12C1:1;
900 unsigned char S13C1:1;
901 unsigned char S14C1:1;
902 unsigned char S15C1:1;
905 extern volatile __LCDDATA4_bits_t __at(LCDDATA4_ADDR) LCDDATA4_bits;
907 #define SEG8COM1 LCDDATA4_bits.SEG8COM1
908 #define S8C1 LCDDATA4_bits.S8C1
909 #define SEG9COM1 LCDDATA4_bits.SEG9COM1
910 #define S9C1 LCDDATA4_bits.S9C1
911 #define SEG10COM1 LCDDATA4_bits.SEG10COM1
912 #define S10C1 LCDDATA4_bits.S10C1
913 #define SEG11COM1 LCDDATA4_bits.SEG11COM1
914 #define S11C1 LCDDATA4_bits.S11C1
915 #define SEG12COM1 LCDDATA4_bits.SEG12COM1
916 #define S12C1 LCDDATA4_bits.S12C1
917 #define SEG13COM1 LCDDATA4_bits.SEG13COM1
918 #define S13C1 LCDDATA4_bits.S13C1
919 #define SEG14COM1 LCDDATA4_bits.SEG14COM1
920 #define S14C1 LCDDATA4_bits.S14C1
921 #define SEG15COM1 LCDDATA4_bits.SEG15COM1
922 #define S15C1 LCDDATA4_bits.S15C1
924 // ----- LCDDATA6 bits --------------------
927 unsigned char SEG0COM2:1;
928 unsigned char SEG1COM2:1;
929 unsigned char SEG2COM2:1;
930 unsigned char SEG3COM2:1;
931 unsigned char SEG4COM2:1;
932 unsigned char SEG5COM2:1;
933 unsigned char SEG6COM2:1;
934 unsigned char SEG7COM2:1;
937 unsigned char S0C2:1;
938 unsigned char S1C2:1;
939 unsigned char S2C2:1;
940 unsigned char S3C2:1;
941 unsigned char S4C2:1;
942 unsigned char S5C2:1;
943 unsigned char S6C2:1;
944 unsigned char S7C2:1;
947 extern volatile __LCDDATA6_bits_t __at(LCDDATA6_ADDR) LCDDATA6_bits;
949 #define SEG0COM2 LCDDATA6_bits.SEG0COM2
950 #define S0C2 LCDDATA6_bits.S0C2
951 #define SEG1COM2 LCDDATA6_bits.SEG1COM2
952 #define S1C2 LCDDATA6_bits.S1C2
953 #define SEG2COM2 LCDDATA6_bits.SEG2COM2
954 #define S2C2 LCDDATA6_bits.S2C2
955 #define SEG3COM2 LCDDATA6_bits.SEG3COM2
956 #define S3C2 LCDDATA6_bits.S3C2
957 #define SEG4COM2 LCDDATA6_bits.SEG4COM2
958 #define S4C2 LCDDATA6_bits.S4C2
959 #define SEG5COM2 LCDDATA6_bits.SEG5COM2
960 #define S5C2 LCDDATA6_bits.S5C2
961 #define SEG6COM2 LCDDATA6_bits.SEG6COM2
962 #define S6C2 LCDDATA6_bits.S6C2
963 #define SEG7COM2 LCDDATA6_bits.SEG7COM2
964 #define S7C2 LCDDATA6_bits.S7C2
966 // ----- LCDDATA7 bits --------------------
969 unsigned char SEG8COM2:1;
970 unsigned char SEG9COM2:1;
971 unsigned char SEG10COM2:1;
972 unsigned char SEG11COM2:1;
973 unsigned char SEG12COM2:1;
974 unsigned char SEG13COM2:1;
975 unsigned char SEG14COM2:1;
976 unsigned char SEG15COM2:1;
979 unsigned char S8C2:1;
980 unsigned char S9C2:1;
981 unsigned char S10C2:1;
982 unsigned char S11C2:1;
983 unsigned char S12C2:1;
984 unsigned char S13C2:1;
985 unsigned char S14C2:1;
986 unsigned char S15C2:1;
989 extern volatile __LCDDATA7_bits_t __at(LCDDATA7_ADDR) LCDDATA7_bits;
991 #define SEG8COM2 LCDDATA7_bits.SEG8COM2
992 #define S8C2 LCDDATA7_bits.S8C2
993 #define SEG9COM2 LCDDATA7_bits.SEG9COM2
994 #define S9C2 LCDDATA7_bits.S9C2
995 #define SEG10COM2 LCDDATA7_bits.SEG10COM2
996 #define S10C2 LCDDATA7_bits.S10C2
997 #define SEG11COM2 LCDDATA7_bits.SEG11COM2
998 #define S11C2 LCDDATA7_bits.S11C2
999 #define SEG12COM2 LCDDATA7_bits.SEG12COM2
1000 #define S12C2 LCDDATA7_bits.S12C2
1001 #define SEG13COM2 LCDDATA7_bits.SEG13COM2
1002 #define S13C2 LCDDATA7_bits.S13C2
1003 #define SEG14COM2 LCDDATA7_bits.SEG14COM2
1004 #define S14C2 LCDDATA7_bits.S14C2
1005 #define SEG15COM2 LCDDATA7_bits.SEG15COM2
1006 #define S15C2 LCDDATA7_bits.S15C2
1008 // ----- LCDDATA9 bits --------------------
1011 unsigned char SEG0COM3:1;
1012 unsigned char SEG1COM3:1;
1013 unsigned char SEG2COM3:1;
1014 unsigned char SEG3COM3:1;
1015 unsigned char SEG4COM3:1;
1016 unsigned char SEG5COM3:1;
1017 unsigned char SEG6COM3:1;
1018 unsigned char SEG7COM3:1;
1021 unsigned char S0C3:1;
1022 unsigned char S1C3:1;
1023 unsigned char S2C3:1;
1024 unsigned char S3C3:1;
1025 unsigned char S4C3:1;
1026 unsigned char S5C3:1;
1027 unsigned char S6C3:1;
1028 unsigned char S7C3:1;
1030 } __LCDDATA9_bits_t;
1031 extern volatile __LCDDATA9_bits_t __at(LCDDATA9_ADDR) LCDDATA9_bits;
1033 #define SEG0COM3 LCDDATA9_bits.SEG0COM3
1034 #define S0C3 LCDDATA9_bits.S0C3
1035 #define SEG1COM3 LCDDATA9_bits.SEG1COM3
1036 #define S1C3 LCDDATA9_bits.S1C3
1037 #define SEG2COM3 LCDDATA9_bits.SEG2COM3
1038 #define S2C3 LCDDATA9_bits.S2C3
1039 #define SEG3COM3 LCDDATA9_bits.SEG3COM3
1040 #define S3C3 LCDDATA9_bits.S3C3
1041 #define SEG4COM3 LCDDATA9_bits.SEG4COM3
1042 #define S4C3 LCDDATA9_bits.S4C3
1043 #define SEG5COM3 LCDDATA9_bits.SEG5COM3
1044 #define S5C3 LCDDATA9_bits.S5C3
1045 #define SEG6COM3 LCDDATA9_bits.SEG6COM3
1046 #define S6C3 LCDDATA9_bits.S6C3
1047 #define SEG7COM3 LCDDATA9_bits.SEG7COM3
1048 #define S7C3 LCDDATA9_bits.S7C3
1050 // ----- LCDPS bits --------------------
1053 unsigned char LP0:1;
1054 unsigned char LP1:1;
1055 unsigned char LP2:1;
1056 unsigned char LP3:1;
1058 unsigned char LCDA:1;
1059 unsigned char BIASMD:1;
1060 unsigned char WFT:1;
1063 extern volatile __LCDPS_bits_t __at(LCDPS_ADDR) LCDPS_bits;
1065 #define LP0 LCDPS_bits.LP0
1066 #define LP1 LCDPS_bits.LP1
1067 #define LP2 LCDPS_bits.LP2
1068 #define LP3 LCDPS_bits.LP3
1069 #define WA LCDPS_bits.WA
1070 #define LCDA LCDPS_bits.LCDA
1071 #define BIASMD LCDPS_bits.BIASMD
1072 #define WFT LCDPS_bits.WFT
1074 // ----- LCDSE0 bits --------------------
1077 unsigned char SE0:1;
1078 unsigned char SE1:1;
1079 unsigned char SE2:1;
1080 unsigned char SE3:1;
1081 unsigned char SE4:1;
1082 unsigned char SE5:1;
1083 unsigned char SE6:1;
1084 unsigned char SE7:1;
1087 unsigned char SEGEN0:1;
1088 unsigned char SEGEN1:1;
1089 unsigned char SEGEN2:1;
1090 unsigned char SEGEN3:1;
1091 unsigned char SEGEN4:1;
1092 unsigned char SEGEN5:1;
1093 unsigned char SEGEN6:1;
1094 unsigned char SEGEN7:1;
1097 extern volatile __LCDSE0_bits_t __at(LCDSE0_ADDR) LCDSE0_bits;
1099 #define SE0 LCDSE0_bits.SE0
1100 #define SEGEN0 LCDSE0_bits.SEGEN0
1101 #define SE1 LCDSE0_bits.SE1
1102 #define SEGEN1 LCDSE0_bits.SEGEN1
1103 #define SE2 LCDSE0_bits.SE2
1104 #define SEGEN2 LCDSE0_bits.SEGEN2
1105 #define SE3 LCDSE0_bits.SE3
1106 #define SEGEN3 LCDSE0_bits.SEGEN3
1107 #define SE4 LCDSE0_bits.SE4
1108 #define SEGEN4 LCDSE0_bits.SEGEN4
1109 #define SE5 LCDSE0_bits.SE5
1110 #define SEGEN5 LCDSE0_bits.SEGEN5
1111 #define SE6 LCDSE0_bits.SE6
1112 #define SEGEN6 LCDSE0_bits.SEGEN6
1113 #define SE7 LCDSE0_bits.SE7
1114 #define SEGEN7 LCDSE0_bits.SEGEN7
1116 // ----- LCDSE1 bits --------------------
1119 unsigned char SE8:1;
1120 unsigned char SE9:1;
1121 unsigned char SE10:1;
1122 unsigned char SE11:1;
1123 unsigned char SE12:1;
1124 unsigned char SE13:1;
1125 unsigned char SE14:1;
1126 unsigned char SE15:1;
1129 unsigned char SEGEN8:1;
1130 unsigned char SEGEN9:1;
1131 unsigned char SEGEN10:1;
1132 unsigned char SEGEN11:1;
1133 unsigned char SEGEN12:1;
1134 unsigned char SEGEN13:1;
1135 unsigned char SEGEN14:1;
1136 unsigned char SEGEN15:1;
1139 extern volatile __LCDSE1_bits_t __at(LCDSE1_ADDR) LCDSE1_bits;
1141 #define SE8 LCDSE1_bits.SE8
1142 #define SEGEN8 LCDSE1_bits.SEGEN8
1143 #define SE9 LCDSE1_bits.SE9
1144 #define SEGEN9 LCDSE1_bits.SEGEN9
1145 #define SE10 LCDSE1_bits.SE10
1146 #define SEGEN10 LCDSE1_bits.SEGEN10
1147 #define SE11 LCDSE1_bits.SE11
1148 #define SEGEN11 LCDSE1_bits.SEGEN11
1149 #define SE12 LCDSE1_bits.SE12
1150 #define SEGEN12 LCDSE1_bits.SEGEN12
1151 #define SE13 LCDSE1_bits.SE13
1152 #define SEGEN13 LCDSE1_bits.SEGEN13
1153 #define SE14 LCDSE1_bits.SE14
1154 #define SEGEN14 LCDSE1_bits.SEGEN14
1155 #define SE15 LCDSE1_bits.SE15
1156 #define SEGEN15 LCDSE1_bits.SEGEN15
1158 // ----- LVDCON bits --------------------
1161 unsigned char LVDL0:1;
1162 unsigned char LVDL1:1;
1163 unsigned char LVDL2:1;
1165 unsigned char LVDEN:1;
1166 unsigned char IRVST:1;
1171 extern volatile __LVDCON_bits_t __at(LVDCON_ADDR) LVDCON_bits;
1173 #define LVDL0 LVDCON_bits.LVDL0
1174 #define LVDL1 LVDCON_bits.LVDL1
1175 #define LVDL2 LVDCON_bits.LVDL2
1176 #define LVDEN LVDCON_bits.LVDEN
1177 #define IRVST LVDCON_bits.IRVST
1179 // ----- OPTION_REG bits --------------------
1182 unsigned char PS0:1;
1183 unsigned char PS1:1;
1184 unsigned char PS2:1;
1185 unsigned char PSA:1;
1186 unsigned char T0SE:1;
1187 unsigned char T0CS:1;
1188 unsigned char INTEDG:1;
1189 unsigned char NOT_RBPU:1;
1191 } __OPTION_REG_bits_t;
1192 extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits;
1194 #define PS0 OPTION_REG_bits.PS0
1195 #define PS1 OPTION_REG_bits.PS1
1196 #define PS2 OPTION_REG_bits.PS2
1197 #define PSA OPTION_REG_bits.PSA
1198 #define T0SE OPTION_REG_bits.T0SE
1199 #define T0CS OPTION_REG_bits.T0CS
1200 #define INTEDG OPTION_REG_bits.INTEDG
1201 #define NOT_RBPU OPTION_REG_bits.NOT_RBPU
1203 // ----- OSCCON bits --------------------
1206 unsigned char SCS:1;
1207 unsigned char LTS:1;
1208 unsigned char HTS:1;
1209 unsigned char OSTS:1;
1210 unsigned char IRCF0:1;
1211 unsigned char IRCF1:1;
1212 unsigned char IRCF2:1;
1216 extern volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits;
1218 #define SCS OSCCON_bits.SCS
1219 #define LTS OSCCON_bits.LTS
1220 #define HTS OSCCON_bits.HTS
1221 #define OSTS OSCCON_bits.OSTS
1222 #define IRCF0 OSCCON_bits.IRCF0
1223 #define IRCF1 OSCCON_bits.IRCF1
1224 #define IRCF2 OSCCON_bits.IRCF2
1226 // ----- OSCTUNE bits --------------------
1229 unsigned char TUN0:1;
1230 unsigned char TUN1:1;
1231 unsigned char TUN2:1;
1232 unsigned char TUN3:1;
1233 unsigned char TUN4:1;
1239 extern volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits;
1241 #define TUN0 OSCTUNE_bits.TUN0
1242 #define TUN1 OSCTUNE_bits.TUN1
1243 #define TUN2 OSCTUNE_bits.TUN2
1244 #define TUN3 OSCTUNE_bits.TUN3
1245 #define TUN4 OSCTUNE_bits.TUN4
1247 // ----- PCON bits --------------------
1250 unsigned char NOT_BO:1;
1251 unsigned char NOT_POR:1;
1254 unsigned char SBOREN:1;
1260 unsigned char NOT_BOR:1;
1270 extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits;
1272 #define NOT_BO PCON_bits.NOT_BO
1273 #define NOT_BOR PCON_bits.NOT_BOR
1274 #define NOT_POR PCON_bits.NOT_POR
1275 #define SBOREN PCON_bits.SBOREN
1277 // ----- PIE1 bits --------------------
1280 unsigned char TMR1IE:1;
1281 unsigned char TMR2IE:1;
1282 unsigned char CCP1IE:1;
1283 unsigned char SSPIE:1;
1284 unsigned char TXIE:1;
1285 unsigned char RCIE:1;
1286 unsigned char ADIE:1;
1287 unsigned char EEIE:1;
1290 extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits;
1292 #define TMR1IE PIE1_bits.TMR1IE
1293 #define TMR2IE PIE1_bits.TMR2IE
1294 #define CCP1IE PIE1_bits.CCP1IE
1295 #define SSPIE PIE1_bits.SSPIE
1296 #define TXIE PIE1_bits.TXIE
1297 #define RCIE PIE1_bits.RCIE
1298 #define ADIE PIE1_bits.ADIE
1299 #define EEIE PIE1_bits.EEIE
1301 // ----- PIE2 bits --------------------
1306 unsigned char LVDIE:1;
1308 unsigned char LCDIE:1;
1309 unsigned char C1IE:1;
1310 unsigned char C2IE:1;
1311 unsigned char OSFIE:1;
1314 extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits;
1316 #define LVDIE PIE2_bits.LVDIE
1317 #define LCDIE PIE2_bits.LCDIE
1318 #define C1IE PIE2_bits.C1IE
1319 #define C2IE PIE2_bits.C2IE
1320 #define OSFIE PIE2_bits.OSFIE
1322 // ----- PIR1 bits --------------------
1325 unsigned char TMR1IF:1;
1326 unsigned char TMR2IF:1;
1327 unsigned char CCP1IF:1;
1328 unsigned char SSPIF:1;
1329 unsigned char TXIF:1;
1330 unsigned char RCIF:1;
1331 unsigned char ADIF:1;
1332 unsigned char EEIF:1;
1335 extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits;
1337 #define TMR1IF PIR1_bits.TMR1IF
1338 #define TMR2IF PIR1_bits.TMR2IF
1339 #define CCP1IF PIR1_bits.CCP1IF
1340 #define SSPIF PIR1_bits.SSPIF
1341 #define TXIF PIR1_bits.TXIF
1342 #define RCIF PIR1_bits.RCIF
1343 #define ADIF PIR1_bits.ADIF
1344 #define EEIF PIR1_bits.EEIF
1346 // ----- PIR2 bits --------------------
1351 unsigned char LVDIF:1;
1353 unsigned char LCDIF:1;
1354 unsigned char C1IF:1;
1355 unsigned char C2IF:1;
1356 unsigned char OSFIF:1;
1359 extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits;
1361 #define LVDIF PIR2_bits.LVDIF
1362 #define LCDIF PIR2_bits.LCDIF
1363 #define C1IF PIR2_bits.C1IF
1364 #define C2IF PIR2_bits.C2IF
1365 #define OSFIF PIR2_bits.OSFIF
1367 // ----- RCSTA bits --------------------
1370 unsigned char RX9D:1;
1371 unsigned char OERR:1;
1372 unsigned char FERR:1;
1373 unsigned char ADDEN:1;
1374 unsigned char CREN:1;
1375 unsigned char SREN:1;
1376 unsigned char RX9:1;
1377 unsigned char SPEN:1;
1380 unsigned char RCD8:1;
1386 unsigned char RC9:1;
1396 unsigned char NOT_RC8:1;
1406 unsigned char RC8_9:1;
1410 extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits;
1412 #define RX9D RCSTA_bits.RX9D
1413 #define RCD8 RCSTA_bits.RCD8
1414 #define OERR RCSTA_bits.OERR
1415 #define FERR RCSTA_bits.FERR
1416 #define ADDEN RCSTA_bits.ADDEN
1417 #define CREN RCSTA_bits.CREN
1418 #define SREN RCSTA_bits.SREN
1419 #define RX9 RCSTA_bits.RX9
1420 #define RC9 RCSTA_bits.RC9
1421 #define NOT_RC8 RCSTA_bits.NOT_RC8
1422 #define RC8_9 RCSTA_bits.RC8_9
1423 #define SPEN RCSTA_bits.SPEN
1425 // ----- SSPCON bits --------------------
1428 unsigned char SSPM0:1;
1429 unsigned char SSPM1:1;
1430 unsigned char SSPM2:1;
1431 unsigned char SSPM3:1;
1432 unsigned char CKP:1;
1433 unsigned char SSPEN:1;
1434 unsigned char SSPOV:1;
1435 unsigned char WCOL:1;
1438 extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits;
1440 #define SSPM0 SSPCON_bits.SSPM0
1441 #define SSPM1 SSPCON_bits.SSPM1
1442 #define SSPM2 SSPCON_bits.SSPM2
1443 #define SSPM3 SSPCON_bits.SSPM3
1444 #define CKP SSPCON_bits.CKP
1445 #define SSPEN SSPCON_bits.SSPEN
1446 #define SSPOV SSPCON_bits.SSPOV
1447 #define WCOL SSPCON_bits.WCOL
1449 // ----- SSPSTAT bits --------------------
1458 unsigned char CKE:1;
1459 unsigned char SMP:1;
1464 unsigned char I2C_READ:1;
1465 unsigned char I2C_START:1;
1466 unsigned char I2C_STOP:1;
1467 unsigned char I2C_DATA:1;
1474 unsigned char NOT_W:1;
1477 unsigned char NOT_A:1;
1484 unsigned char NOT_WRITE:1;
1487 unsigned char NOT_ADDRESS:1;
1494 unsigned char R_W:1;
1497 unsigned char D_A:1;
1504 unsigned char READ_WRITE:1;
1507 unsigned char DATA_ADDRESS:1;
1512 extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits;
1514 #define BF SSPSTAT_bits.BF
1515 #define UA SSPSTAT_bits.UA
1516 #define R SSPSTAT_bits.R
1517 #define I2C_READ SSPSTAT_bits.I2C_READ
1518 #define NOT_W SSPSTAT_bits.NOT_W
1519 #define NOT_WRITE SSPSTAT_bits.NOT_WRITE
1520 #define R_W SSPSTAT_bits.R_W
1521 #define READ_WRITE SSPSTAT_bits.READ_WRITE
1522 #define S SSPSTAT_bits.S
1523 #define I2C_START SSPSTAT_bits.I2C_START
1524 #define P SSPSTAT_bits.P
1525 #define I2C_STOP SSPSTAT_bits.I2C_STOP
1526 #define D SSPSTAT_bits.D
1527 #define I2C_DATA SSPSTAT_bits.I2C_DATA
1528 #define NOT_A SSPSTAT_bits.NOT_A
1529 #define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS
1530 #define D_A SSPSTAT_bits.D_A
1531 #define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS
1532 #define CKE SSPSTAT_bits.CKE
1533 #define SMP SSPSTAT_bits.SMP
1535 // ----- STATUS bits --------------------
1541 unsigned char NOT_PD:1;
1542 unsigned char NOT_TO:1;
1543 unsigned char RP0:1;
1544 unsigned char RP1:1;
1545 unsigned char IRP:1;
1548 extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits;
1550 #define C STATUS_bits.C
1551 #define DC STATUS_bits.DC
1552 #define Z STATUS_bits.Z
1553 #define NOT_PD STATUS_bits.NOT_PD
1554 #define NOT_TO STATUS_bits.NOT_TO
1555 #define RP0 STATUS_bits.RP0
1556 #define RP1 STATUS_bits.RP1
1557 #define IRP STATUS_bits.IRP
1559 // ----- T1CON bits --------------------
1562 unsigned char TMR1ON:1;
1563 unsigned char TMR1CS:1;
1564 unsigned char NOT_T1SYNC:1;
1565 unsigned char T1OSCEN:1;
1566 unsigned char T1CKPS0:1;
1567 unsigned char T1CKPS1:1;
1568 unsigned char T1GE:1;
1569 unsigned char T1GINV:1;
1574 unsigned char T1INSYNC:1;
1584 unsigned char T1SYNC:1;
1592 extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits;
1594 #define TMR1ON T1CON_bits.TMR1ON
1595 #define TMR1CS T1CON_bits.TMR1CS
1596 #define NOT_T1SYNC T1CON_bits.NOT_T1SYNC
1597 #define T1INSYNC T1CON_bits.T1INSYNC
1598 #define T1SYNC T1CON_bits.T1SYNC
1599 #define T1OSCEN T1CON_bits.T1OSCEN
1600 #define T1CKPS0 T1CON_bits.T1CKPS0
1601 #define T1CKPS1 T1CON_bits.T1CKPS1
1602 #define T1GE T1CON_bits.T1GE
1603 #define T1GINV T1CON_bits.T1GINV
1605 // ----- T2CON bits --------------------
1608 unsigned char T2CKPS0:1;
1609 unsigned char T2CKPS1:1;
1610 unsigned char TMR2ON:1;
1611 unsigned char TOUTPS0:1;
1612 unsigned char TOUTPS1:1;
1613 unsigned char TOUTPS2:1;
1614 unsigned char TOUTPS3:1;
1618 extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits;
1620 #define T2CKPS0 T2CON_bits.T2CKPS0
1621 #define T2CKPS1 T2CON_bits.T2CKPS1
1622 #define TMR2ON T2CON_bits.TMR2ON
1623 #define TOUTPS0 T2CON_bits.TOUTPS0
1624 #define TOUTPS1 T2CON_bits.TOUTPS1
1625 #define TOUTPS2 T2CON_bits.TOUTPS2
1626 #define TOUTPS3 T2CON_bits.TOUTPS3
1628 // ----- TXSTA bits --------------------
1631 unsigned char TX9D:1;
1632 unsigned char TRMT:1;
1633 unsigned char BRGH:1;
1635 unsigned char SYNC:1;
1636 unsigned char TXEN:1;
1637 unsigned char TX9:1;
1638 unsigned char CSRC:1;
1641 unsigned char TXD8:1;
1647 unsigned char NOT_TX8:1;
1657 unsigned char TX8_9:1;
1661 extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits;
1663 #define TX9D TXSTA_bits.TX9D
1664 #define TXD8 TXSTA_bits.TXD8
1665 #define TRMT TXSTA_bits.TRMT
1666 #define BRGH TXSTA_bits.BRGH
1667 #define SYNC TXSTA_bits.SYNC
1668 #define TXEN TXSTA_bits.TXEN
1669 #define TX9 TXSTA_bits.TX9
1670 #define NOT_TX8 TXSTA_bits.NOT_TX8
1671 #define TX8_9 TXSTA_bits.TX8_9
1672 #define CSRC TXSTA_bits.CSRC
1674 // ----- VRCON bits --------------------
1677 unsigned char VR0:1;
1678 unsigned char VR1:1;
1679 unsigned char VR2:1;
1680 unsigned char VR3:1;
1682 unsigned char VRR:1;
1684 unsigned char VREN:1;
1687 extern volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits;
1689 #define VR0 VRCON_bits.VR0
1690 #define VR1 VRCON_bits.VR1
1691 #define VR2 VRCON_bits.VR2
1692 #define VR3 VRCON_bits.VR3
1693 #define VRR VRCON_bits.VRR
1694 #define VREN VRCON_bits.VREN
1696 // ----- WDTCON bits --------------------
1699 unsigned char SWDTEN:1;
1700 unsigned char WDTPS0:1;
1701 unsigned char WDTPS1:1;
1702 unsigned char WDTPS2:1;
1703 unsigned char WDTPS3:1;
1709 unsigned char SWDTE:1;
1719 extern volatile __WDTCON_bits_t __at(WDTCON_ADDR) WDTCON_bits;
1721 #define SWDTEN WDTCON_bits.SWDTEN
1722 #define SWDTE WDTCON_bits.SWDTE
1723 #define WDTPS0 WDTCON_bits.WDTPS0
1724 #define WDTPS1 WDTCON_bits.WDTPS1
1725 #define WDTPS2 WDTCON_bits.WDTPS2
1726 #define WDTPS3 WDTCON_bits.WDTPS3
1728 // ----- WPU bits --------------------
1731 unsigned char WPU0:1;
1732 unsigned char WPU1:1;
1733 unsigned char WPU2:1;
1734 unsigned char WPU3:1;
1735 unsigned char WPU4:1;
1736 unsigned char WPU5:1;
1737 unsigned char WPU6:1;
1738 unsigned char WPU7:1;
1741 extern volatile __WPU_bits_t __at(WPU_ADDR) WPU_bits;
1743 #define WPU0 WPU_bits.WPU0
1744 #define WPU1 WPU_bits.WPU1
1745 #define WPU2 WPU_bits.WPU2
1746 #define WPU3 WPU_bits.WPU3
1747 #define WPU4 WPU_bits.WPU4
1748 #define WPU5 WPU_bits.WPU5
1749 #define WPU6 WPU_bits.WPU6
1750 #define WPU7 WPU_bits.WPU7
1752 // ----- WPUB bits --------------------
1755 unsigned char WPUB0:1;
1756 unsigned char WPUB1:1;
1757 unsigned char WPUB2:1;
1758 unsigned char WPUB3:1;
1759 unsigned char WPUB4:1;
1760 unsigned char WPUB5:1;
1761 unsigned char WPUB6:1;
1762 unsigned char WPUB7:1;
1765 extern volatile __WPUB_bits_t __at(WPUB_ADDR) WPUB_bits;
1767 #define WPUB0 WPUB_bits.WPUB0
1768 #define WPUB1 WPUB_bits.WPUB1
1769 #define WPUB2 WPUB_bits.WPUB2
1770 #define WPUB3 WPUB_bits.WPUB3
1771 #define WPUB4 WPUB_bits.WPUB4
1772 #define WPUB5 WPUB_bits.WPUB5
1773 #define WPUB6 WPUB_bits.WPUB6
1774 #define WPUB7 WPUB_bits.WPUB7