2 // Register Declarations for Microchip 16F887 Processor
5 // This header file was automatically generated by:
9 // Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved
11 // SDCC is licensed under the GNU Public license (GPL) v2. Note that
12 // this license covers the code to the compiler and other executables,
13 // but explicitly does not cover any code or objects generated by sdcc.
14 // We have not yet decided on a license for the run time libraries, but
15 // it will not put any requirements on code linked against it. See:
17 // http://www.gnu.org/copyleft/gpl/html
19 // See http://sdcc.sourceforge.net/ for the latest information on sdcc.
26 // Register addresses.
28 #define INDF_ADDR 0x0000
29 #define TMR0_ADDR 0x0001
30 #define PCL_ADDR 0x0002
31 #define STATUS_ADDR 0x0003
32 #define FSR_ADDR 0x0004
33 #define PORTA_ADDR 0x0005
34 #define PORTB_ADDR 0x0006
35 #define PORTC_ADDR 0x0007
36 #define PORTD_ADDR 0x0008
37 #define PORTE_ADDR 0x0009
38 #define PCLATH_ADDR 0x000A
39 #define INTCON_ADDR 0x000B
40 #define PIR1_ADDR 0x000C
41 #define PIR2_ADDR 0x000D
42 #define TMR1L_ADDR 0x000E
43 #define TMR1H_ADDR 0x000F
44 #define T1CON_ADDR 0x0010
45 #define TMR2_ADDR 0x0011
46 #define T2CON_ADDR 0x0012
47 #define SSPBUF_ADDR 0x0013
48 #define SSPCON_ADDR 0x0014
49 #define CCPR1L_ADDR 0x0015
50 #define CCPR1H_ADDR 0x0016
51 #define CCP1CON_ADDR 0x0017
52 #define RCSTA_ADDR 0x0018
53 #define TXREG_ADDR 0x0019
54 #define RCREG_ADDR 0x001A
55 #define CCPR2L_ADDR 0x001B
56 #define CCPR2H_ADDR 0x001C
57 #define CCP2CON_ADDR 0x001D
58 #define ADRESH_ADDR 0x001E
59 #define ADCON0_ADDR 0x001F
60 #define OPTION_REG_ADDR 0x0081
61 #define TRISA_ADDR 0x0085
62 #define TRISB_ADDR 0x0086
63 #define TRISC_ADDR 0x0087
64 #define TRISD_ADDR 0x0088
65 #define TRISE_ADDR 0x0089
66 #define PIE1_ADDR 0x008C
67 #define PIE2_ADDR 0x008D
68 #define PCON_ADDR 0x008E
69 #define OSCCON_ADDR 0x008F
70 #define OSCTUNE_ADDR 0x0090
71 #define SSPCON2_ADDR 0x0091
72 #define PR2_ADDR 0x0092
73 #define SSPADD_ADDR 0x0093
74 #define SSPMSK_ADDR 0x0093
75 #define MSK_ADDR 0x0093
76 #define SSPSTAT_ADDR 0x0094
77 #define WPUB_ADDR 0x0095
78 #define IOCB_ADDR 0x0096
79 #define VRCON_ADDR 0x0097
80 #define TXSTA_ADDR 0x0098
81 #define SPBRG_ADDR 0x0099
82 #define SPBRGH_ADDR 0x009A
83 #define PWM1CON_ADDR 0x009B
84 #define ECCPAS_ADDR 0x009C
85 #define PSTRCON_ADDR 0x009D
86 #define ADRESL_ADDR 0x009E
87 #define ADCON1_ADDR 0x009F
88 #define WDTCON_ADDR 0x0105
89 #define CM1CON0_ADDR 0x0107
90 #define CM2CON0_ADDR 0x0108
91 #define CM2CON1_ADDR 0x0109
92 #define EEDATA_ADDR 0x010C
93 #define EEDAT_ADDR 0x010C
94 #define EEADR_ADDR 0x010D
95 #define EEDATH_ADDR 0x010E
96 #define EEADRH_ADDR 0x010F
97 #define SRCON_ADDR 0x0185
98 #define BAUDCTL_ADDR 0x0187
99 #define ANSEL_ADDR 0x0188
100 #define ANSELH_ADDR 0x0189
101 #define EECON1_ADDR 0x018C
102 #define EECON2_ADDR 0x018D
105 // Memory organization.
111 // P16F887.INC Standard Header File, Version 1.00 Microchip Technology, Inc.
114 // This header file defines configurations, registers, and other useful bits of
115 // information for the PIC16F887 microcontroller. These names are taken to match
116 // the data sheets as closely as possible.
118 // Note that the processor must be selected before this file is
119 // included. The processor may be selected the following ways:
121 // 1. Command line switch:
122 // C:\ MPASM MYFILE.ASM /PIC16F887
123 // 2. LIST directive in the source file
125 // 3. Processor Type entry in the MPASM full-screen interface
127 //==========================================================================
131 //==========================================================================
133 //1.00 11/18/05 Original
135 //==========================================================================
139 //==========================================================================
142 // MESSG "Processor-header file mismatch. Verify selected processor."
145 //==========================================================================
147 // Register Definitions
149 //==========================================================================
154 //----- Register Files------------------------------------------------------
156 extern __sfr __at (INDF_ADDR) INDF;
157 extern __sfr __at (TMR0_ADDR) TMR0;
158 extern __sfr __at (PCL_ADDR) PCL;
159 extern __sfr __at (STATUS_ADDR) STATUS;
160 extern __sfr __at (FSR_ADDR) FSR;
161 extern __sfr __at (PORTA_ADDR) PORTA;
162 extern __sfr __at (PORTB_ADDR) PORTB;
163 extern __sfr __at (PORTC_ADDR) PORTC;
164 extern __sfr __at (PORTD_ADDR) PORTD;
165 extern __sfr __at (PORTE_ADDR) PORTE;
166 extern __sfr __at (PCLATH_ADDR) PCLATH;
167 extern __sfr __at (INTCON_ADDR) INTCON;
168 extern __sfr __at (PIR1_ADDR) PIR1;
169 extern __sfr __at (PIR2_ADDR) PIR2;
170 extern __sfr __at (TMR1L_ADDR) TMR1L;
171 extern __sfr __at (TMR1H_ADDR) TMR1H;
172 extern __sfr __at (T1CON_ADDR) T1CON;
173 extern __sfr __at (TMR2_ADDR) TMR2;
174 extern __sfr __at (T2CON_ADDR) T2CON;
175 extern __sfr __at (SSPBUF_ADDR) SSPBUF;
176 extern __sfr __at (SSPCON_ADDR) SSPCON;
177 extern __sfr __at (CCPR1L_ADDR) CCPR1L;
178 extern __sfr __at (CCPR1H_ADDR) CCPR1H;
179 extern __sfr __at (CCP1CON_ADDR) CCP1CON;
180 extern __sfr __at (RCSTA_ADDR) RCSTA;
181 extern __sfr __at (TXREG_ADDR) TXREG;
182 extern __sfr __at (RCREG_ADDR) RCREG;
183 extern __sfr __at (CCPR2L_ADDR) CCPR2L;
184 extern __sfr __at (CCPR2H_ADDR) CCPR2H;
185 extern __sfr __at (CCP2CON_ADDR) CCP2CON;
186 extern __sfr __at (ADRESH_ADDR) ADRESH;
187 extern __sfr __at (ADCON0_ADDR) ADCON0;
189 extern __sfr __at (OPTION_REG_ADDR) OPTION_REG;
191 extern __sfr __at (TRISA_ADDR) TRISA;
192 extern __sfr __at (TRISB_ADDR) TRISB;
193 extern __sfr __at (TRISC_ADDR) TRISC;
194 extern __sfr __at (TRISD_ADDR) TRISD;
195 extern __sfr __at (TRISE_ADDR) TRISE;
197 extern __sfr __at (PIE1_ADDR) PIE1;
198 extern __sfr __at (PIE2_ADDR) PIE2;
199 extern __sfr __at (PCON_ADDR) PCON;
200 extern __sfr __at (OSCCON_ADDR) OSCCON;
201 extern __sfr __at (OSCTUNE_ADDR) OSCTUNE;
202 extern __sfr __at (SSPCON2_ADDR) SSPCON2;
203 extern __sfr __at (PR2_ADDR) PR2;
204 extern __sfr __at (SSPADD_ADDR) SSPADD;
205 extern __sfr __at (SSPMSK_ADDR) SSPMSK;
206 extern __sfr __at (MSK_ADDR) MSK;
207 extern __sfr __at (SSPSTAT_ADDR) SSPSTAT;
208 extern __sfr __at (WPUB_ADDR) WPUB;
209 extern __sfr __at (IOCB_ADDR) IOCB;
210 extern __sfr __at (VRCON_ADDR) VRCON;
211 extern __sfr __at (TXSTA_ADDR) TXSTA;
212 extern __sfr __at (SPBRG_ADDR) SPBRG;
213 extern __sfr __at (SPBRGH_ADDR) SPBRGH;
214 extern __sfr __at (PWM1CON_ADDR) PWM1CON;
215 extern __sfr __at (ECCPAS_ADDR) ECCPAS;
216 extern __sfr __at (PSTRCON_ADDR) PSTRCON;
217 extern __sfr __at (ADRESL_ADDR) ADRESL;
218 extern __sfr __at (ADCON1_ADDR) ADCON1;
220 extern __sfr __at (WDTCON_ADDR) WDTCON;
222 extern __sfr __at (CM1CON0_ADDR) CM1CON0;
223 extern __sfr __at (CM2CON0_ADDR) CM2CON0;
224 extern __sfr __at (CM2CON1_ADDR) CM2CON1;
226 extern __sfr __at (EEDATA_ADDR) EEDATA;
227 extern __sfr __at (EEDAT_ADDR) EEDAT;
228 extern __sfr __at (EEADR_ADDR) EEADR;
229 extern __sfr __at (EEDATH_ADDR) EEDATH;
230 extern __sfr __at (EEADRH_ADDR) EEADRH;
232 extern __sfr __at (SRCON_ADDR) SRCON;
234 extern __sfr __at (BAUDCTL_ADDR) BAUDCTL;
235 extern __sfr __at (ANSEL_ADDR) ANSEL;
236 extern __sfr __at (ANSELH_ADDR) ANSELH;
238 extern __sfr __at (EECON1_ADDR) EECON1;
239 extern __sfr __at (EECON2_ADDR) EECON2;
241 //----- BANK 0 REGISTER DEFINITIONS ----------------------------------------
242 //----- STATUS Bits --------------------------------------------------------
245 //----- INTCON Bits --------------------------------------------------------
248 //----- PIR1 Bits ----------------------------------------------------------
251 //----- PIR2 Bits ----------------------------------------------------------
254 //----- T1CON Bits ---------------------------------------------------------
257 //----- T2CON Bits ---------------------------------------------------------
260 //----- SSPCON Bits --------------------------------------------------------
263 //----- CCP1CON Bits -------------------------------------------------------
266 //----- RCSTA Bits ---------------------------------------------------------
269 //----- CCP2CON Bits -------------------------------------------------------
272 //----- ADCON0 Bits --------------------------------------------------------
275 //----- BANK 1 REGISTER DEFINITIONS ----------------------------------------
276 //----- OPTION_REG Bits -----------------------------------------------------
279 //----- PIE1 Bits ----------------------------------------------------------
282 //----- PIE2 Bits ----------------------------------------------------------
285 //----- PCON Bits ----------------------------------------------------------
288 //----- OSCCON Bits --------------------------------------------------------
291 //----- OSCTUNE Bits -------------------------------------------------------
294 //----- SSPCON2 Bits --------------------------------------------------------
297 //----- SSPSTAT Bits -------------------------------------------------------
300 //----- WPUB Bits ----------------------------------------------------------
303 //----- IOCB Bits ----------------------------------------------------------
306 //----- VRCON Bits ---------------------------------------------------------
309 //----- TXSTA Bits ---------------------------------------------------------
312 //----- SPBRG Bits -------------------------------------------------------
315 //----- SPBRGH Bits -------------------------------------------------------
318 //----- PWM1CON Bits -------------------------------------------------------
321 //----- ECCPAS Bits --------------------------------------------------------
324 //----- PSTRCON -------------------------------------------------------------
327 //----- ADCON1 -------------------------------------------------------------
330 //----- BANK 2 REGISTER DEFINITIONS ----------------------------------------
331 //----- WDTCON Bits --------------------------------------------------------
334 //----- CM1CON0 Bits -------------------------------------------------------
338 //----- CM2CON0 Bits -------------------------------------------------------
342 //----- CM2CON1 Bits -------------------------------------------------------
346 //----- BANK 3 REGISTER DEFINITIONS ----------------------------------------
347 //----- SRCON ---------------------------------------------------------------
351 //----- BAUDCTL Bits -------------------------------------------------------
356 //----- ANSEL --------------------------------------------------------------
359 //----- ANSELH -------------------------------------------------------------
362 //----- EECON1 Bits --------------------------------------------------------
366 //==========================================================================
370 //==========================================================================
373 // __BADRAM H'18E'-H'18F'
375 //==========================================================================
377 // Configuration Bits
379 //==========================================================================
380 #define _CONFIG1 0x2007
381 #define _CONFIG2 0x2008
383 //----- Configuration Word1 ------------------------------------------------
385 #define _DEBUG_ON 0x1FFF
386 #define _DEBUG_OFF 0x3FFF
387 #define _LVP_ON 0x3FFF
388 #define _LVP_OFF 0x2FFF
389 #define _FCMEN_ON 0x3FFF
390 #define _FCMEN_OFF 0x37FF
391 #define _IESO_ON 0x3FFF
392 #define _IESO_OFF 0x3BFF
393 #define _BOR_ON 0x3FFF
394 #define _BOR_NSLEEP 0x3EFF
395 #define _BOR_SBODEN 0x3DFF
396 #define _BOR_OFF 0x3CFF
397 #define _CPD_ON 0x3F7F
398 #define _CPD_OFF 0x3FFF
399 #define _CP_ON 0x3FBF
400 #define _CP_OFF 0x3FFF
401 #define _MCLRE_ON 0x3FFF
402 #define _MCLRE_OFF 0x3FDF
403 #define _PWRTE_ON 0x3FEF
404 #define _PWRTE_OFF 0x3FFF
405 #define _WDT_ON 0x3FFF
406 #define _WDT_OFF 0x3FF7
407 #define _LP_OSC 0x3FF8
408 #define _XT_OSC 0x3FF9
409 #define _HS_OSC 0x3FFA
410 #define _EC_OSC 0x3FFB
411 #define _INTRC_OSC_NOCLKOUT 0x3FFC
412 #define _INTRC_OSC_CLKOUT 0x3FFD
413 #define _EXTRC_OSC_NOCLKOUT 0x3FFE
414 #define _EXTRC_OSC_CLKOUT 0x3FFF
415 #define _INTOSCIO 0x3FFC
416 #define _INTOSC 0x3FFD
417 #define _EXTRCIO 0x3FFE
418 #define _EXTRC 0x3FFF
420 //----- Configuration Word2 ------------------------------------------------
422 #define _WRT_OFF 0x3FFF // No prog memmory write protection
423 #define _WRT_256 0x3DFF // First 256 prog memmory write protected
424 #define _WRT_1FOURTH 0x3BFF // First quarter prog memmory write protected
425 #define _WRT_HALF 0x39FF // First half memmory write protected
427 #define _BOR21V 0x3EFF
428 #define _BOR40V 0x3FFF
432 // ----- ADCON0 bits --------------------
435 unsigned char ADON:1;
437 unsigned char CHS0:1;
438 unsigned char CHS1:1;
439 unsigned char CHS2:1;
440 unsigned char CHS3:1;
441 unsigned char ADCS0:1;
442 unsigned char ADCS1:1;
446 unsigned char NOT_DONE:1;
456 unsigned char GO_DONE:1;
465 extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits;
467 #ifndef NO_BIT_DEFINES
468 #define ADON ADCON0_bits.ADON
469 #define GO ADCON0_bits.GO
470 #define NOT_DONE ADCON0_bits.NOT_DONE
471 #define GO_DONE ADCON0_bits.GO_DONE
472 #define CHS0 ADCON0_bits.CHS0
473 #define CHS1 ADCON0_bits.CHS1
474 #define CHS2 ADCON0_bits.CHS2
475 #define CHS3 ADCON0_bits.CHS3
476 #define ADCS0 ADCON0_bits.ADCS0
477 #define ADCS1 ADCON0_bits.ADCS1
478 #endif /* NO_BIT_DEFINES */
480 // ----- ADCON1 bits --------------------
487 unsigned char VCFG0:1;
488 unsigned char VCFG1:1;
490 unsigned char ADFM:1;
493 extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits;
495 #ifndef NO_BIT_DEFINES
496 #define VCFG0 ADCON1_bits.VCFG0
497 #define VCFG1 ADCON1_bits.VCFG1
498 #define ADFM ADCON1_bits.ADFM
499 #endif /* NO_BIT_DEFINES */
501 // ----- ANSEL bits --------------------
504 unsigned char ANS0:1;
505 unsigned char ANS1:1;
506 unsigned char ANS2:1;
507 unsigned char ANS3:1;
508 unsigned char ANS4:1;
509 unsigned char ANS5:1;
510 unsigned char ANS6:1;
511 unsigned char ANS7:1;
514 extern volatile __ANSEL_bits_t __at(ANSEL_ADDR) ANSEL_bits;
516 #ifndef NO_BIT_DEFINES
517 #define ANS0 ANSEL_bits.ANS0
518 #define ANS1 ANSEL_bits.ANS1
519 #define ANS2 ANSEL_bits.ANS2
520 #define ANS3 ANSEL_bits.ANS3
521 #define ANS4 ANSEL_bits.ANS4
522 #define ANS5 ANSEL_bits.ANS5
523 #define ANS6 ANSEL_bits.ANS6
524 #define ANS7 ANSEL_bits.ANS7
525 #endif /* NO_BIT_DEFINES */
527 // ----- ANSELH bits --------------------
530 unsigned char ANS8:1;
531 unsigned char ANS9:1;
532 unsigned char ANS10:1;
533 unsigned char ANS11:1;
534 unsigned char ANS12:1;
535 unsigned char ANS13:1;
540 extern volatile __ANSELH_bits_t __at(ANSELH_ADDR) ANSELH_bits;
542 #ifndef NO_BIT_DEFINES
543 #define ANS8 ANSELH_bits.ANS8
544 #define ANS9 ANSELH_bits.ANS9
545 #define ANS10 ANSELH_bits.ANS10
546 #define ANS11 ANSELH_bits.ANS11
547 #define ANS12 ANSELH_bits.ANS12
548 #define ANS13 ANSELH_bits.ANS13
549 #endif /* NO_BIT_DEFINES */
551 // ----- BAUDCTL bits --------------------
554 unsigned char ABDEN:1;
557 unsigned char BRG16:1;
558 unsigned char SCKP:1;
560 unsigned char RCIDL:1;
561 unsigned char ABDOVF:1;
564 extern volatile __BAUDCTL_bits_t __at(BAUDCTL_ADDR) BAUDCTL_bits;
566 #ifndef NO_BIT_DEFINES
567 #define ABDEN BAUDCTL_bits.ABDEN
568 #define WUE BAUDCTL_bits.WUE
569 #define BRG16 BAUDCTL_bits.BRG16
570 #define SCKP BAUDCTL_bits.SCKP
571 #define RCIDL BAUDCTL_bits.RCIDL
572 #define ABDOVF BAUDCTL_bits.ABDOVF
573 #endif /* NO_BIT_DEFINES */
575 // ----- CCP1CON bits --------------------
578 unsigned char CCP1M0:1;
579 unsigned char CCP1M1:1;
580 unsigned char CCP1M2:1;
581 unsigned char CCP1M3:1;
582 unsigned char DC1B0:1;
583 unsigned char DC1B1:1;
584 unsigned char P1M0:1;
585 unsigned char P1M1:1;
592 unsigned char CCP1Y:1;
593 unsigned char CCP1X:1;
598 extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits;
600 #ifndef NO_BIT_DEFINES
601 #define CCP1M0 CCP1CON_bits.CCP1M0
602 #define CCP1M1 CCP1CON_bits.CCP1M1
603 #define CCP1M2 CCP1CON_bits.CCP1M2
604 #define CCP1M3 CCP1CON_bits.CCP1M3
605 #define DC1B0 CCP1CON_bits.DC1B0
606 #define CCP1Y CCP1CON_bits.CCP1Y
607 #define DC1B1 CCP1CON_bits.DC1B1
608 #define CCP1X CCP1CON_bits.CCP1X
609 #define P1M0 CCP1CON_bits.P1M0
610 #define P1M1 CCP1CON_bits.P1M1
611 #endif /* NO_BIT_DEFINES */
613 // ----- CCP2CON bits --------------------
616 unsigned char CCP2M0:1;
617 unsigned char CCP2M1:1;
618 unsigned char CCP2M2:1;
619 unsigned char CCP2M3:1;
620 unsigned char CCP2Y:1;
621 unsigned char CCP2X:1;
630 unsigned char DC2B0:1;
631 unsigned char DC2B1:1;
636 extern volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits;
638 #ifndef NO_BIT_DEFINES
639 #define CCP2M0 CCP2CON_bits.CCP2M0
640 #define CCP2M1 CCP2CON_bits.CCP2M1
641 #define CCP2M2 CCP2CON_bits.CCP2M2
642 #define CCP2M3 CCP2CON_bits.CCP2M3
643 #define CCP2Y CCP2CON_bits.CCP2Y
644 #define DC2B0 CCP2CON_bits.DC2B0
645 #define CCP2X CCP2CON_bits.CCP2X
646 #define DC2B1 CCP2CON_bits.DC2B1
647 #endif /* NO_BIT_DEFINES */
649 // ----- CM1CON0 bits --------------------
652 unsigned char C1CH0:1;
653 unsigned char C1CH1:1;
656 unsigned char C1POL:1;
657 unsigned char C1OE:1;
658 unsigned char C1OUT:1;
659 unsigned char C1ON:1;
662 extern volatile __CM1CON0_bits_t __at(CM1CON0_ADDR) CM1CON0_bits;
664 #ifndef NO_BIT_DEFINES
665 #define C1CH0 CM1CON0_bits.C1CH0
666 #define C1CH1 CM1CON0_bits.C1CH1
667 #define C1R CM1CON0_bits.C1R
668 #define C1POL CM1CON0_bits.C1POL
669 #define C1OE CM1CON0_bits.C1OE
670 #define C1OUT CM1CON0_bits.C1OUT
671 #define C1ON CM1CON0_bits.C1ON
672 #endif /* NO_BIT_DEFINES */
674 // ----- CM2CON0 bits --------------------
677 unsigned char C2CH0:1;
678 unsigned char C2CH1:1;
681 unsigned char C2POL:1;
682 unsigned char C2OE:1;
683 unsigned char C2OUT:1;
684 unsigned char C2ON:1;
687 extern volatile __CM2CON0_bits_t __at(CM2CON0_ADDR) CM2CON0_bits;
689 #ifndef NO_BIT_DEFINES
690 #define C2CH0 CM2CON0_bits.C2CH0
691 #define C2CH1 CM2CON0_bits.C2CH1
692 #define C2R CM2CON0_bits.C2R
693 #define C2POL CM2CON0_bits.C2POL
694 #define C2OE CM2CON0_bits.C2OE
695 #define C2OUT CM2CON0_bits.C2OUT
696 #define C2ON CM2CON0_bits.C2ON
697 #endif /* NO_BIT_DEFINES */
699 // ----- CM2CON1 bits --------------------
702 unsigned char C2SYNC:1;
703 unsigned char T1GSS:1;
706 unsigned char C2RSEL:1;
707 unsigned char C1RSEL:1;
708 unsigned char MC2OUT:1;
709 unsigned char MC1OUT:1;
712 extern volatile __CM2CON1_bits_t __at(CM2CON1_ADDR) CM2CON1_bits;
714 #ifndef NO_BIT_DEFINES
715 #define C2SYNC CM2CON1_bits.C2SYNC
716 #define T1GSS CM2CON1_bits.T1GSS
717 #define C2RSEL CM2CON1_bits.C2RSEL
718 #define C1RSEL CM2CON1_bits.C1RSEL
719 #define MC2OUT CM2CON1_bits.MC2OUT
720 #define MC1OUT CM2CON1_bits.MC1OUT
721 #endif /* NO_BIT_DEFINES */
723 // ----- ECCPAS bits --------------------
726 unsigned char PSSBD0:1;
727 unsigned char PSSBD1:1;
728 unsigned char PSSAC0:1;
729 unsigned char PSSAC1:1;
730 unsigned char ECCPAS0:1;
731 unsigned char ECCPAS1:1;
732 unsigned char ECCPAS2:1;
733 unsigned char ECCPASE:1;
736 extern volatile __ECCPAS_bits_t __at(ECCPAS_ADDR) ECCPAS_bits;
738 #ifndef NO_BIT_DEFINES
739 #define PSSBD0 ECCPAS_bits.PSSBD0
740 #define PSSBD1 ECCPAS_bits.PSSBD1
741 #define PSSAC0 ECCPAS_bits.PSSAC0
742 #define PSSAC1 ECCPAS_bits.PSSAC1
743 #define ECCPAS0 ECCPAS_bits.ECCPAS0
744 #define ECCPAS1 ECCPAS_bits.ECCPAS1
745 #define ECCPAS2 ECCPAS_bits.ECCPAS2
746 #define ECCPASE ECCPAS_bits.ECCPASE
747 #endif /* NO_BIT_DEFINES */
749 // ----- EECON1 bits --------------------
754 unsigned char WREN:1;
755 unsigned char WRERR:1;
759 unsigned char EEPGD:1;
762 extern volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits;
764 #ifndef NO_BIT_DEFINES
765 #define RD EECON1_bits.RD
766 #define WR EECON1_bits.WR
767 #define WREN EECON1_bits.WREN
768 #define WRERR EECON1_bits.WRERR
769 #define EEPGD EECON1_bits.EEPGD
770 #endif /* NO_BIT_DEFINES */
772 // ----- INTCON bits --------------------
775 unsigned char RBIF:1;
776 unsigned char INTF:1;
777 unsigned char T0IF:1;
778 unsigned char RBIE:1;
779 unsigned char INTE:1;
780 unsigned char T0IE:1;
781 unsigned char PEIE:1;
787 unsigned char TMR0IF:1;
790 unsigned char TMR0IE:1;
795 extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits;
797 #ifndef NO_BIT_DEFINES
798 #define RBIF INTCON_bits.RBIF
799 #define INTF INTCON_bits.INTF
800 #define T0IF INTCON_bits.T0IF
801 #define TMR0IF INTCON_bits.TMR0IF
802 #define RBIE INTCON_bits.RBIE
803 #define INTE INTCON_bits.INTE
804 #define T0IE INTCON_bits.T0IE
805 #define TMR0IE INTCON_bits.TMR0IE
806 #define PEIE INTCON_bits.PEIE
807 #define GIE INTCON_bits.GIE
808 #endif /* NO_BIT_DEFINES */
810 // ----- IOCB bits --------------------
813 unsigned char IOCB0:1;
814 unsigned char IOCB1:1;
815 unsigned char IOCB2:1;
816 unsigned char IOCB3:1;
817 unsigned char IOCB4:1;
818 unsigned char IOCB5:1;
819 unsigned char IOCB6:1;
820 unsigned char IOCB7:1;
823 extern volatile __IOCB_bits_t __at(IOCB_ADDR) IOCB_bits;
825 #ifndef NO_BIT_DEFINES
826 #define IOCB0 IOCB_bits.IOCB0
827 #define IOCB1 IOCB_bits.IOCB1
828 #define IOCB2 IOCB_bits.IOCB2
829 #define IOCB3 IOCB_bits.IOCB3
830 #define IOCB4 IOCB_bits.IOCB4
831 #define IOCB5 IOCB_bits.IOCB5
832 #define IOCB6 IOCB_bits.IOCB6
833 #define IOCB7 IOCB_bits.IOCB7
834 #endif /* NO_BIT_DEFINES */
836 // ----- OPTION_REG bits --------------------
843 unsigned char T0SE:1;
844 unsigned char T0CS:1;
845 unsigned char INTEDG:1;
846 unsigned char NOT_RBPU:1;
848 } __OPTION_REG_bits_t;
849 extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits;
851 #ifndef NO_BIT_DEFINES
852 #define PS0 OPTION_REG_bits.PS0
853 #define PS1 OPTION_REG_bits.PS1
854 #define PS2 OPTION_REG_bits.PS2
855 #define PSA OPTION_REG_bits.PSA
856 #define T0SE OPTION_REG_bits.T0SE
857 #define T0CS OPTION_REG_bits.T0CS
858 #define INTEDG OPTION_REG_bits.INTEDG
859 #define NOT_RBPU OPTION_REG_bits.NOT_RBPU
860 #endif /* NO_BIT_DEFINES */
862 // ----- OSCCON bits --------------------
868 unsigned char OSTS:1;
869 unsigned char IRCF0:1;
870 unsigned char IRCF1:1;
871 unsigned char IRCF2:1;
875 extern volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits;
877 #ifndef NO_BIT_DEFINES
878 #define SCS OSCCON_bits.SCS
879 #define LTS OSCCON_bits.LTS
880 #define HTS OSCCON_bits.HTS
881 #define OSTS OSCCON_bits.OSTS
882 #define IRCF0 OSCCON_bits.IRCF0
883 #define IRCF1 OSCCON_bits.IRCF1
884 #define IRCF2 OSCCON_bits.IRCF2
885 #endif /* NO_BIT_DEFINES */
887 // ----- OSCTUNE bits --------------------
890 unsigned char TUN0:1;
891 unsigned char TUN1:1;
892 unsigned char TUN2:1;
893 unsigned char TUN3:1;
894 unsigned char TUN4:1;
900 extern volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits;
902 #ifndef NO_BIT_DEFINES
903 #define TUN0 OSCTUNE_bits.TUN0
904 #define TUN1 OSCTUNE_bits.TUN1
905 #define TUN2 OSCTUNE_bits.TUN2
906 #define TUN3 OSCTUNE_bits.TUN3
907 #define TUN4 OSCTUNE_bits.TUN4
908 #endif /* NO_BIT_DEFINES */
910 // ----- PCON bits --------------------
913 unsigned char NOT_BO:1;
914 unsigned char NOT_POR:1;
917 unsigned char SBOREN:1;
918 unsigned char ULPWUE:1;
923 unsigned char NOT_BOR:1;
933 extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits;
935 #ifndef NO_BIT_DEFINES
936 #define NOT_BO PCON_bits.NOT_BO
937 #define NOT_BOR PCON_bits.NOT_BOR
938 #define NOT_POR PCON_bits.NOT_POR
939 #define SBOREN PCON_bits.SBOREN
940 #define ULPWUE PCON_bits.ULPWUE
941 #endif /* NO_BIT_DEFINES */
943 // ----- PIE1 bits --------------------
946 unsigned char TMR1IE:1;
947 unsigned char TMR2IE:1;
948 unsigned char CCP1IE:1;
949 unsigned char SSPIE:1;
950 unsigned char TXIE:1;
951 unsigned char RCIE:1;
952 unsigned char ADIE:1;
956 extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits;
958 #ifndef NO_BIT_DEFINES
959 #define TMR1IE PIE1_bits.TMR1IE
960 #define TMR2IE PIE1_bits.TMR2IE
961 #define CCP1IE PIE1_bits.CCP1IE
962 #define SSPIE PIE1_bits.SSPIE
963 #define TXIE PIE1_bits.TXIE
964 #define RCIE PIE1_bits.RCIE
965 #define ADIE PIE1_bits.ADIE
966 #endif /* NO_BIT_DEFINES */
968 // ----- PIE2 bits --------------------
971 unsigned char CCP2IE:1;
973 unsigned char ULPWUIE:1;
974 unsigned char BCLIE:1;
975 unsigned char EEIE:1;
976 unsigned char C1IE:1;
977 unsigned char C2IE:1;
978 unsigned char OSFIE:1;
981 extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits;
983 #ifndef NO_BIT_DEFINES
984 #define CCP2IE PIE2_bits.CCP2IE
985 #define ULPWUIE PIE2_bits.ULPWUIE
986 #define BCLIE PIE2_bits.BCLIE
987 #define EEIE PIE2_bits.EEIE
988 #define C1IE PIE2_bits.C1IE
989 #define C2IE PIE2_bits.C2IE
990 #define OSFIE PIE2_bits.OSFIE
991 #endif /* NO_BIT_DEFINES */
993 // ----- PIR1 bits --------------------
996 unsigned char TMR1IF:1;
997 unsigned char TMR2IF:1;
998 unsigned char CCP1IF:1;
999 unsigned char SSPIF:1;
1000 unsigned char TXIF:1;
1001 unsigned char RCIF:1;
1002 unsigned char ADIF:1;
1006 extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits;
1008 #ifndef NO_BIT_DEFINES
1009 #define TMR1IF PIR1_bits.TMR1IF
1010 #define TMR2IF PIR1_bits.TMR2IF
1011 #define CCP1IF PIR1_bits.CCP1IF
1012 #define SSPIF PIR1_bits.SSPIF
1013 #define TXIF PIR1_bits.TXIF
1014 #define RCIF PIR1_bits.RCIF
1015 #define ADIF PIR1_bits.ADIF
1016 #endif /* NO_BIT_DEFINES */
1018 // ----- PIR2 bits --------------------
1021 unsigned char CCP2IF:1;
1023 unsigned char ULPWUIF:1;
1024 unsigned char BCLIF:1;
1025 unsigned char EEIF:1;
1026 unsigned char C1IF:1;
1027 unsigned char C2IF:1;
1028 unsigned char OSFIF:1;
1031 extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits;
1033 #ifndef NO_BIT_DEFINES
1034 #define CCP2IF PIR2_bits.CCP2IF
1035 #define ULPWUIF PIR2_bits.ULPWUIF
1036 #define BCLIF PIR2_bits.BCLIF
1037 #define EEIF PIR2_bits.EEIF
1038 #define C1IF PIR2_bits.C1IF
1039 #define C2IF PIR2_bits.C2IF
1040 #define OSFIF PIR2_bits.OSFIF
1041 #endif /* NO_BIT_DEFINES */
1043 // ----- PORTA bits --------------------
1046 unsigned char RA0:1;
1047 unsigned char RA1:1;
1048 unsigned char RA2:1;
1049 unsigned char RA3:1;
1050 unsigned char RA4:1;
1051 unsigned char RA5:1;
1052 unsigned char RA6:1;
1053 unsigned char RA7:1;
1056 extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits;
1058 #ifndef NO_BIT_DEFINES
1059 #define RA0 PORTA_bits.RA0
1060 #define RA1 PORTA_bits.RA1
1061 #define RA2 PORTA_bits.RA2
1062 #define RA3 PORTA_bits.RA3
1063 #define RA4 PORTA_bits.RA4
1064 #define RA5 PORTA_bits.RA5
1065 #define RA6 PORTA_bits.RA6
1066 #define RA7 PORTA_bits.RA7
1067 #endif /* NO_BIT_DEFINES */
1069 // ----- PORTB bits --------------------
1072 unsigned char RB0:1;
1073 unsigned char RB1:1;
1074 unsigned char RB2:1;
1075 unsigned char RB3:1;
1076 unsigned char RB4:1;
1077 unsigned char RB5:1;
1078 unsigned char RB6:1;
1079 unsigned char RB7:1;
1082 extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits;
1084 #ifndef NO_BIT_DEFINES
1085 #define RB0 PORTB_bits.RB0
1086 #define RB1 PORTB_bits.RB1
1087 #define RB2 PORTB_bits.RB2
1088 #define RB3 PORTB_bits.RB3
1089 #define RB4 PORTB_bits.RB4
1090 #define RB5 PORTB_bits.RB5
1091 #define RB6 PORTB_bits.RB6
1092 #define RB7 PORTB_bits.RB7
1093 #endif /* NO_BIT_DEFINES */
1095 // ----- PORTC bits --------------------
1098 unsigned char RC0:1;
1099 unsigned char RC1:1;
1100 unsigned char RC2:1;
1101 unsigned char RC3:1;
1102 unsigned char RC4:1;
1103 unsigned char RC5:1;
1104 unsigned char RC6:1;
1105 unsigned char RC7:1;
1108 extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits;
1110 #ifndef NO_BIT_DEFINES
1111 #define RC0 PORTC_bits.RC0
1112 #define RC1 PORTC_bits.RC1
1113 #define RC2 PORTC_bits.RC2
1114 #define RC3 PORTC_bits.RC3
1115 #define RC4 PORTC_bits.RC4
1116 #define RC5 PORTC_bits.RC5
1117 #define RC6 PORTC_bits.RC6
1118 #define RC7 PORTC_bits.RC7
1119 #endif /* NO_BIT_DEFINES */
1121 // ----- PORTD bits --------------------
1124 unsigned char RD0:1;
1125 unsigned char RD1:1;
1126 unsigned char RD2:1;
1127 unsigned char RD3:1;
1128 unsigned char RD4:1;
1129 unsigned char RD5:1;
1130 unsigned char RD6:1;
1131 unsigned char RD7:1;
1134 extern volatile __PORTD_bits_t __at(PORTD_ADDR) PORTD_bits;
1136 #ifndef NO_BIT_DEFINES
1137 #define RD0 PORTD_bits.RD0
1138 #define RD1 PORTD_bits.RD1
1139 #define RD2 PORTD_bits.RD2
1140 #define RD3 PORTD_bits.RD3
1141 #define RD4 PORTD_bits.RD4
1142 #define RD5 PORTD_bits.RD5
1143 #define RD6 PORTD_bits.RD6
1144 #define RD7 PORTD_bits.RD7
1145 #endif /* NO_BIT_DEFINES */
1147 // ----- PORTE bits --------------------
1150 unsigned char RE0:1;
1151 unsigned char RE1:1;
1152 unsigned char RE2:1;
1160 extern volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits;
1162 #ifndef NO_BIT_DEFINES
1163 #define RE0 PORTE_bits.RE0
1164 #define RE1 PORTE_bits.RE1
1165 #define RE2 PORTE_bits.RE2
1166 #endif /* NO_BIT_DEFINES */
1168 // ----- PSTRCON bits --------------------
1171 unsigned char STRA:1;
1172 unsigned char STRB:1;
1173 unsigned char STRC:1;
1174 unsigned char STRD:1;
1175 unsigned char STRSYNC:1;
1181 extern volatile __PSTRCON_bits_t __at(PSTRCON_ADDR) PSTRCON_bits;
1183 #ifndef NO_BIT_DEFINES
1184 #define STRA PSTRCON_bits.STRA
1185 #define STRB PSTRCON_bits.STRB
1186 #define STRC PSTRCON_bits.STRC
1187 #define STRD PSTRCON_bits.STRD
1188 #define STRSYNC PSTRCON_bits.STRSYNC
1189 #endif /* NO_BIT_DEFINES */
1191 // ----- PWM1CON bits --------------------
1194 unsigned char PDC0:1;
1195 unsigned char PDC1:1;
1196 unsigned char PDC2:1;
1197 unsigned char PDC3:1;
1198 unsigned char PDC4:1;
1199 unsigned char PDC5:1;
1200 unsigned char PDC6:1;
1201 unsigned char PRSEN:1;
1204 extern volatile __PWM1CON_bits_t __at(PWM1CON_ADDR) PWM1CON_bits;
1206 #ifndef NO_BIT_DEFINES
1207 #define PDC0 PWM1CON_bits.PDC0
1208 #define PDC1 PWM1CON_bits.PDC1
1209 #define PDC2 PWM1CON_bits.PDC2
1210 #define PDC3 PWM1CON_bits.PDC3
1211 #define PDC4 PWM1CON_bits.PDC4
1212 #define PDC5 PWM1CON_bits.PDC5
1213 #define PDC6 PWM1CON_bits.PDC6
1214 #define PRSEN PWM1CON_bits.PRSEN
1215 #endif /* NO_BIT_DEFINES */
1217 // ----- RCSTA bits --------------------
1220 unsigned char RX9D:1;
1221 unsigned char OERR:1;
1222 unsigned char FERR:1;
1223 unsigned char ADDEN:1;
1224 unsigned char CREN:1;
1225 unsigned char SREN:1;
1226 unsigned char RX9:1;
1227 unsigned char SPEN:1;
1230 unsigned char RCD8:1;
1236 unsigned char RC9:1;
1246 unsigned char NOT_RC8:1;
1256 unsigned char RC8_9:1;
1260 extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits;
1262 #ifndef NO_BIT_DEFINES
1263 #define RX9D RCSTA_bits.RX9D
1264 #define RCD8 RCSTA_bits.RCD8
1265 #define OERR RCSTA_bits.OERR
1266 #define FERR RCSTA_bits.FERR
1267 #define ADDEN RCSTA_bits.ADDEN
1268 #define CREN RCSTA_bits.CREN
1269 #define SREN RCSTA_bits.SREN
1270 #define RX9 RCSTA_bits.RX9
1271 #define RC9 RCSTA_bits.RC9
1272 #define NOT_RC8 RCSTA_bits.NOT_RC8
1273 #define RC8_9 RCSTA_bits.RC8_9
1274 #define SPEN RCSTA_bits.SPEN
1275 #endif /* NO_BIT_DEFINES */
1277 // ----- SPBRG bits --------------------
1280 unsigned char BRG0:1;
1281 unsigned char BRG1:1;
1282 unsigned char BRG2:1;
1283 unsigned char BRG3:1;
1284 unsigned char BRG4:1;
1285 unsigned char BRG5:1;
1286 unsigned char BRG6:1;
1287 unsigned char BRG7:1;
1290 extern volatile __SPBRG_bits_t __at(SPBRG_ADDR) SPBRG_bits;
1292 #ifndef NO_BIT_DEFINES
1293 #define BRG0 SPBRG_bits.BRG0
1294 #define BRG1 SPBRG_bits.BRG1
1295 #define BRG2 SPBRG_bits.BRG2
1296 #define BRG3 SPBRG_bits.BRG3
1297 #define BRG4 SPBRG_bits.BRG4
1298 #define BRG5 SPBRG_bits.BRG5
1299 #define BRG6 SPBRG_bits.BRG6
1300 #define BRG7 SPBRG_bits.BRG7
1301 #endif /* NO_BIT_DEFINES */
1303 // ----- SPBRGH bits --------------------
1306 unsigned char BRG8:1;
1307 unsigned char BRG9:1;
1308 unsigned char BRG10:1;
1309 unsigned char BRG11:1;
1310 unsigned char BRG12:1;
1311 unsigned char BRG13:1;
1312 unsigned char BRG14:1;
1313 unsigned char BRG15:1;
1316 extern volatile __SPBRGH_bits_t __at(SPBRGH_ADDR) SPBRGH_bits;
1318 #ifndef NO_BIT_DEFINES
1319 #define BRG8 SPBRGH_bits.BRG8
1320 #define BRG9 SPBRGH_bits.BRG9
1321 #define BRG10 SPBRGH_bits.BRG10
1322 #define BRG11 SPBRGH_bits.BRG11
1323 #define BRG12 SPBRGH_bits.BRG12
1324 #define BRG13 SPBRGH_bits.BRG13
1325 #define BRG14 SPBRGH_bits.BRG14
1326 #define BRG15 SPBRGH_bits.BRG15
1327 #endif /* NO_BIT_DEFINES */
1329 // ----- SRCON bits --------------------
1332 unsigned char FVREN:1;
1334 unsigned char PULSR:1;
1335 unsigned char PULSS:1;
1336 unsigned char C2REN:1;
1337 unsigned char C1SEN:1;
1338 unsigned char SR0:1;
1339 unsigned char SR1:1;
1342 extern volatile __SRCON_bits_t __at(SRCON_ADDR) SRCON_bits;
1344 #ifndef NO_BIT_DEFINES
1345 #define FVREN SRCON_bits.FVREN
1346 #define PULSR SRCON_bits.PULSR
1347 #define PULSS SRCON_bits.PULSS
1348 #define C2REN SRCON_bits.C2REN
1349 #define C1SEN SRCON_bits.C1SEN
1350 #define SR0 SRCON_bits.SR0
1351 #define SR1 SRCON_bits.SR1
1352 #endif /* NO_BIT_DEFINES */
1354 // ----- SSPCON bits --------------------
1357 unsigned char SSPM0:1;
1358 unsigned char SSPM1:1;
1359 unsigned char SSPM2:1;
1360 unsigned char SSPM3:1;
1361 unsigned char CKP:1;
1362 unsigned char SSPEN:1;
1363 unsigned char SSPOV:1;
1364 unsigned char WCOL:1;
1367 extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits;
1369 #ifndef NO_BIT_DEFINES
1370 #define SSPM0 SSPCON_bits.SSPM0
1371 #define SSPM1 SSPCON_bits.SSPM1
1372 #define SSPM2 SSPCON_bits.SSPM2
1373 #define SSPM3 SSPCON_bits.SSPM3
1374 #define CKP SSPCON_bits.CKP
1375 #define SSPEN SSPCON_bits.SSPEN
1376 #define SSPOV SSPCON_bits.SSPOV
1377 #define WCOL SSPCON_bits.WCOL
1378 #endif /* NO_BIT_DEFINES */
1380 // ----- SSPCON2 bits --------------------
1383 unsigned char SEN:1;
1384 unsigned char RSEN:1;
1385 unsigned char PEN:1;
1386 unsigned char RCEN:1;
1387 unsigned char ACKEN:1;
1388 unsigned char ACKDT:1;
1389 unsigned char ACKSTAT:1;
1390 unsigned char GCEN:1;
1393 extern volatile __SSPCON2_bits_t __at(SSPCON2_ADDR) SSPCON2_bits;
1395 #ifndef NO_BIT_DEFINES
1396 #define SEN SSPCON2_bits.SEN
1397 #define RSEN SSPCON2_bits.RSEN
1398 #define PEN SSPCON2_bits.PEN
1399 #define RCEN SSPCON2_bits.RCEN
1400 #define ACKEN SSPCON2_bits.ACKEN
1401 #define ACKDT SSPCON2_bits.ACKDT
1402 #define ACKSTAT SSPCON2_bits.ACKSTAT
1403 #define GCEN SSPCON2_bits.GCEN
1404 #endif /* NO_BIT_DEFINES */
1406 // ----- SSPSTAT bits --------------------
1415 unsigned char CKE:1;
1416 unsigned char SMP:1;
1421 unsigned char I2C_READ:1;
1422 unsigned char I2C_START:1;
1423 unsigned char I2C_STOP:1;
1424 unsigned char I2C_DATA:1;
1431 unsigned char NOT_W:1;
1434 unsigned char NOT_A:1;
1441 unsigned char NOT_WRITE:1;
1444 unsigned char NOT_ADDRESS:1;
1451 unsigned char R_W:1;
1454 unsigned char D_A:1;
1461 unsigned char READ_WRITE:1;
1464 unsigned char DATA_ADDRESS:1;
1469 extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits;
1471 #ifndef NO_BIT_DEFINES
1472 #define BF SSPSTAT_bits.BF
1473 #define UA SSPSTAT_bits.UA
1474 #define R SSPSTAT_bits.R
1475 #define I2C_READ SSPSTAT_bits.I2C_READ
1476 #define NOT_W SSPSTAT_bits.NOT_W
1477 #define NOT_WRITE SSPSTAT_bits.NOT_WRITE
1478 #define R_W SSPSTAT_bits.R_W
1479 #define READ_WRITE SSPSTAT_bits.READ_WRITE
1480 #define S SSPSTAT_bits.S
1481 #define I2C_START SSPSTAT_bits.I2C_START
1482 #define P SSPSTAT_bits.P
1483 #define I2C_STOP SSPSTAT_bits.I2C_STOP
1484 #define D SSPSTAT_bits.D
1485 #define I2C_DATA SSPSTAT_bits.I2C_DATA
1486 #define NOT_A SSPSTAT_bits.NOT_A
1487 #define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS
1488 #define D_A SSPSTAT_bits.D_A
1489 #define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS
1490 #define CKE SSPSTAT_bits.CKE
1491 #define SMP SSPSTAT_bits.SMP
1492 #endif /* NO_BIT_DEFINES */
1494 // ----- STATUS bits --------------------
1500 unsigned char NOT_PD:1;
1501 unsigned char NOT_TO:1;
1502 unsigned char RP0:1;
1503 unsigned char RP1:1;
1504 unsigned char IRP:1;
1507 extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits;
1509 #ifndef NO_BIT_DEFINES
1510 #define C STATUS_bits.C
1511 #define DC STATUS_bits.DC
1512 #define Z STATUS_bits.Z
1513 #define NOT_PD STATUS_bits.NOT_PD
1514 #define NOT_TO STATUS_bits.NOT_TO
1515 #define RP0 STATUS_bits.RP0
1516 #define RP1 STATUS_bits.RP1
1517 #define IRP STATUS_bits.IRP
1518 #endif /* NO_BIT_DEFINES */
1520 // ----- T1CON bits --------------------
1523 unsigned char TMR1ON:1;
1524 unsigned char TMR1CS:1;
1525 unsigned char NOT_T1SYNC:1;
1526 unsigned char T1OSCEN:1;
1527 unsigned char T1CKPS0:1;
1528 unsigned char T1CKPS1:1;
1529 unsigned char TMR1GE:1;
1530 unsigned char T1GINV:1;
1535 unsigned char T1INSYNC:1;
1545 unsigned char T1SYNC:1;
1553 extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits;
1555 #ifndef NO_BIT_DEFINES
1556 #define TMR1ON T1CON_bits.TMR1ON
1557 #define TMR1CS T1CON_bits.TMR1CS
1558 #define NOT_T1SYNC T1CON_bits.NOT_T1SYNC
1559 #define T1INSYNC T1CON_bits.T1INSYNC
1560 #define T1SYNC T1CON_bits.T1SYNC
1561 #define T1OSCEN T1CON_bits.T1OSCEN
1562 #define T1CKPS0 T1CON_bits.T1CKPS0
1563 #define T1CKPS1 T1CON_bits.T1CKPS1
1564 #define TMR1GE T1CON_bits.TMR1GE
1565 #define T1GINV T1CON_bits.T1GINV
1566 #endif /* NO_BIT_DEFINES */
1568 // ----- T2CON bits --------------------
1571 unsigned char T2CKPS0:1;
1572 unsigned char T2CKPS1:1;
1573 unsigned char TMR2ON:1;
1574 unsigned char TOUTPS0:1;
1575 unsigned char TOUTPS1:1;
1576 unsigned char TOUTPS2:1;
1577 unsigned char TOUTPS3:1;
1581 extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits;
1583 #ifndef NO_BIT_DEFINES
1584 #define T2CKPS0 T2CON_bits.T2CKPS0
1585 #define T2CKPS1 T2CON_bits.T2CKPS1
1586 #define TMR2ON T2CON_bits.TMR2ON
1587 #define TOUTPS0 T2CON_bits.TOUTPS0
1588 #define TOUTPS1 T2CON_bits.TOUTPS1
1589 #define TOUTPS2 T2CON_bits.TOUTPS2
1590 #define TOUTPS3 T2CON_bits.TOUTPS3
1591 #endif /* NO_BIT_DEFINES */
1593 // ----- TRISA bits --------------------
1596 unsigned char TRISA0:1;
1597 unsigned char TRISA1:1;
1598 unsigned char TRISA2:1;
1599 unsigned char TRISA3:1;
1600 unsigned char TRISA4:1;
1601 unsigned char TRISA5:1;
1602 unsigned char TRISA6:1;
1603 unsigned char TRISA7:1;
1606 extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits;
1608 #ifndef NO_BIT_DEFINES
1609 #define TRISA0 TRISA_bits.TRISA0
1610 #define TRISA1 TRISA_bits.TRISA1
1611 #define TRISA2 TRISA_bits.TRISA2
1612 #define TRISA3 TRISA_bits.TRISA3
1613 #define TRISA4 TRISA_bits.TRISA4
1614 #define TRISA5 TRISA_bits.TRISA5
1615 #define TRISA6 TRISA_bits.TRISA6
1616 #define TRISA7 TRISA_bits.TRISA7
1617 #endif /* NO_BIT_DEFINES */
1619 // ----- TRISB bits --------------------
1622 unsigned char TRISB0:1;
1623 unsigned char TRISB1:1;
1624 unsigned char TRISB2:1;
1625 unsigned char TRISB3:1;
1626 unsigned char TRISB4:1;
1627 unsigned char TRISB5:1;
1628 unsigned char TRISB6:1;
1629 unsigned char TRISB7:1;
1632 extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits;
1634 #ifndef NO_BIT_DEFINES
1635 #define TRISB0 TRISB_bits.TRISB0
1636 #define TRISB1 TRISB_bits.TRISB1
1637 #define TRISB2 TRISB_bits.TRISB2
1638 #define TRISB3 TRISB_bits.TRISB3
1639 #define TRISB4 TRISB_bits.TRISB4
1640 #define TRISB5 TRISB_bits.TRISB5
1641 #define TRISB6 TRISB_bits.TRISB6
1642 #define TRISB7 TRISB_bits.TRISB7
1643 #endif /* NO_BIT_DEFINES */
1645 // ----- TRISC bits --------------------
1648 unsigned char TRISC0:1;
1649 unsigned char TRISC1:1;
1650 unsigned char TRISC2:1;
1651 unsigned char TRISC3:1;
1652 unsigned char TRISC4:1;
1653 unsigned char TRISC5:1;
1654 unsigned char TRISC6:1;
1655 unsigned char TRISC7:1;
1658 extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits;
1660 #ifndef NO_BIT_DEFINES
1661 #define TRISC0 TRISC_bits.TRISC0
1662 #define TRISC1 TRISC_bits.TRISC1
1663 #define TRISC2 TRISC_bits.TRISC2
1664 #define TRISC3 TRISC_bits.TRISC3
1665 #define TRISC4 TRISC_bits.TRISC4
1666 #define TRISC5 TRISC_bits.TRISC5
1667 #define TRISC6 TRISC_bits.TRISC6
1668 #define TRISC7 TRISC_bits.TRISC7
1669 #endif /* NO_BIT_DEFINES */
1671 // ----- TRISD bits --------------------
1674 unsigned char TRISD0:1;
1675 unsigned char TRISD1:1;
1676 unsigned char TRISD2:1;
1677 unsigned char TRISD3:1;
1678 unsigned char TRISD4:1;
1679 unsigned char TRISD5:1;
1680 unsigned char TRISD6:1;
1681 unsigned char TRISD7:1;
1684 extern volatile __TRISD_bits_t __at(TRISD_ADDR) TRISD_bits;
1686 #ifndef NO_BIT_DEFINES
1687 #define TRISD0 TRISD_bits.TRISD0
1688 #define TRISD1 TRISD_bits.TRISD1
1689 #define TRISD2 TRISD_bits.TRISD2
1690 #define TRISD3 TRISD_bits.TRISD3
1691 #define TRISD4 TRISD_bits.TRISD4
1692 #define TRISD5 TRISD_bits.TRISD5
1693 #define TRISD6 TRISD_bits.TRISD6
1694 #define TRISD7 TRISD_bits.TRISD7
1695 #endif /* NO_BIT_DEFINES */
1697 // ----- TRISE bits --------------------
1700 unsigned char TRISE0:1;
1701 unsigned char TRISE1:1;
1702 unsigned char TRISE2:1;
1710 extern volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits;
1712 #ifndef NO_BIT_DEFINES
1713 #define TRISE0 TRISE_bits.TRISE0
1714 #define TRISE1 TRISE_bits.TRISE1
1715 #define TRISE2 TRISE_bits.TRISE2
1716 #endif /* NO_BIT_DEFINES */
1718 // ----- TXSTA bits --------------------
1721 unsigned char TX9D:1;
1722 unsigned char TRMT:1;
1723 unsigned char BRGH:1;
1724 unsigned char SENDB:1;
1725 unsigned char SYNC:1;
1726 unsigned char TXEN:1;
1727 unsigned char TX9:1;
1728 unsigned char CSRC:1;
1731 unsigned char TXD8:1;
1737 unsigned char NOT_TX8:1;
1747 unsigned char TX8_9:1;
1751 extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits;
1753 #ifndef NO_BIT_DEFINES
1754 #define TX9D TXSTA_bits.TX9D
1755 #define TXD8 TXSTA_bits.TXD8
1756 #define TRMT TXSTA_bits.TRMT
1757 #define BRGH TXSTA_bits.BRGH
1758 #define SENDB TXSTA_bits.SENDB
1759 #define SYNC TXSTA_bits.SYNC
1760 #define TXEN TXSTA_bits.TXEN
1761 #define TX9 TXSTA_bits.TX9
1762 #define NOT_TX8 TXSTA_bits.NOT_TX8
1763 #define TX8_9 TXSTA_bits.TX8_9
1764 #define CSRC TXSTA_bits.CSRC
1765 #endif /* NO_BIT_DEFINES */
1767 // ----- VRCON bits --------------------
1770 unsigned char VR0:1;
1771 unsigned char VR1:1;
1772 unsigned char VR2:1;
1773 unsigned char VR3:1;
1774 unsigned char VRSS:1;
1775 unsigned char VRR:1;
1776 unsigned char VROE:1;
1777 unsigned char VREN:1;
1780 extern volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits;
1782 #ifndef NO_BIT_DEFINES
1783 #define VR0 VRCON_bits.VR0
1784 #define VR1 VRCON_bits.VR1
1785 #define VR2 VRCON_bits.VR2
1786 #define VR3 VRCON_bits.VR3
1787 #define VRSS VRCON_bits.VRSS
1788 #define VRR VRCON_bits.VRR
1789 #define VROE VRCON_bits.VROE
1790 #define VREN VRCON_bits.VREN
1791 #endif /* NO_BIT_DEFINES */
1793 // ----- WDTCON bits --------------------
1796 unsigned char SWDTEN:1;
1797 unsigned char WDTPS0:1;
1798 unsigned char WDTPS1:1;
1799 unsigned char WDTPS2:1;
1800 unsigned char WDTPS3:1;
1806 extern volatile __WDTCON_bits_t __at(WDTCON_ADDR) WDTCON_bits;
1808 #ifndef NO_BIT_DEFINES
1809 #define SWDTEN WDTCON_bits.SWDTEN
1810 #define WDTPS0 WDTCON_bits.WDTPS0
1811 #define WDTPS1 WDTCON_bits.WDTPS1
1812 #define WDTPS2 WDTCON_bits.WDTPS2
1813 #define WDTPS3 WDTCON_bits.WDTPS3
1814 #endif /* NO_BIT_DEFINES */
1816 // ----- WPUB bits --------------------
1819 unsigned char WPUB0:1;
1820 unsigned char WPUB1:1;
1821 unsigned char WPUB2:1;
1822 unsigned char WPUB3:1;
1823 unsigned char WPUB4:1;
1824 unsigned char WPUB5:1;
1825 unsigned char WPUB6:1;
1826 unsigned char WPUB7:1;
1829 extern volatile __WPUB_bits_t __at(WPUB_ADDR) WPUB_bits;
1831 #ifndef NO_BIT_DEFINES
1832 #define WPUB0 WPUB_bits.WPUB0
1833 #define WPUB1 WPUB_bits.WPUB1
1834 #define WPUB2 WPUB_bits.WPUB2
1835 #define WPUB3 WPUB_bits.WPUB3
1836 #define WPUB4 WPUB_bits.WPUB4
1837 #define WPUB5 WPUB_bits.WPUB5
1838 #define WPUB6 WPUB_bits.WPUB6
1839 #define WPUB7 WPUB_bits.WPUB7
1840 #endif /* NO_BIT_DEFINES */