2 // Register Declarations for Microchip 16F886 Processor
5 // This header file was automatically generated by:
9 // Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved
11 // SDCC is licensed under the GNU Public license (GPL) v2. Note that
12 // this license covers the code to the compiler and other executables,
13 // but explicitly does not cover any code or objects generated by sdcc.
14 // We have not yet decided on a license for the run time libraries, but
15 // it will not put any requirements on code linked against it. See:
17 // http://www.gnu.org/copyleft/gpl/html
19 // See http://sdcc.sourceforge.net/ for the latest information on sdcc.
26 // Register addresses.
28 #define INDF_ADDR 0x0000
29 #define TMR0_ADDR 0x0001
30 #define PCL_ADDR 0x0002
31 #define STATUS_ADDR 0x0003
32 #define FSR_ADDR 0x0004
33 #define PORTA_ADDR 0x0005
34 #define PORTB_ADDR 0x0006
35 #define PORTC_ADDR 0x0007
36 #define PORTE_ADDR 0x0009
37 #define PCLATH_ADDR 0x000A
38 #define INTCON_ADDR 0x000B
39 #define PIR1_ADDR 0x000C
40 #define PIR2_ADDR 0x000D
41 #define TMR1L_ADDR 0x000E
42 #define TMR1H_ADDR 0x000F
43 #define T1CON_ADDR 0x0010
44 #define TMR2_ADDR 0x0011
45 #define T2CON_ADDR 0x0012
46 #define SSPBUF_ADDR 0x0013
47 #define SSPCON_ADDR 0x0014
48 #define CCPR1L_ADDR 0x0015
49 #define CCPR1H_ADDR 0x0016
50 #define CCP1CON_ADDR 0x0017
51 #define RCSTA_ADDR 0x0018
52 #define TXREG_ADDR 0x0019
53 #define RCREG_ADDR 0x001A
54 #define CCPR2L_ADDR 0x001B
55 #define CCPR2H_ADDR 0x001C
56 #define CCP2CON_ADDR 0x001D
57 #define ADRESH_ADDR 0x001E
58 #define ADCON0_ADDR 0x001F
59 #define OPTION_REG_ADDR 0x0081
60 #define TRISA_ADDR 0x0085
61 #define TRISB_ADDR 0x0086
62 #define TRISC_ADDR 0x0087
63 #define TRISE_ADDR 0x0089
64 #define PIE1_ADDR 0x008C
65 #define PIE2_ADDR 0x008D
66 #define PCON_ADDR 0x008E
67 #define OSCCON_ADDR 0x008F
68 #define OSCTUNE_ADDR 0x0090
69 #define SSPCON2_ADDR 0x0091
70 #define PR2_ADDR 0x0092
71 #define SSPADD_ADDR 0x0093
72 #define SSPMSK_ADDR 0x0093
73 #define MSK_ADDR 0x0093
74 #define SSPSTAT_ADDR 0x0094
75 #define WPUB_ADDR 0x0095
76 #define IOCB_ADDR 0x0096
77 #define VRCON_ADDR 0x0097
78 #define TXSTA_ADDR 0x0098
79 #define SPBRG_ADDR 0x0099
80 #define SPBRGH_ADDR 0x009A
81 #define PWM1CON_ADDR 0x009B
82 #define ECCPAS_ADDR 0x009C
83 #define PSTRCON_ADDR 0x009D
84 #define ADRESL_ADDR 0x009E
85 #define ADCON1_ADDR 0x009F
86 #define WDTCON_ADDR 0x0105
87 #define CM1CON0_ADDR 0x0107
88 #define CM2CON0_ADDR 0x0108
89 #define CM2CON1_ADDR 0x0109
90 #define EEDATA_ADDR 0x010C
91 #define EEDAT_ADDR 0x010C
92 #define EEADR_ADDR 0x010D
93 #define EEDATH_ADDR 0x010E
94 #define EEADRH_ADDR 0x010F
95 #define SRCON_ADDR 0x0185
96 #define BAUDCTL_ADDR 0x0187
97 #define ANSEL_ADDR 0x0188
98 #define ANSELH_ADDR 0x0189
99 #define EECON1_ADDR 0x018C
100 #define EECON2_ADDR 0x018D
103 // Memory organization.
109 // P16F886.INC Standard Header File, Version 1.00 Microchip Technology, Inc.
112 // This header file defines configurations, registers, and other useful bits of
113 // information for the PIC16F886 microcontroller. These names are taken to match
114 // the data sheets as closely as possible.
116 // Note that the processor must be selected before this file is
117 // included. The processor may be selected the following ways:
119 // 1. Command line switch:
120 // C:\ MPASM MYFILE.ASM /PIC16F886
121 // 2. LIST directive in the source file
123 // 3. Processor Type entry in the MPASM full-screen interface
125 //==========================================================================
129 //==========================================================================
131 //1.00 11/18/05 Original
133 //==========================================================================
137 //==========================================================================
140 // MESSG "Processor-header file mismatch. Verify selected processor."
143 //==========================================================================
145 // Register Definitions
147 //==========================================================================
152 //----- Register Files------------------------------------------------------
154 extern __sfr __at (INDF_ADDR) INDF;
155 extern __sfr __at (TMR0_ADDR) TMR0;
156 extern __sfr __at (PCL_ADDR) PCL;
157 extern __sfr __at (STATUS_ADDR) STATUS;
158 extern __sfr __at (FSR_ADDR) FSR;
159 extern __sfr __at (PORTA_ADDR) PORTA;
160 extern __sfr __at (PORTB_ADDR) PORTB;
161 extern __sfr __at (PORTC_ADDR) PORTC;
163 extern __sfr __at (PORTE_ADDR) PORTE;
164 extern __sfr __at (PCLATH_ADDR) PCLATH;
165 extern __sfr __at (INTCON_ADDR) INTCON;
166 extern __sfr __at (PIR1_ADDR) PIR1;
167 extern __sfr __at (PIR2_ADDR) PIR2;
168 extern __sfr __at (TMR1L_ADDR) TMR1L;
169 extern __sfr __at (TMR1H_ADDR) TMR1H;
170 extern __sfr __at (T1CON_ADDR) T1CON;
171 extern __sfr __at (TMR2_ADDR) TMR2;
172 extern __sfr __at (T2CON_ADDR) T2CON;
173 extern __sfr __at (SSPBUF_ADDR) SSPBUF;
174 extern __sfr __at (SSPCON_ADDR) SSPCON;
175 extern __sfr __at (CCPR1L_ADDR) CCPR1L;
176 extern __sfr __at (CCPR1H_ADDR) CCPR1H;
177 extern __sfr __at (CCP1CON_ADDR) CCP1CON;
178 extern __sfr __at (RCSTA_ADDR) RCSTA;
179 extern __sfr __at (TXREG_ADDR) TXREG;
180 extern __sfr __at (RCREG_ADDR) RCREG;
181 extern __sfr __at (CCPR2L_ADDR) CCPR2L;
182 extern __sfr __at (CCPR2H_ADDR) CCPR2H;
183 extern __sfr __at (CCP2CON_ADDR) CCP2CON;
184 extern __sfr __at (ADRESH_ADDR) ADRESH;
185 extern __sfr __at (ADCON0_ADDR) ADCON0;
187 extern __sfr __at (OPTION_REG_ADDR) OPTION_REG;
189 extern __sfr __at (TRISA_ADDR) TRISA;
190 extern __sfr __at (TRISB_ADDR) TRISB;
191 extern __sfr __at (TRISC_ADDR) TRISC;
193 extern __sfr __at (TRISE_ADDR) TRISE;
195 extern __sfr __at (PIE1_ADDR) PIE1;
196 extern __sfr __at (PIE2_ADDR) PIE2;
197 extern __sfr __at (PCON_ADDR) PCON;
198 extern __sfr __at (OSCCON_ADDR) OSCCON;
199 extern __sfr __at (OSCTUNE_ADDR) OSCTUNE;
200 extern __sfr __at (SSPCON2_ADDR) SSPCON2;
201 extern __sfr __at (PR2_ADDR) PR2;
202 extern __sfr __at (SSPADD_ADDR) SSPADD;
203 extern __sfr __at (SSPMSK_ADDR) SSPMSK;
204 extern __sfr __at (MSK_ADDR) MSK;
205 extern __sfr __at (SSPSTAT_ADDR) SSPSTAT;
206 extern __sfr __at (WPUB_ADDR) WPUB;
207 extern __sfr __at (IOCB_ADDR) IOCB;
208 extern __sfr __at (VRCON_ADDR) VRCON;
209 extern __sfr __at (TXSTA_ADDR) TXSTA;
210 extern __sfr __at (SPBRG_ADDR) SPBRG;
211 extern __sfr __at (SPBRGH_ADDR) SPBRGH;
212 extern __sfr __at (PWM1CON_ADDR) PWM1CON;
213 extern __sfr __at (ECCPAS_ADDR) ECCPAS;
214 extern __sfr __at (PSTRCON_ADDR) PSTRCON;
215 extern __sfr __at (ADRESL_ADDR) ADRESL;
216 extern __sfr __at (ADCON1_ADDR) ADCON1;
218 extern __sfr __at (WDTCON_ADDR) WDTCON;
220 extern __sfr __at (CM1CON0_ADDR) CM1CON0;
221 extern __sfr __at (CM2CON0_ADDR) CM2CON0;
222 extern __sfr __at (CM2CON1_ADDR) CM2CON1;
224 extern __sfr __at (EEDATA_ADDR) EEDATA;
225 extern __sfr __at (EEDAT_ADDR) EEDAT;
226 extern __sfr __at (EEADR_ADDR) EEADR;
227 extern __sfr __at (EEDATH_ADDR) EEDATH;
228 extern __sfr __at (EEADRH_ADDR) EEADRH;
230 extern __sfr __at (SRCON_ADDR) SRCON;
232 extern __sfr __at (BAUDCTL_ADDR) BAUDCTL;
233 extern __sfr __at (ANSEL_ADDR) ANSEL;
234 extern __sfr __at (ANSELH_ADDR) ANSELH;
236 extern __sfr __at (EECON1_ADDR) EECON1;
237 extern __sfr __at (EECON2_ADDR) EECON2;
239 //----- BANK 0 REGISTER DEFINITIONS ----------------------------------------
240 //----- STATUS Bits --------------------------------------------------------
243 //----- INTCON Bits --------------------------------------------------------
246 //----- PIR1 Bits ----------------------------------------------------------
249 //----- PIR2 Bits ----------------------------------------------------------
252 //----- T1CON Bits ---------------------------------------------------------
255 //----- T2CON Bits ---------------------------------------------------------
258 //----- SSPCON Bits --------------------------------------------------------
261 //----- CCP1CON Bits -------------------------------------------------------
264 //----- RCSTA Bits ---------------------------------------------------------
267 //----- CCP2CON Bits -------------------------------------------------------
270 //----- ADCON0 Bits --------------------------------------------------------
273 //----- BANK 1 REGISTER DEFINITIONS ----------------------------------------
274 //----- OPTION_REG Bits -----------------------------------------------------
277 //----- PIE1 Bits ----------------------------------------------------------
280 //----- PIE2 Bits ----------------------------------------------------------
283 //----- PCON Bits ----------------------------------------------------------
286 //----- OSCCON Bits --------------------------------------------------------
289 //----- OSCTUNE Bits -------------------------------------------------------
292 //----- SSPCON2 Bits --------------------------------------------------------
295 //----- SSPSTAT Bits -------------------------------------------------------
298 //----- WPUB Bits ----------------------------------------------------------
301 //----- IOCB Bits ----------------------------------------------------------
304 //----- VRCON Bits ---------------------------------------------------------
307 //----- TXSTA Bits ---------------------------------------------------------
310 //----- SPBRG Bits -------------------------------------------------------
313 //----- SPBRGH Bits -------------------------------------------------------
316 //----- PWM1CON Bits -------------------------------------------------------
319 //----- ECCPAS Bits --------------------------------------------------------
322 //----- PSTRCON -------------------------------------------------------------
325 //----- ADCON1 -------------------------------------------------------------
328 //----- BANK 2 REGISTER DEFINITIONS ----------------------------------------
329 //----- WDTCON Bits --------------------------------------------------------
332 //----- CM1CON0 Bits -------------------------------------------------------
336 //----- CM2CON0 Bits -------------------------------------------------------
340 //----- CM2CON1 Bits -------------------------------------------------------
344 //----- BANK 3 REGISTER DEFINITIONS ----------------------------------------
345 //----- SRCON ---------------------------------------------------------------
349 //----- BAUDCTL Bits -------------------------------------------------------
354 //----- ANSEL --------------------------------------------------------------
357 //----- ANSELH -------------------------------------------------------------
360 //----- EECON1 Bits --------------------------------------------------------
364 //==========================================================================
368 //==========================================================================
371 // __BADRAM H'18E'-H'18F'
373 //==========================================================================
375 // Configuration Bits
377 //==========================================================================
378 #define _CONFIG1 0x2007
379 #define _CONFIG2 0x2008
381 //----- Configuration Word1 ------------------------------------------------
383 #define _DEBUG_ON 0x1FFF
384 #define _DEBUG_OFF 0x3FFF
385 #define _LVP_ON 0x3FFF
386 #define _LVP_OFF 0x2FFF
387 #define _FCMEN_ON 0x3FFF
388 #define _FCMEN_OFF 0x37FF
389 #define _IESO_ON 0x3FFF
390 #define _IESO_OFF 0x3BFF
391 #define _BOR_ON 0x3FFF
392 #define _BOR_NSLEEP 0x3EFF
393 #define _BOR_SBODEN 0x3DFF
394 #define _BOR_OFF 0x3CFF
395 #define _CPD_ON 0x3F7F
396 #define _CPD_OFF 0x3FFF
397 #define _CP_ON 0x3FBF
398 #define _CP_OFF 0x3FFF
399 #define _MCLRE_ON 0x3FFF
400 #define _MCLRE_OFF 0x3FDF
401 #define _PWRTE_ON 0x3FEF
402 #define _PWRTE_OFF 0x3FFF
403 #define _WDT_ON 0x3FFF
404 #define _WDT_OFF 0x3FF7
405 #define _LP_OSC 0x3FF8
406 #define _XT_OSC 0x3FF9
407 #define _HS_OSC 0x3FFA
408 #define _EC_OSC 0x3FFB
409 #define _INTRC_OSC_NOCLKOUT 0x3FFC
410 #define _INTRC_OSC_CLKOUT 0x3FFD
411 #define _EXTRC_OSC_NOCLKOUT 0x3FFE
412 #define _EXTRC_OSC_CLKOUT 0x3FFF
413 #define _INTOSCIO 0x3FFC
414 #define _INTOSC 0x3FFD
415 #define _EXTRCIO 0x3FFE
416 #define _EXTRC 0x3FFF
418 //----- Configuration Word2 ------------------------------------------------
420 #define _WRT_OFF 0x3FFF // No prog memmory write protection
421 #define _WRT_256 0x3DFF // First 256 prog memmory write protected
422 #define _WRT_1FOURTH 0x3BFF // First quarter prog memmory write protected
423 #define _WRT_HALF 0x39FF // First half memmory write protected
425 #define _BOR21V 0x3EFF
426 #define _BOR40V 0x3FFF
430 // ----- ADCON0 bits --------------------
433 unsigned char ADON:1;
435 unsigned char CHS0:1;
436 unsigned char CHS1:1;
437 unsigned char CHS2:1;
438 unsigned char CHS3:1;
439 unsigned char ADCS0:1;
440 unsigned char ADCS1:1;
444 unsigned char NOT_DONE:1;
454 unsigned char GO_DONE:1;
463 extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits;
465 #ifndef NO_BIT_DEFINES
466 #define ADON ADCON0_bits.ADON
467 #define GO ADCON0_bits.GO
468 #define NOT_DONE ADCON0_bits.NOT_DONE
469 #define GO_DONE ADCON0_bits.GO_DONE
470 #define CHS0 ADCON0_bits.CHS0
471 #define CHS1 ADCON0_bits.CHS1
472 #define CHS2 ADCON0_bits.CHS2
473 #define CHS3 ADCON0_bits.CHS3
474 #define ADCS0 ADCON0_bits.ADCS0
475 #define ADCS1 ADCON0_bits.ADCS1
476 #endif /* NO_BIT_DEFINES */
478 // ----- ADCON1 bits --------------------
485 unsigned char VCFG0:1;
486 unsigned char VCFG1:1;
488 unsigned char ADFM:1;
491 extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits;
493 #ifndef NO_BIT_DEFINES
494 #define VCFG0 ADCON1_bits.VCFG0
495 #define VCFG1 ADCON1_bits.VCFG1
496 #define ADFM ADCON1_bits.ADFM
497 #endif /* NO_BIT_DEFINES */
499 // ----- ANSEL bits --------------------
502 unsigned char ANS0:1;
503 unsigned char ANS1:1;
504 unsigned char ANS2:1;
505 unsigned char ANS3:1;
506 unsigned char ANS4:1;
512 extern volatile __ANSEL_bits_t __at(ANSEL_ADDR) ANSEL_bits;
514 #ifndef NO_BIT_DEFINES
515 #define ANS0 ANSEL_bits.ANS0
516 #define ANS1 ANSEL_bits.ANS1
517 #define ANS2 ANSEL_bits.ANS2
518 #define ANS3 ANSEL_bits.ANS3
519 #define ANS4 ANSEL_bits.ANS4
520 #endif /* NO_BIT_DEFINES */
522 // ----- ANSELH bits --------------------
525 unsigned char ANS8:1;
526 unsigned char ANS9:1;
527 unsigned char ANS10:1;
528 unsigned char ANS11:1;
529 unsigned char ANS12:1;
530 unsigned char ANS13:1;
535 extern volatile __ANSELH_bits_t __at(ANSELH_ADDR) ANSELH_bits;
537 #ifndef NO_BIT_DEFINES
538 #define ANS8 ANSELH_bits.ANS8
539 #define ANS9 ANSELH_bits.ANS9
540 #define ANS10 ANSELH_bits.ANS10
541 #define ANS11 ANSELH_bits.ANS11
542 #define ANS12 ANSELH_bits.ANS12
543 #define ANS13 ANSELH_bits.ANS13
544 #endif /* NO_BIT_DEFINES */
546 // ----- BAUDCTL bits --------------------
549 unsigned char ABDEN:1;
552 unsigned char BRG16:1;
553 unsigned char SCKP:1;
555 unsigned char RCIDL:1;
556 unsigned char ABDOVF:1;
559 extern volatile __BAUDCTL_bits_t __at(BAUDCTL_ADDR) BAUDCTL_bits;
561 #ifndef NO_BIT_DEFINES
562 #define ABDEN BAUDCTL_bits.ABDEN
563 #define WUE BAUDCTL_bits.WUE
564 #define BRG16 BAUDCTL_bits.BRG16
565 #define SCKP BAUDCTL_bits.SCKP
566 #define RCIDL BAUDCTL_bits.RCIDL
567 #define ABDOVF BAUDCTL_bits.ABDOVF
568 #endif /* NO_BIT_DEFINES */
570 // ----- CCP1CON bits --------------------
573 unsigned char CCP1M0:1;
574 unsigned char CCP1M1:1;
575 unsigned char CCP1M2:1;
576 unsigned char CCP1M3:1;
577 unsigned char DC1B0:1;
578 unsigned char DC1B1:1;
579 unsigned char P1M0:1;
580 unsigned char P1M1:1;
587 unsigned char CCP1Y:1;
588 unsigned char CCP1X:1;
593 extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits;
595 #ifndef NO_BIT_DEFINES
596 #define CCP1M0 CCP1CON_bits.CCP1M0
597 #define CCP1M1 CCP1CON_bits.CCP1M1
598 #define CCP1M2 CCP1CON_bits.CCP1M2
599 #define CCP1M3 CCP1CON_bits.CCP1M3
600 #define DC1B0 CCP1CON_bits.DC1B0
601 #define CCP1Y CCP1CON_bits.CCP1Y
602 #define DC1B1 CCP1CON_bits.DC1B1
603 #define CCP1X CCP1CON_bits.CCP1X
604 #define P1M0 CCP1CON_bits.P1M0
605 #define P1M1 CCP1CON_bits.P1M1
606 #endif /* NO_BIT_DEFINES */
608 // ----- CCP2CON bits --------------------
611 unsigned char CCP2M0:1;
612 unsigned char CCP2M1:1;
613 unsigned char CCP2M2:1;
614 unsigned char CCP2M3:1;
615 unsigned char CCP2Y:1;
616 unsigned char CCP2X:1;
625 unsigned char DC2B0:1;
626 unsigned char DC2B1:1;
631 extern volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits;
633 #ifndef NO_BIT_DEFINES
634 #define CCP2M0 CCP2CON_bits.CCP2M0
635 #define CCP2M1 CCP2CON_bits.CCP2M1
636 #define CCP2M2 CCP2CON_bits.CCP2M2
637 #define CCP2M3 CCP2CON_bits.CCP2M3
638 #define CCP2Y CCP2CON_bits.CCP2Y
639 #define DC2B0 CCP2CON_bits.DC2B0
640 #define CCP2X CCP2CON_bits.CCP2X
641 #define DC2B1 CCP2CON_bits.DC2B1
642 #endif /* NO_BIT_DEFINES */
644 // ----- CM1CON0 bits --------------------
647 unsigned char C1CH0:1;
648 unsigned char C1CH1:1;
651 unsigned char C1POL:1;
652 unsigned char C1OE:1;
653 unsigned char C1OUT:1;
654 unsigned char C1ON:1;
657 extern volatile __CM1CON0_bits_t __at(CM1CON0_ADDR) CM1CON0_bits;
659 #ifndef NO_BIT_DEFINES
660 #define C1CH0 CM1CON0_bits.C1CH0
661 #define C1CH1 CM1CON0_bits.C1CH1
662 #define C1R CM1CON0_bits.C1R
663 #define C1POL CM1CON0_bits.C1POL
664 #define C1OE CM1CON0_bits.C1OE
665 #define C1OUT CM1CON0_bits.C1OUT
666 #define C1ON CM1CON0_bits.C1ON
667 #endif /* NO_BIT_DEFINES */
669 // ----- CM2CON0 bits --------------------
672 unsigned char C2CH0:1;
673 unsigned char C2CH1:1;
676 unsigned char C2POL:1;
677 unsigned char C2OE:1;
678 unsigned char C2OUT:1;
679 unsigned char C2ON:1;
682 extern volatile __CM2CON0_bits_t __at(CM2CON0_ADDR) CM2CON0_bits;
684 #ifndef NO_BIT_DEFINES
685 #define C2CH0 CM2CON0_bits.C2CH0
686 #define C2CH1 CM2CON0_bits.C2CH1
687 #define C2R CM2CON0_bits.C2R
688 #define C2POL CM2CON0_bits.C2POL
689 #define C2OE CM2CON0_bits.C2OE
690 #define C2OUT CM2CON0_bits.C2OUT
691 #define C2ON CM2CON0_bits.C2ON
692 #endif /* NO_BIT_DEFINES */
694 // ----- CM2CON1 bits --------------------
697 unsigned char C2SYNC:1;
698 unsigned char T1GSS:1;
701 unsigned char C2RSEL:1;
702 unsigned char C1RSEL:1;
703 unsigned char MC2OUT:1;
704 unsigned char MC1OUT:1;
707 extern volatile __CM2CON1_bits_t __at(CM2CON1_ADDR) CM2CON1_bits;
709 #ifndef NO_BIT_DEFINES
710 #define C2SYNC CM2CON1_bits.C2SYNC
711 #define T1GSS CM2CON1_bits.T1GSS
712 #define C2RSEL CM2CON1_bits.C2RSEL
713 #define C1RSEL CM2CON1_bits.C1RSEL
714 #define MC2OUT CM2CON1_bits.MC2OUT
715 #define MC1OUT CM2CON1_bits.MC1OUT
716 #endif /* NO_BIT_DEFINES */
718 // ----- ECCPAS bits --------------------
721 unsigned char PSSBD0:1;
722 unsigned char PSSBD1:1;
723 unsigned char PSSAC0:1;
724 unsigned char PSSAC1:1;
725 unsigned char ECCPAS0:1;
726 unsigned char ECCPAS1:1;
727 unsigned char ECCPAS2:1;
728 unsigned char ECCPASE:1;
731 extern volatile __ECCPAS_bits_t __at(ECCPAS_ADDR) ECCPAS_bits;
733 #ifndef NO_BIT_DEFINES
734 #define PSSBD0 ECCPAS_bits.PSSBD0
735 #define PSSBD1 ECCPAS_bits.PSSBD1
736 #define PSSAC0 ECCPAS_bits.PSSAC0
737 #define PSSAC1 ECCPAS_bits.PSSAC1
738 #define ECCPAS0 ECCPAS_bits.ECCPAS0
739 #define ECCPAS1 ECCPAS_bits.ECCPAS1
740 #define ECCPAS2 ECCPAS_bits.ECCPAS2
741 #define ECCPASE ECCPAS_bits.ECCPASE
742 #endif /* NO_BIT_DEFINES */
744 // ----- EECON1 bits --------------------
749 unsigned char WREN:1;
750 unsigned char WRERR:1;
754 unsigned char EEPGD:1;
757 extern volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits;
759 #ifndef NO_BIT_DEFINES
760 #define RD EECON1_bits.RD
761 #define WR EECON1_bits.WR
762 #define WREN EECON1_bits.WREN
763 #define WRERR EECON1_bits.WRERR
764 #define EEPGD EECON1_bits.EEPGD
765 #endif /* NO_BIT_DEFINES */
767 // ----- INTCON bits --------------------
770 unsigned char RBIF:1;
771 unsigned char INTF:1;
772 unsigned char T0IF:1;
773 unsigned char RBIE:1;
774 unsigned char INTE:1;
775 unsigned char T0IE:1;
776 unsigned char PEIE:1;
782 unsigned char TMR0IF:1;
785 unsigned char TMR0IE:1;
790 extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits;
792 #ifndef NO_BIT_DEFINES
793 #define RBIF INTCON_bits.RBIF
794 #define INTF INTCON_bits.INTF
795 #define T0IF INTCON_bits.T0IF
796 #define TMR0IF INTCON_bits.TMR0IF
797 #define RBIE INTCON_bits.RBIE
798 #define INTE INTCON_bits.INTE
799 #define T0IE INTCON_bits.T0IE
800 #define TMR0IE INTCON_bits.TMR0IE
801 #define PEIE INTCON_bits.PEIE
802 #define GIE INTCON_bits.GIE
803 #endif /* NO_BIT_DEFINES */
805 // ----- IOCB bits --------------------
808 unsigned char IOCB0:1;
809 unsigned char IOCB1:1;
810 unsigned char IOCB2:1;
811 unsigned char IOCB3:1;
812 unsigned char IOCB4:1;
813 unsigned char IOCB5:1;
814 unsigned char IOCB6:1;
815 unsigned char IOCB7:1;
818 extern volatile __IOCB_bits_t __at(IOCB_ADDR) IOCB_bits;
820 #ifndef NO_BIT_DEFINES
821 #define IOCB0 IOCB_bits.IOCB0
822 #define IOCB1 IOCB_bits.IOCB1
823 #define IOCB2 IOCB_bits.IOCB2
824 #define IOCB3 IOCB_bits.IOCB3
825 #define IOCB4 IOCB_bits.IOCB4
826 #define IOCB5 IOCB_bits.IOCB5
827 #define IOCB6 IOCB_bits.IOCB6
828 #define IOCB7 IOCB_bits.IOCB7
829 #endif /* NO_BIT_DEFINES */
831 // ----- OPTION_REG bits --------------------
838 unsigned char T0SE:1;
839 unsigned char T0CS:1;
840 unsigned char INTEDG:1;
841 unsigned char NOT_RBPU:1;
843 } __OPTION_REG_bits_t;
844 extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits;
846 #ifndef NO_BIT_DEFINES
847 #define PS0 OPTION_REG_bits.PS0
848 #define PS1 OPTION_REG_bits.PS1
849 #define PS2 OPTION_REG_bits.PS2
850 #define PSA OPTION_REG_bits.PSA
851 #define T0SE OPTION_REG_bits.T0SE
852 #define T0CS OPTION_REG_bits.T0CS
853 #define INTEDG OPTION_REG_bits.INTEDG
854 #define NOT_RBPU OPTION_REG_bits.NOT_RBPU
855 #endif /* NO_BIT_DEFINES */
857 // ----- OSCCON bits --------------------
863 unsigned char OSTS:1;
864 unsigned char IRCF0:1;
865 unsigned char IRCF1:1;
866 unsigned char IRCF2:1;
870 extern volatile __OSCCON_bits_t __at(OSCCON_ADDR) OSCCON_bits;
872 #ifndef NO_BIT_DEFINES
873 #define SCS OSCCON_bits.SCS
874 #define LTS OSCCON_bits.LTS
875 #define HTS OSCCON_bits.HTS
876 #define OSTS OSCCON_bits.OSTS
877 #define IRCF0 OSCCON_bits.IRCF0
878 #define IRCF1 OSCCON_bits.IRCF1
879 #define IRCF2 OSCCON_bits.IRCF2
880 #endif /* NO_BIT_DEFINES */
882 // ----- OSCTUNE bits --------------------
885 unsigned char TUN0:1;
886 unsigned char TUN1:1;
887 unsigned char TUN2:1;
888 unsigned char TUN3:1;
889 unsigned char TUN4:1;
895 extern volatile __OSCTUNE_bits_t __at(OSCTUNE_ADDR) OSCTUNE_bits;
897 #ifndef NO_BIT_DEFINES
898 #define TUN0 OSCTUNE_bits.TUN0
899 #define TUN1 OSCTUNE_bits.TUN1
900 #define TUN2 OSCTUNE_bits.TUN2
901 #define TUN3 OSCTUNE_bits.TUN3
902 #define TUN4 OSCTUNE_bits.TUN4
903 #endif /* NO_BIT_DEFINES */
905 // ----- PCON bits --------------------
908 unsigned char NOT_BO:1;
909 unsigned char NOT_POR:1;
912 unsigned char SBOREN:1;
913 unsigned char ULPWUE:1;
918 unsigned char NOT_BOR:1;
928 extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits;
930 #ifndef NO_BIT_DEFINES
931 #define NOT_BO PCON_bits.NOT_BO
932 #define NOT_BOR PCON_bits.NOT_BOR
933 #define NOT_POR PCON_bits.NOT_POR
934 #define SBOREN PCON_bits.SBOREN
935 #define ULPWUE PCON_bits.ULPWUE
936 #endif /* NO_BIT_DEFINES */
938 // ----- PIE1 bits --------------------
941 unsigned char TMR1IE:1;
942 unsigned char TMR2IE:1;
943 unsigned char CCP1IE:1;
944 unsigned char SSPIE:1;
945 unsigned char TXIE:1;
946 unsigned char RCIE:1;
947 unsigned char ADIE:1;
951 extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits;
953 #ifndef NO_BIT_DEFINES
954 #define TMR1IE PIE1_bits.TMR1IE
955 #define TMR2IE PIE1_bits.TMR2IE
956 #define CCP1IE PIE1_bits.CCP1IE
957 #define SSPIE PIE1_bits.SSPIE
958 #define TXIE PIE1_bits.TXIE
959 #define RCIE PIE1_bits.RCIE
960 #define ADIE PIE1_bits.ADIE
961 #endif /* NO_BIT_DEFINES */
963 // ----- PIE2 bits --------------------
966 unsigned char CCP2IE:1;
968 unsigned char ULPWUIE:1;
969 unsigned char BCLIE:1;
970 unsigned char EEIE:1;
971 unsigned char C1IE:1;
972 unsigned char C2IE:1;
973 unsigned char OSFIE:1;
976 extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits;
978 #ifndef NO_BIT_DEFINES
979 #define CCP2IE PIE2_bits.CCP2IE
980 #define ULPWUIE PIE2_bits.ULPWUIE
981 #define BCLIE PIE2_bits.BCLIE
982 #define EEIE PIE2_bits.EEIE
983 #define C1IE PIE2_bits.C1IE
984 #define C2IE PIE2_bits.C2IE
985 #define OSFIE PIE2_bits.OSFIE
986 #endif /* NO_BIT_DEFINES */
988 // ----- PIR1 bits --------------------
991 unsigned char TMR1IF:1;
992 unsigned char TMR2IF:1;
993 unsigned char CCP1IF:1;
994 unsigned char SSPIF:1;
995 unsigned char TXIF:1;
996 unsigned char RCIF:1;
997 unsigned char ADIF:1;
1001 extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits;
1003 #ifndef NO_BIT_DEFINES
1004 #define TMR1IF PIR1_bits.TMR1IF
1005 #define TMR2IF PIR1_bits.TMR2IF
1006 #define CCP1IF PIR1_bits.CCP1IF
1007 #define SSPIF PIR1_bits.SSPIF
1008 #define TXIF PIR1_bits.TXIF
1009 #define RCIF PIR1_bits.RCIF
1010 #define ADIF PIR1_bits.ADIF
1011 #endif /* NO_BIT_DEFINES */
1013 // ----- PIR2 bits --------------------
1016 unsigned char CCP2IF:1;
1018 unsigned char ULPWUIF:1;
1019 unsigned char BCLIF:1;
1020 unsigned char EEIF:1;
1021 unsigned char C1IF:1;
1022 unsigned char C2IF:1;
1023 unsigned char OSFIF:1;
1026 extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits;
1028 #ifndef NO_BIT_DEFINES
1029 #define CCP2IF PIR2_bits.CCP2IF
1030 #define ULPWUIF PIR2_bits.ULPWUIF
1031 #define BCLIF PIR2_bits.BCLIF
1032 #define EEIF PIR2_bits.EEIF
1033 #define C1IF PIR2_bits.C1IF
1034 #define C2IF PIR2_bits.C2IF
1035 #define OSFIF PIR2_bits.OSFIF
1036 #endif /* NO_BIT_DEFINES */
1038 // ----- PORTA bits --------------------
1041 unsigned char RA0:1;
1042 unsigned char RA1:1;
1043 unsigned char RA2:1;
1044 unsigned char RA3:1;
1045 unsigned char RA4:1;
1046 unsigned char RA5:1;
1051 extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits;
1053 #ifndef NO_BIT_DEFINES
1054 #define RA0 PORTA_bits.RA0
1055 #define RA1 PORTA_bits.RA1
1056 #define RA2 PORTA_bits.RA2
1057 #define RA3 PORTA_bits.RA3
1058 #define RA4 PORTA_bits.RA4
1059 #define RA5 PORTA_bits.RA5
1060 #endif /* NO_BIT_DEFINES */
1062 // ----- PORTB bits --------------------
1065 unsigned char RB0:1;
1066 unsigned char RB1:1;
1067 unsigned char RB2:1;
1068 unsigned char RB3:1;
1069 unsigned char RB4:1;
1070 unsigned char RB5:1;
1071 unsigned char RB6:1;
1072 unsigned char RB7:1;
1075 extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits;
1077 #ifndef NO_BIT_DEFINES
1078 #define RB0 PORTB_bits.RB0
1079 #define RB1 PORTB_bits.RB1
1080 #define RB2 PORTB_bits.RB2
1081 #define RB3 PORTB_bits.RB3
1082 #define RB4 PORTB_bits.RB4
1083 #define RB5 PORTB_bits.RB5
1084 #define RB6 PORTB_bits.RB6
1085 #define RB7 PORTB_bits.RB7
1086 #endif /* NO_BIT_DEFINES */
1088 // ----- PORTC bits --------------------
1091 unsigned char RC0:1;
1092 unsigned char RC1:1;
1093 unsigned char RC2:1;
1094 unsigned char RC3:1;
1095 unsigned char RC4:1;
1096 unsigned char RC5:1;
1097 unsigned char RC6:1;
1098 unsigned char RC7:1;
1101 extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits;
1103 #ifndef NO_BIT_DEFINES
1104 #define RC0 PORTC_bits.RC0
1105 #define RC1 PORTC_bits.RC1
1106 #define RC2 PORTC_bits.RC2
1107 #define RC3 PORTC_bits.RC3
1108 #define RC4 PORTC_bits.RC4
1109 #define RC5 PORTC_bits.RC5
1110 #define RC6 PORTC_bits.RC6
1111 #define RC7 PORTC_bits.RC7
1112 #endif /* NO_BIT_DEFINES */
1114 // ----- PORTE bits --------------------
1117 unsigned char RE0:1;
1118 unsigned char RE1:1;
1119 unsigned char RE2:1;
1127 extern volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits;
1129 #ifndef NO_BIT_DEFINES
1130 #define RE0 PORTE_bits.RE0
1131 #define RE1 PORTE_bits.RE1
1132 #define RE2 PORTE_bits.RE2
1133 #endif /* NO_BIT_DEFINES */
1135 // ----- PSTRCON bits --------------------
1138 unsigned char STRA:1;
1139 unsigned char STRB:1;
1140 unsigned char STRC:1;
1141 unsigned char STRD:1;
1142 unsigned char STRSYNC:1;
1148 extern volatile __PSTRCON_bits_t __at(PSTRCON_ADDR) PSTRCON_bits;
1150 #ifndef NO_BIT_DEFINES
1151 #define STRA PSTRCON_bits.STRA
1152 #define STRB PSTRCON_bits.STRB
1153 #define STRC PSTRCON_bits.STRC
1154 #define STRD PSTRCON_bits.STRD
1155 #define STRSYNC PSTRCON_bits.STRSYNC
1156 #endif /* NO_BIT_DEFINES */
1158 // ----- PWM1CON bits --------------------
1161 unsigned char PDC0:1;
1162 unsigned char PDC1:1;
1163 unsigned char PDC2:1;
1164 unsigned char PDC3:1;
1165 unsigned char PDC4:1;
1166 unsigned char PDC5:1;
1167 unsigned char PDC6:1;
1168 unsigned char PRSEN:1;
1171 extern volatile __PWM1CON_bits_t __at(PWM1CON_ADDR) PWM1CON_bits;
1173 #ifndef NO_BIT_DEFINES
1174 #define PDC0 PWM1CON_bits.PDC0
1175 #define PDC1 PWM1CON_bits.PDC1
1176 #define PDC2 PWM1CON_bits.PDC2
1177 #define PDC3 PWM1CON_bits.PDC3
1178 #define PDC4 PWM1CON_bits.PDC4
1179 #define PDC5 PWM1CON_bits.PDC5
1180 #define PDC6 PWM1CON_bits.PDC6
1181 #define PRSEN PWM1CON_bits.PRSEN
1182 #endif /* NO_BIT_DEFINES */
1184 // ----- RCSTA bits --------------------
1187 unsigned char RX9D:1;
1188 unsigned char OERR:1;
1189 unsigned char FERR:1;
1190 unsigned char ADDEN:1;
1191 unsigned char CREN:1;
1192 unsigned char SREN:1;
1193 unsigned char RX9:1;
1194 unsigned char SPEN:1;
1197 unsigned char RCD8:1;
1203 unsigned char RC9:1;
1213 unsigned char NOT_RC8:1;
1223 unsigned char RC8_9:1;
1227 extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits;
1229 #ifndef NO_BIT_DEFINES
1230 #define RX9D RCSTA_bits.RX9D
1231 #define RCD8 RCSTA_bits.RCD8
1232 #define OERR RCSTA_bits.OERR
1233 #define FERR RCSTA_bits.FERR
1234 #define ADDEN RCSTA_bits.ADDEN
1235 #define CREN RCSTA_bits.CREN
1236 #define SREN RCSTA_bits.SREN
1237 #define RX9 RCSTA_bits.RX9
1238 #define RC9 RCSTA_bits.RC9
1239 #define NOT_RC8 RCSTA_bits.NOT_RC8
1240 #define RC8_9 RCSTA_bits.RC8_9
1241 #define SPEN RCSTA_bits.SPEN
1242 #endif /* NO_BIT_DEFINES */
1244 // ----- SPBRG bits --------------------
1247 unsigned char BRG0:1;
1248 unsigned char BRG1:1;
1249 unsigned char BRG2:1;
1250 unsigned char BRG3:1;
1251 unsigned char BRG4:1;
1252 unsigned char BRG5:1;
1253 unsigned char BRG6:1;
1254 unsigned char BRG7:1;
1257 extern volatile __SPBRG_bits_t __at(SPBRG_ADDR) SPBRG_bits;
1259 #ifndef NO_BIT_DEFINES
1260 #define BRG0 SPBRG_bits.BRG0
1261 #define BRG1 SPBRG_bits.BRG1
1262 #define BRG2 SPBRG_bits.BRG2
1263 #define BRG3 SPBRG_bits.BRG3
1264 #define BRG4 SPBRG_bits.BRG4
1265 #define BRG5 SPBRG_bits.BRG5
1266 #define BRG6 SPBRG_bits.BRG6
1267 #define BRG7 SPBRG_bits.BRG7
1268 #endif /* NO_BIT_DEFINES */
1270 // ----- SPBRGH bits --------------------
1273 unsigned char BRG8:1;
1274 unsigned char BRG9:1;
1275 unsigned char BRG10:1;
1276 unsigned char BRG11:1;
1277 unsigned char BRG12:1;
1278 unsigned char BRG13:1;
1279 unsigned char BRG14:1;
1280 unsigned char BRG15:1;
1283 extern volatile __SPBRGH_bits_t __at(SPBRGH_ADDR) SPBRGH_bits;
1285 #ifndef NO_BIT_DEFINES
1286 #define BRG8 SPBRGH_bits.BRG8
1287 #define BRG9 SPBRGH_bits.BRG9
1288 #define BRG10 SPBRGH_bits.BRG10
1289 #define BRG11 SPBRGH_bits.BRG11
1290 #define BRG12 SPBRGH_bits.BRG12
1291 #define BRG13 SPBRGH_bits.BRG13
1292 #define BRG14 SPBRGH_bits.BRG14
1293 #define BRG15 SPBRGH_bits.BRG15
1294 #endif /* NO_BIT_DEFINES */
1296 // ----- SRCON bits --------------------
1299 unsigned char FVREN:1;
1301 unsigned char PULSR:1;
1302 unsigned char PULSS:1;
1303 unsigned char C2REN:1;
1304 unsigned char C1SEN:1;
1305 unsigned char SR0:1;
1306 unsigned char SR1:1;
1309 extern volatile __SRCON_bits_t __at(SRCON_ADDR) SRCON_bits;
1311 #ifndef NO_BIT_DEFINES
1312 #define FVREN SRCON_bits.FVREN
1313 #define PULSR SRCON_bits.PULSR
1314 #define PULSS SRCON_bits.PULSS
1315 #define C2REN SRCON_bits.C2REN
1316 #define C1SEN SRCON_bits.C1SEN
1317 #define SR0 SRCON_bits.SR0
1318 #define SR1 SRCON_bits.SR1
1319 #endif /* NO_BIT_DEFINES */
1321 // ----- SSPCON bits --------------------
1324 unsigned char SSPM0:1;
1325 unsigned char SSPM1:1;
1326 unsigned char SSPM2:1;
1327 unsigned char SSPM3:1;
1328 unsigned char CKP:1;
1329 unsigned char SSPEN:1;
1330 unsigned char SSPOV:1;
1331 unsigned char WCOL:1;
1334 extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits;
1336 #ifndef NO_BIT_DEFINES
1337 #define SSPM0 SSPCON_bits.SSPM0
1338 #define SSPM1 SSPCON_bits.SSPM1
1339 #define SSPM2 SSPCON_bits.SSPM2
1340 #define SSPM3 SSPCON_bits.SSPM3
1341 #define CKP SSPCON_bits.CKP
1342 #define SSPEN SSPCON_bits.SSPEN
1343 #define SSPOV SSPCON_bits.SSPOV
1344 #define WCOL SSPCON_bits.WCOL
1345 #endif /* NO_BIT_DEFINES */
1347 // ----- SSPCON2 bits --------------------
1350 unsigned char SEN:1;
1351 unsigned char RSEN:1;
1352 unsigned char PEN:1;
1353 unsigned char RCEN:1;
1354 unsigned char ACKEN:1;
1355 unsigned char ACKDT:1;
1356 unsigned char ACKSTAT:1;
1357 unsigned char GCEN:1;
1360 extern volatile __SSPCON2_bits_t __at(SSPCON2_ADDR) SSPCON2_bits;
1362 #ifndef NO_BIT_DEFINES
1363 #define SEN SSPCON2_bits.SEN
1364 #define RSEN SSPCON2_bits.RSEN
1365 #define PEN SSPCON2_bits.PEN
1366 #define RCEN SSPCON2_bits.RCEN
1367 #define ACKEN SSPCON2_bits.ACKEN
1368 #define ACKDT SSPCON2_bits.ACKDT
1369 #define ACKSTAT SSPCON2_bits.ACKSTAT
1370 #define GCEN SSPCON2_bits.GCEN
1371 #endif /* NO_BIT_DEFINES */
1373 // ----- SSPSTAT bits --------------------
1382 unsigned char CKE:1;
1383 unsigned char SMP:1;
1388 unsigned char I2C_READ:1;
1389 unsigned char I2C_START:1;
1390 unsigned char I2C_STOP:1;
1391 unsigned char I2C_DATA:1;
1398 unsigned char NOT_W:1;
1401 unsigned char NOT_A:1;
1408 unsigned char NOT_WRITE:1;
1411 unsigned char NOT_ADDRESS:1;
1418 unsigned char R_W:1;
1421 unsigned char D_A:1;
1428 unsigned char READ_WRITE:1;
1431 unsigned char DATA_ADDRESS:1;
1436 extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits;
1438 #ifndef NO_BIT_DEFINES
1439 #define BF SSPSTAT_bits.BF
1440 #define UA SSPSTAT_bits.UA
1441 #define R SSPSTAT_bits.R
1442 #define I2C_READ SSPSTAT_bits.I2C_READ
1443 #define NOT_W SSPSTAT_bits.NOT_W
1444 #define NOT_WRITE SSPSTAT_bits.NOT_WRITE
1445 #define R_W SSPSTAT_bits.R_W
1446 #define READ_WRITE SSPSTAT_bits.READ_WRITE
1447 #define S SSPSTAT_bits.S
1448 #define I2C_START SSPSTAT_bits.I2C_START
1449 #define P SSPSTAT_bits.P
1450 #define I2C_STOP SSPSTAT_bits.I2C_STOP
1451 #define D SSPSTAT_bits.D
1452 #define I2C_DATA SSPSTAT_bits.I2C_DATA
1453 #define NOT_A SSPSTAT_bits.NOT_A
1454 #define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS
1455 #define D_A SSPSTAT_bits.D_A
1456 #define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS
1457 #define CKE SSPSTAT_bits.CKE
1458 #define SMP SSPSTAT_bits.SMP
1459 #endif /* NO_BIT_DEFINES */
1461 // ----- STATUS bits --------------------
1467 unsigned char NOT_PD:1;
1468 unsigned char NOT_TO:1;
1469 unsigned char RP0:1;
1470 unsigned char RP1:1;
1471 unsigned char IRP:1;
1474 extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits;
1476 #ifndef NO_BIT_DEFINES
1477 #define C STATUS_bits.C
1478 #define DC STATUS_bits.DC
1479 #define Z STATUS_bits.Z
1480 #define NOT_PD STATUS_bits.NOT_PD
1481 #define NOT_TO STATUS_bits.NOT_TO
1482 #define RP0 STATUS_bits.RP0
1483 #define RP1 STATUS_bits.RP1
1484 #define IRP STATUS_bits.IRP
1485 #endif /* NO_BIT_DEFINES */
1487 // ----- T1CON bits --------------------
1490 unsigned char TMR1ON:1;
1491 unsigned char TMR1CS:1;
1492 unsigned char NOT_T1SYNC:1;
1493 unsigned char T1OSCEN:1;
1494 unsigned char T1CKPS0:1;
1495 unsigned char T1CKPS1:1;
1496 unsigned char TMR1GE:1;
1497 unsigned char T1GINV:1;
1502 unsigned char T1INSYNC:1;
1512 unsigned char T1SYNC:1;
1520 extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits;
1522 #ifndef NO_BIT_DEFINES
1523 #define TMR1ON T1CON_bits.TMR1ON
1524 #define TMR1CS T1CON_bits.TMR1CS
1525 #define NOT_T1SYNC T1CON_bits.NOT_T1SYNC
1526 #define T1INSYNC T1CON_bits.T1INSYNC
1527 #define T1SYNC T1CON_bits.T1SYNC
1528 #define T1OSCEN T1CON_bits.T1OSCEN
1529 #define T1CKPS0 T1CON_bits.T1CKPS0
1530 #define T1CKPS1 T1CON_bits.T1CKPS1
1531 #define TMR1GE T1CON_bits.TMR1GE
1532 #define T1GINV T1CON_bits.T1GINV
1533 #endif /* NO_BIT_DEFINES */
1535 // ----- T2CON bits --------------------
1538 unsigned char T2CKPS0:1;
1539 unsigned char T2CKPS1:1;
1540 unsigned char TMR2ON:1;
1541 unsigned char TOUTPS0:1;
1542 unsigned char TOUTPS1:1;
1543 unsigned char TOUTPS2:1;
1544 unsigned char TOUTPS3:1;
1548 extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits;
1550 #ifndef NO_BIT_DEFINES
1551 #define T2CKPS0 T2CON_bits.T2CKPS0
1552 #define T2CKPS1 T2CON_bits.T2CKPS1
1553 #define TMR2ON T2CON_bits.TMR2ON
1554 #define TOUTPS0 T2CON_bits.TOUTPS0
1555 #define TOUTPS1 T2CON_bits.TOUTPS1
1556 #define TOUTPS2 T2CON_bits.TOUTPS2
1557 #define TOUTPS3 T2CON_bits.TOUTPS3
1558 #endif /* NO_BIT_DEFINES */
1560 // ----- TRISA bits --------------------
1563 unsigned char TRISA0:1;
1564 unsigned char TRISA1:1;
1565 unsigned char TRISA2:1;
1566 unsigned char TRISA3:1;
1567 unsigned char TRISA4:1;
1568 unsigned char TRISA5:1;
1573 extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits;
1575 #ifndef NO_BIT_DEFINES
1576 #define TRISA0 TRISA_bits.TRISA0
1577 #define TRISA1 TRISA_bits.TRISA1
1578 #define TRISA2 TRISA_bits.TRISA2
1579 #define TRISA3 TRISA_bits.TRISA3
1580 #define TRISA4 TRISA_bits.TRISA4
1581 #define TRISA5 TRISA_bits.TRISA5
1582 #endif /* NO_BIT_DEFINES */
1584 // ----- TRISB bits --------------------
1587 unsigned char TRISB0:1;
1588 unsigned char TRISB1:1;
1589 unsigned char TRISB2:1;
1590 unsigned char TRISB3:1;
1591 unsigned char TRISB4:1;
1592 unsigned char TRISB5:1;
1593 unsigned char TRISB6:1;
1594 unsigned char TRISB7:1;
1597 extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits;
1599 #ifndef NO_BIT_DEFINES
1600 #define TRISB0 TRISB_bits.TRISB0
1601 #define TRISB1 TRISB_bits.TRISB1
1602 #define TRISB2 TRISB_bits.TRISB2
1603 #define TRISB3 TRISB_bits.TRISB3
1604 #define TRISB4 TRISB_bits.TRISB4
1605 #define TRISB5 TRISB_bits.TRISB5
1606 #define TRISB6 TRISB_bits.TRISB6
1607 #define TRISB7 TRISB_bits.TRISB7
1608 #endif /* NO_BIT_DEFINES */
1610 // ----- TRISC bits --------------------
1613 unsigned char TRISC0:1;
1614 unsigned char TRISC1:1;
1615 unsigned char TRISC2:1;
1616 unsigned char TRISC3:1;
1617 unsigned char TRISC4:1;
1618 unsigned char TRISC5:1;
1619 unsigned char TRISC6:1;
1620 unsigned char TRISC7:1;
1623 extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits;
1625 #ifndef NO_BIT_DEFINES
1626 #define TRISC0 TRISC_bits.TRISC0
1627 #define TRISC1 TRISC_bits.TRISC1
1628 #define TRISC2 TRISC_bits.TRISC2
1629 #define TRISC3 TRISC_bits.TRISC3
1630 #define TRISC4 TRISC_bits.TRISC4
1631 #define TRISC5 TRISC_bits.TRISC5
1632 #define TRISC6 TRISC_bits.TRISC6
1633 #define TRISC7 TRISC_bits.TRISC7
1634 #endif /* NO_BIT_DEFINES */
1636 // ----- TRISE bits --------------------
1639 unsigned char TRISE0:1;
1640 unsigned char TRISE1:1;
1641 unsigned char TRISE2:1;
1649 extern volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits;
1651 #ifndef NO_BIT_DEFINES
1652 #define TRISE0 TRISE_bits.TRISE0
1653 #define TRISE1 TRISE_bits.TRISE1
1654 #define TRISE2 TRISE_bits.TRISE2
1655 #endif /* NO_BIT_DEFINES */
1657 // ----- TXSTA bits --------------------
1660 unsigned char TX9D:1;
1661 unsigned char TRMT:1;
1662 unsigned char BRGH:1;
1663 unsigned char SENDB:1;
1664 unsigned char SYNC:1;
1665 unsigned char TXEN:1;
1666 unsigned char TX9:1;
1667 unsigned char CSRC:1;
1670 unsigned char TXD8:1;
1676 unsigned char NOT_TX8:1;
1686 unsigned char TX8_9:1;
1690 extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits;
1692 #ifndef NO_BIT_DEFINES
1693 #define TX9D TXSTA_bits.TX9D
1694 #define TXD8 TXSTA_bits.TXD8
1695 #define TRMT TXSTA_bits.TRMT
1696 #define BRGH TXSTA_bits.BRGH
1697 #define SENDB TXSTA_bits.SENDB
1698 #define SYNC TXSTA_bits.SYNC
1699 #define TXEN TXSTA_bits.TXEN
1700 #define TX9 TXSTA_bits.TX9
1701 #define NOT_TX8 TXSTA_bits.NOT_TX8
1702 #define TX8_9 TXSTA_bits.TX8_9
1703 #define CSRC TXSTA_bits.CSRC
1704 #endif /* NO_BIT_DEFINES */
1706 // ----- VRCON bits --------------------
1709 unsigned char VR0:1;
1710 unsigned char VR1:1;
1711 unsigned char VR2:1;
1712 unsigned char VR3:1;
1713 unsigned char VRSS:1;
1714 unsigned char VRR:1;
1715 unsigned char VROE:1;
1716 unsigned char VREN:1;
1719 extern volatile __VRCON_bits_t __at(VRCON_ADDR) VRCON_bits;
1721 #ifndef NO_BIT_DEFINES
1722 #define VR0 VRCON_bits.VR0
1723 #define VR1 VRCON_bits.VR1
1724 #define VR2 VRCON_bits.VR2
1725 #define VR3 VRCON_bits.VR3
1726 #define VRSS VRCON_bits.VRSS
1727 #define VRR VRCON_bits.VRR
1728 #define VROE VRCON_bits.VROE
1729 #define VREN VRCON_bits.VREN
1730 #endif /* NO_BIT_DEFINES */
1732 // ----- WDTCON bits --------------------
1735 unsigned char SWDTEN:1;
1736 unsigned char WDTPS0:1;
1737 unsigned char WDTPS1:1;
1738 unsigned char WDTPS2:1;
1739 unsigned char WDTPS3:1;
1745 extern volatile __WDTCON_bits_t __at(WDTCON_ADDR) WDTCON_bits;
1747 #ifndef NO_BIT_DEFINES
1748 #define SWDTEN WDTCON_bits.SWDTEN
1749 #define WDTPS0 WDTCON_bits.WDTPS0
1750 #define WDTPS1 WDTCON_bits.WDTPS1
1751 #define WDTPS2 WDTCON_bits.WDTPS2
1752 #define WDTPS3 WDTCON_bits.WDTPS3
1753 #endif /* NO_BIT_DEFINES */
1755 // ----- WPUB bits --------------------
1758 unsigned char WPUB0:1;
1759 unsigned char WPUB1:1;
1760 unsigned char WPUB2:1;
1761 unsigned char WPUB3:1;
1762 unsigned char WPUB4:1;
1763 unsigned char WPUB5:1;
1764 unsigned char WPUB6:1;
1765 unsigned char WPUB7:1;
1768 extern volatile __WPUB_bits_t __at(WPUB_ADDR) WPUB_bits;
1770 #ifndef NO_BIT_DEFINES
1771 #define WPUB0 WPUB_bits.WPUB0
1772 #define WPUB1 WPUB_bits.WPUB1
1773 #define WPUB2 WPUB_bits.WPUB2
1774 #define WPUB3 WPUB_bits.WPUB3
1775 #define WPUB4 WPUB_bits.WPUB4
1776 #define WPUB5 WPUB_bits.WPUB5
1777 #define WPUB6 WPUB_bits.WPUB6
1778 #define WPUB7 WPUB_bits.WPUB7
1779 #endif /* NO_BIT_DEFINES */