2 // Register Declarations for Microchip 16F874A Processor
5 // This header file was automatically generated by:
9 // Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved
11 // SDCC is licensed under the GNU Public license (GPL) v2. Note that
12 // this license covers the code to the compiler and other executables,
13 // but explicitly does not cover any code or objects generated by sdcc.
14 // We have not yet decided on a license for the run time libraries, but
15 // it will not put any requirements on code linked against it. See:
17 // http://www.gnu.org/copyleft/gpl/html
19 // See http://sdcc.sourceforge.net/ for the latest information on sdcc.
26 // Register addresses.
28 #define INDF_ADDR 0x0000
29 #define TMR0_ADDR 0x0001
30 #define PCL_ADDR 0x0002
31 #define STATUS_ADDR 0x0003
32 #define FSR_ADDR 0x0004
33 #define PORTA_ADDR 0x0005
34 #define PORTB_ADDR 0x0006
35 #define PORTC_ADDR 0x0007
36 #define PORTD_ADDR 0x0008
37 #define PORTE_ADDR 0x0009
38 #define PCLATH_ADDR 0x000A
39 #define INTCON_ADDR 0x000B
40 #define PIR1_ADDR 0x000C
41 #define PIR2_ADDR 0x000D
42 #define TMR1L_ADDR 0x000E
43 #define TMR1H_ADDR 0x000F
44 #define T1CON_ADDR 0x0010
45 #define TMR2_ADDR 0x0011
46 #define T2CON_ADDR 0x0012
47 #define SSPBUF_ADDR 0x0013
48 #define SSPCON_ADDR 0x0014
49 #define CCPR1L_ADDR 0x0015
50 #define CCPR1H_ADDR 0x0016
51 #define CCP1CON_ADDR 0x0017
52 #define RCSTA_ADDR 0x0018
53 #define TXREG_ADDR 0x0019
54 #define RCREG_ADDR 0x001A
55 #define CCPR2L_ADDR 0x001B
56 #define CCPR2H_ADDR 0x001C
57 #define CCP2CON_ADDR 0x001D
58 #define ADRESH_ADDR 0x001E
59 #define ADCON0_ADDR 0x001F
60 #define OPTION_REG_ADDR 0x0081
61 #define TRISA_ADDR 0x0085
62 #define TRISB_ADDR 0x0086
63 #define TRISC_ADDR 0x0087
64 #define TRISD_ADDR 0x0088
65 #define TRISE_ADDR 0x0089
66 #define PIE1_ADDR 0x008C
67 #define PIE2_ADDR 0x008D
68 #define PCON_ADDR 0x008E
69 #define SSPCON2_ADDR 0x0091
70 #define PR2_ADDR 0x0092
71 #define SSPADD_ADDR 0x0093
72 #define SSPSTAT_ADDR 0x0094
73 #define TXSTA_ADDR 0x0098
74 #define SPBRG_ADDR 0x0099
75 #define CMCON_ADDR 0x009C
76 #define CVRCON_ADDR 0x009D
77 #define ADRESL_ADDR 0x009E
78 #define ADCON1_ADDR 0x009F
79 #define EEDATA_ADDR 0x010C
80 #define EEADR_ADDR 0x010D
81 #define EEDATH_ADDR 0x010E
82 #define EEADRH_ADDR 0x010F
83 #define EECON1_ADDR 0x018C
84 #define EECON2_ADDR 0x018D
87 // Memory organization.
93 // P16F874A.INC Standard Header File, Version 1.00 Microchip Technology, Inc.
96 // This header file defines configurations, registers, and other useful bits of
97 // information for the PIC16F877A microcontroller. These names are taken to match
98 // the data sheets as closely as possible.
100 // Note that the processor must be selected before this file is
101 // included. The processor may be selected the following ways:
103 // 1. Command line switch:
104 // C:\ MPASM MYFILE.ASM /PIC16F874A
105 // 2. LIST directive in the source file
107 // 3. Processor Type entry in the MPASM full-screen interface
109 //==========================================================================
113 //==========================================================================
116 //1.03 11/17/05 Added the INTCON bits TMR0IE and TMR0IF and the ADCON1 bit ADCS2.
117 //1.02 05/28/02 Corrected values for _CP_ALL and _CP_OFF in Configuration Bits section.
118 //1.01 10/03/01 Added the PIR2 bit CMIF and the PIE2 bit CMIE
119 //1.00 04/19/01 Initial Release (BD - generated from PIC16F877A.inc)
121 //==========================================================================
125 //==========================================================================
128 // MESSG "Processor-header file mismatch. Verify selected processor."
131 //==========================================================================
133 // Register Definitions
135 //==========================================================================
140 //----- Register Files------------------------------------------------------
142 extern __sfr __at (INDF_ADDR) INDF;
143 extern __sfr __at (TMR0_ADDR) TMR0;
144 extern __sfr __at (PCL_ADDR) PCL;
145 extern __sfr __at (STATUS_ADDR) STATUS;
146 extern __sfr __at (FSR_ADDR) FSR;
147 extern __sfr __at (PORTA_ADDR) PORTA;
148 extern __sfr __at (PORTB_ADDR) PORTB;
149 extern __sfr __at (PORTC_ADDR) PORTC;
150 extern __sfr __at (PORTD_ADDR) PORTD;
151 extern __sfr __at (PORTE_ADDR) PORTE;
152 extern __sfr __at (PCLATH_ADDR) PCLATH;
153 extern __sfr __at (INTCON_ADDR) INTCON;
154 extern __sfr __at (PIR1_ADDR) PIR1;
155 extern __sfr __at (PIR2_ADDR) PIR2;
156 extern __sfr __at (TMR1L_ADDR) TMR1L;
157 extern __sfr __at (TMR1H_ADDR) TMR1H;
158 extern __sfr __at (T1CON_ADDR) T1CON;
159 extern __sfr __at (TMR2_ADDR) TMR2;
160 extern __sfr __at (T2CON_ADDR) T2CON;
161 extern __sfr __at (SSPBUF_ADDR) SSPBUF;
162 extern __sfr __at (SSPCON_ADDR) SSPCON;
163 extern __sfr __at (CCPR1L_ADDR) CCPR1L;
164 extern __sfr __at (CCPR1H_ADDR) CCPR1H;
165 extern __sfr __at (CCP1CON_ADDR) CCP1CON;
166 extern __sfr __at (RCSTA_ADDR) RCSTA;
167 extern __sfr __at (TXREG_ADDR) TXREG;
168 extern __sfr __at (RCREG_ADDR) RCREG;
169 extern __sfr __at (CCPR2L_ADDR) CCPR2L;
170 extern __sfr __at (CCPR2H_ADDR) CCPR2H;
171 extern __sfr __at (CCP2CON_ADDR) CCP2CON;
172 extern __sfr __at (ADRESH_ADDR) ADRESH;
173 extern __sfr __at (ADCON0_ADDR) ADCON0;
175 extern __sfr __at (OPTION_REG_ADDR) OPTION_REG;
176 extern __sfr __at (TRISA_ADDR) TRISA;
177 extern __sfr __at (TRISB_ADDR) TRISB;
178 extern __sfr __at (TRISC_ADDR) TRISC;
179 extern __sfr __at (TRISD_ADDR) TRISD;
180 extern __sfr __at (TRISE_ADDR) TRISE;
181 extern __sfr __at (PIE1_ADDR) PIE1;
182 extern __sfr __at (PIE2_ADDR) PIE2;
183 extern __sfr __at (PCON_ADDR) PCON;
184 extern __sfr __at (SSPCON2_ADDR) SSPCON2;
185 extern __sfr __at (PR2_ADDR) PR2;
186 extern __sfr __at (SSPADD_ADDR) SSPADD;
187 extern __sfr __at (SSPSTAT_ADDR) SSPSTAT;
188 extern __sfr __at (TXSTA_ADDR) TXSTA;
189 extern __sfr __at (SPBRG_ADDR) SPBRG;
190 extern __sfr __at (CMCON_ADDR) CMCON;
191 extern __sfr __at (CVRCON_ADDR) CVRCON;
192 extern __sfr __at (ADRESL_ADDR) ADRESL;
193 extern __sfr __at (ADCON1_ADDR) ADCON1;
195 extern __sfr __at (EEDATA_ADDR) EEDATA;
196 extern __sfr __at (EEADR_ADDR) EEADR;
197 extern __sfr __at (EEDATH_ADDR) EEDATH;
198 extern __sfr __at (EEADRH_ADDR) EEADRH;
200 extern __sfr __at (EECON1_ADDR) EECON1;
201 extern __sfr __at (EECON2_ADDR) EECON2;
203 //----- STATUS Bits --------------------------------------------------------
206 //----- INTCON Bits --------------------------------------------------------
209 //----- PIR1 Bits ----------------------------------------------------------
212 //----- PIR2 Bits ----------------------------------------------------------
215 //----- T1CON Bits ---------------------------------------------------------
218 //----- T2CON Bits ---------------------------------------------------------
221 //----- SSPCON Bits --------------------------------------------------------
224 //----- CCP1CON Bits -------------------------------------------------------
227 //----- RCSTA Bits ---------------------------------------------------------
230 //----- CCP2CON Bits -------------------------------------------------------
233 //----- ADCON0 Bits --------------------------------------------------------
236 //----- OPTION_REG Bits -----------------------------------------------------
239 //----- TRISE Bits ---------------------------------------------------------
242 //----- PIE1 Bits ----------------------------------------------------------
245 //----- PIE2 Bits ----------------------------------------------------------
248 //----- PCON Bits ----------------------------------------------------------
251 //----- SSPCON2 Bits --------------------------------------------------------
254 //----- SSPSTAT Bits -------------------------------------------------------
257 //----- TXSTA Bits ---------------------------------------------------------
261 //----- CMCON Bits ---------------------------------------------------------
263 //----- CVRCON Bits --------------------------------------------------------
265 //----- ADCON1 Bits --------------------------------------------------------
268 //----- EECON1 Bits --------------------------------------------------------
271 //==========================================================================
275 //==========================================================================
278 // __BADRAM H'8F'-H'90', H'95'-H'97', H'9A'-H'9B'
279 // __BADRAM H'105', H'107'-H'109', H'110'-H'11F'
280 // __BADRAM H'185', H'187'-H'189', H'18E'-H'19F'
282 //==========================================================================
284 // Configuration Bits
286 //==========================================================================
288 #define _CP_ALL 0x1FFF
289 #define _CP_OFF 0x3FFF
290 #define _DEBUG_OFF 0x3FFF
291 #define _DEBUG_ON 0x37FF
292 #define _WRT_OFF 0x3FFF // No prog memmory write protection
293 #define _WRT_256 0x3DFF // First 256 prog memmory write protected
294 #define _WRT_1FOURTH 0x3BFF // First quarter prog memmory write protected
295 #define _WRT_HALF 0x39FF // First half memmory write protected
296 #define _CPD_OFF 0x3FFF
297 #define _CPD_ON 0x3EFF
298 #define _LVP_ON 0x3FFF
299 #define _LVP_OFF 0x3F7F
300 #define _BODEN_ON 0x3FFF
301 #define _BODEN_OFF 0x3FBF
302 #define _PWRTE_OFF 0x3FFF
303 #define _PWRTE_ON 0x3FF7
304 #define _WDT_ON 0x3FFF
305 #define _WDT_OFF 0x3FFB
306 #define _RC_OSC 0x3FFF
307 #define _HS_OSC 0x3FFE
308 #define _XT_OSC 0x3FFD
309 #define _LP_OSC 0x3FFC
313 // ----- ADCON0 bits --------------------
316 unsigned char ADON:1;
319 unsigned char CHS0:1;
320 unsigned char CHS1:1;
321 unsigned char CHS2:1;
322 unsigned char ADCS0:1;
323 unsigned char ADCS1:1;
328 unsigned char NOT_DONE:1;
338 unsigned char GO_DONE:1;
346 extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits;
348 #ifndef NO_BIT_DEFINES
349 #define ADON ADCON0_bits.ADON
350 #define GO ADCON0_bits.GO
351 #define NOT_DONE ADCON0_bits.NOT_DONE
352 #define GO_DONE ADCON0_bits.GO_DONE
353 #define CHS0 ADCON0_bits.CHS0
354 #define CHS1 ADCON0_bits.CHS1
355 #define CHS2 ADCON0_bits.CHS2
356 #define ADCS0 ADCON0_bits.ADCS0
357 #define ADCS1 ADCON0_bits.ADCS1
358 #endif /* NO_BIT_DEFINES */
360 // ----- ADCON1 bits --------------------
363 unsigned char PCFG0:1;
364 unsigned char PCFG1:1;
365 unsigned char PCFG2:1;
366 unsigned char PCFG3:1;
369 unsigned char ADCS2:1;
370 unsigned char ADFM:1;
373 extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits;
375 #ifndef NO_BIT_DEFINES
376 #define PCFG0 ADCON1_bits.PCFG0
377 #define PCFG1 ADCON1_bits.PCFG1
378 #define PCFG2 ADCON1_bits.PCFG2
379 #define PCFG3 ADCON1_bits.PCFG3
380 #define ADCS2 ADCON1_bits.ADCS2
381 #define ADFM ADCON1_bits.ADFM
382 #endif /* NO_BIT_DEFINES */
384 // ----- CCP1CON bits --------------------
387 unsigned char CCP1M0:1;
388 unsigned char CCP1M1:1;
389 unsigned char CCP1M2:1;
390 unsigned char CCP1M3:1;
391 unsigned char CCP1Y:1;
392 unsigned char CCP1X:1;
397 extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits;
399 #ifndef NO_BIT_DEFINES
400 #define CCP1M0 CCP1CON_bits.CCP1M0
401 #define CCP1M1 CCP1CON_bits.CCP1M1
402 #define CCP1M2 CCP1CON_bits.CCP1M2
403 #define CCP1M3 CCP1CON_bits.CCP1M3
404 #define CCP1Y CCP1CON_bits.CCP1Y
405 #define CCP1X CCP1CON_bits.CCP1X
406 #endif /* NO_BIT_DEFINES */
408 // ----- CCP2CON bits --------------------
411 unsigned char CCP2M0:1;
412 unsigned char CCP2M1:1;
413 unsigned char CCP2M2:1;
414 unsigned char CCP2M3:1;
415 unsigned char CCP2Y:1;
416 unsigned char CCP2X:1;
421 extern volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits;
423 #ifndef NO_BIT_DEFINES
424 #define CCP2M0 CCP2CON_bits.CCP2M0
425 #define CCP2M1 CCP2CON_bits.CCP2M1
426 #define CCP2M2 CCP2CON_bits.CCP2M2
427 #define CCP2M3 CCP2CON_bits.CCP2M3
428 #define CCP2Y CCP2CON_bits.CCP2Y
429 #define CCP2X CCP2CON_bits.CCP2X
430 #endif /* NO_BIT_DEFINES */
432 // ----- CMCON bits --------------------
439 unsigned char C1INV:1;
440 unsigned char C2INV:1;
441 unsigned char C1OUT:1;
442 unsigned char C2OUT:1;
445 extern volatile __CMCON_bits_t __at(CMCON_ADDR) CMCON_bits;
447 #ifndef NO_BIT_DEFINES
448 #define CM0 CMCON_bits.CM0
449 #define CM1 CMCON_bits.CM1
450 #define CM2 CMCON_bits.CM2
451 #define CIS CMCON_bits.CIS
452 #define C1INV CMCON_bits.C1INV
453 #define C2INV CMCON_bits.C2INV
454 #define C1OUT CMCON_bits.C1OUT
455 #define C2OUT CMCON_bits.C2OUT
456 #endif /* NO_BIT_DEFINES */
458 // ----- CVRCON bits --------------------
461 unsigned char CVR0:1;
462 unsigned char CVR1:1;
463 unsigned char CVR2:1;
464 unsigned char CVR3:1;
466 unsigned char CVRR:1;
467 unsigned char CVROE:1;
468 unsigned char CVREN:1;
471 extern volatile __CVRCON_bits_t __at(CVRCON_ADDR) CVRCON_bits;
473 #ifndef NO_BIT_DEFINES
474 #define CVR0 CVRCON_bits.CVR0
475 #define CVR1 CVRCON_bits.CVR1
476 #define CVR2 CVRCON_bits.CVR2
477 #define CVR3 CVRCON_bits.CVR3
478 #define CVRR CVRCON_bits.CVRR
479 #define CVROE CVRCON_bits.CVROE
480 #define CVREN CVRCON_bits.CVREN
481 #endif /* NO_BIT_DEFINES */
483 // ----- EECON1 bits --------------------
488 unsigned char WREN:1;
489 unsigned char WRERR:1;
493 unsigned char EEPGD:1;
496 extern volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits;
498 #ifndef NO_BIT_DEFINES
499 #define RD EECON1_bits.RD
500 #define WR EECON1_bits.WR
501 #define WREN EECON1_bits.WREN
502 #define WRERR EECON1_bits.WRERR
503 #define EEPGD EECON1_bits.EEPGD
504 #endif /* NO_BIT_DEFINES */
506 // ----- INTCON bits --------------------
509 unsigned char RBIF:1;
510 unsigned char INTF:1;
511 unsigned char T0IF:1;
512 unsigned char RBIE:1;
513 unsigned char INTE:1;
514 unsigned char T0IE:1;
515 unsigned char PEIE:1;
521 unsigned char TMR0IF:1;
524 unsigned char TMR0IE:1;
529 extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits;
531 #ifndef NO_BIT_DEFINES
532 #define RBIF INTCON_bits.RBIF
533 #define INTF INTCON_bits.INTF
534 #define T0IF INTCON_bits.T0IF
535 #define TMR0IF INTCON_bits.TMR0IF
536 #define RBIE INTCON_bits.RBIE
537 #define INTE INTCON_bits.INTE
538 #define T0IE INTCON_bits.T0IE
539 #define TMR0IE INTCON_bits.TMR0IE
540 #define PEIE INTCON_bits.PEIE
541 #define GIE INTCON_bits.GIE
542 #endif /* NO_BIT_DEFINES */
544 // ----- OPTION_REG bits --------------------
551 unsigned char T0SE:1;
552 unsigned char T0CS:1;
553 unsigned char INTEDG:1;
554 unsigned char NOT_RBPU:1;
556 } __OPTION_REG_bits_t;
557 extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits;
559 #ifndef NO_BIT_DEFINES
560 #define PS0 OPTION_REG_bits.PS0
561 #define PS1 OPTION_REG_bits.PS1
562 #define PS2 OPTION_REG_bits.PS2
563 #define PSA OPTION_REG_bits.PSA
564 #define T0SE OPTION_REG_bits.T0SE
565 #define T0CS OPTION_REG_bits.T0CS
566 #define INTEDG OPTION_REG_bits.INTEDG
567 #define NOT_RBPU OPTION_REG_bits.NOT_RBPU
568 #endif /* NO_BIT_DEFINES */
570 // ----- PCON bits --------------------
573 unsigned char NOT_BO:1;
574 unsigned char NOT_POR:1;
583 unsigned char NOT_BOR:1;
593 extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits;
595 #ifndef NO_BIT_DEFINES
596 #define NOT_BO PCON_bits.NOT_BO
597 #define NOT_BOR PCON_bits.NOT_BOR
598 #define NOT_POR PCON_bits.NOT_POR
599 #endif /* NO_BIT_DEFINES */
601 // ----- PIE1 bits --------------------
604 unsigned char TMR1IE:1;
605 unsigned char TMR2IE:1;
606 unsigned char CCP1IE:1;
607 unsigned char SSPIE:1;
608 unsigned char TXIE:1;
609 unsigned char RCIE:1;
610 unsigned char ADIE:1;
611 unsigned char PSPIE:1;
614 extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits;
616 #ifndef NO_BIT_DEFINES
617 #define TMR1IE PIE1_bits.TMR1IE
618 #define TMR2IE PIE1_bits.TMR2IE
619 #define CCP1IE PIE1_bits.CCP1IE
620 #define SSPIE PIE1_bits.SSPIE
621 #define TXIE PIE1_bits.TXIE
622 #define RCIE PIE1_bits.RCIE
623 #define ADIE PIE1_bits.ADIE
624 #define PSPIE PIE1_bits.PSPIE
625 #endif /* NO_BIT_DEFINES */
627 // ----- PIE2 bits --------------------
630 unsigned char CCP2IE:1;
633 unsigned char BCLIE:1;
634 unsigned char EEIE:1;
636 unsigned char CMIE:1;
640 extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits;
642 #ifndef NO_BIT_DEFINES
643 #define CCP2IE PIE2_bits.CCP2IE
644 #define BCLIE PIE2_bits.BCLIE
645 #define EEIE PIE2_bits.EEIE
646 #define CMIE PIE2_bits.CMIE
647 #endif /* NO_BIT_DEFINES */
649 // ----- PIR1 bits --------------------
652 unsigned char TMR1IF:1;
653 unsigned char TMR2IF:1;
654 unsigned char CCP1IF:1;
655 unsigned char SSPIF:1;
656 unsigned char TXIF:1;
657 unsigned char RCIF:1;
658 unsigned char ADIF:1;
659 unsigned char PSPIF:1;
662 extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits;
664 #ifndef NO_BIT_DEFINES
665 #define TMR1IF PIR1_bits.TMR1IF
666 #define TMR2IF PIR1_bits.TMR2IF
667 #define CCP1IF PIR1_bits.CCP1IF
668 #define SSPIF PIR1_bits.SSPIF
669 #define TXIF PIR1_bits.TXIF
670 #define RCIF PIR1_bits.RCIF
671 #define ADIF PIR1_bits.ADIF
672 #define PSPIF PIR1_bits.PSPIF
673 #endif /* NO_BIT_DEFINES */
675 // ----- PIR2 bits --------------------
678 unsigned char CCP2IF:1;
681 unsigned char BCLIF:1;
682 unsigned char EEIF:1;
684 unsigned char CMIF:1;
688 extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits;
690 #ifndef NO_BIT_DEFINES
691 #define CCP2IF PIR2_bits.CCP2IF
692 #define BCLIF PIR2_bits.BCLIF
693 #define EEIF PIR2_bits.EEIF
694 #define CMIF PIR2_bits.CMIF
695 #endif /* NO_BIT_DEFINES */
697 // ----- PORTA bits --------------------
710 extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits;
712 #ifndef NO_BIT_DEFINES
713 #define RA0 PORTA_bits.RA0
714 #define RA1 PORTA_bits.RA1
715 #define RA2 PORTA_bits.RA2
716 #define RA3 PORTA_bits.RA3
717 #define RA4 PORTA_bits.RA4
718 #define RA5 PORTA_bits.RA5
719 #endif /* NO_BIT_DEFINES */
721 // ----- PORTB bits --------------------
734 extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits;
736 #ifndef NO_BIT_DEFINES
737 #define RB0 PORTB_bits.RB0
738 #define RB1 PORTB_bits.RB1
739 #define RB2 PORTB_bits.RB2
740 #define RB3 PORTB_bits.RB3
741 #define RB4 PORTB_bits.RB4
742 #define RB5 PORTB_bits.RB5
743 #define RB6 PORTB_bits.RB6
744 #define RB7 PORTB_bits.RB7
745 #endif /* NO_BIT_DEFINES */
747 // ----- PORTC bits --------------------
760 extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits;
762 #ifndef NO_BIT_DEFINES
763 #define RC0 PORTC_bits.RC0
764 #define RC1 PORTC_bits.RC1
765 #define RC2 PORTC_bits.RC2
766 #define RC3 PORTC_bits.RC3
767 #define RC4 PORTC_bits.RC4
768 #define RC5 PORTC_bits.RC5
769 #define RC6 PORTC_bits.RC6
770 #define RC7 PORTC_bits.RC7
771 #endif /* NO_BIT_DEFINES */
773 // ----- PORTD bits --------------------
786 extern volatile __PORTD_bits_t __at(PORTD_ADDR) PORTD_bits;
788 #ifndef NO_BIT_DEFINES
789 #define RD0 PORTD_bits.RD0
790 #define RD1 PORTD_bits.RD1
791 #define RD2 PORTD_bits.RD2
792 #define RD3 PORTD_bits.RD3
793 #define RD4 PORTD_bits.RD4
794 #define RD5 PORTD_bits.RD5
795 #define RD6 PORTD_bits.RD6
796 #define RD7 PORTD_bits.RD7
797 #endif /* NO_BIT_DEFINES */
799 // ----- PORTE bits --------------------
812 extern volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits;
814 #ifndef NO_BIT_DEFINES
815 #define RE0 PORTE_bits.RE0
816 #define RE1 PORTE_bits.RE1
817 #define RE2 PORTE_bits.RE2
818 #endif /* NO_BIT_DEFINES */
820 // ----- RCSTA bits --------------------
823 unsigned char RX9D:1;
824 unsigned char OERR:1;
825 unsigned char FERR:1;
826 unsigned char ADDEN:1;
827 unsigned char CREN:1;
828 unsigned char SREN:1;
830 unsigned char SPEN:1;
833 unsigned char RCD8:1;
849 unsigned char NOT_RC8:1;
859 unsigned char RC8_9:1;
863 extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits;
865 #ifndef NO_BIT_DEFINES
866 #define RX9D RCSTA_bits.RX9D
867 #define RCD8 RCSTA_bits.RCD8
868 #define OERR RCSTA_bits.OERR
869 #define FERR RCSTA_bits.FERR
870 #define ADDEN RCSTA_bits.ADDEN
871 #define CREN RCSTA_bits.CREN
872 #define SREN RCSTA_bits.SREN
873 #define RX9 RCSTA_bits.RX9
874 #define RC9 RCSTA_bits.RC9
875 #define NOT_RC8 RCSTA_bits.NOT_RC8
876 #define RC8_9 RCSTA_bits.RC8_9
877 #define SPEN RCSTA_bits.SPEN
878 #endif /* NO_BIT_DEFINES */
880 // ----- SSPCON bits --------------------
883 unsigned char SSPM0:1;
884 unsigned char SSPM1:1;
885 unsigned char SSPM2:1;
886 unsigned char SSPM3:1;
888 unsigned char SSPEN:1;
889 unsigned char SSPOV:1;
890 unsigned char WCOL:1;
893 extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits;
895 #ifndef NO_BIT_DEFINES
896 #define SSPM0 SSPCON_bits.SSPM0
897 #define SSPM1 SSPCON_bits.SSPM1
898 #define SSPM2 SSPCON_bits.SSPM2
899 #define SSPM3 SSPCON_bits.SSPM3
900 #define CKP SSPCON_bits.CKP
901 #define SSPEN SSPCON_bits.SSPEN
902 #define SSPOV SSPCON_bits.SSPOV
903 #define WCOL SSPCON_bits.WCOL
904 #endif /* NO_BIT_DEFINES */
906 // ----- SSPCON2 bits --------------------
910 unsigned char RSEN:1;
912 unsigned char RCEN:1;
913 unsigned char ACKEN:1;
914 unsigned char ACKDT:1;
915 unsigned char ACKSTAT:1;
916 unsigned char GCEN:1;
919 extern volatile __SSPCON2_bits_t __at(SSPCON2_ADDR) SSPCON2_bits;
921 #ifndef NO_BIT_DEFINES
922 #define SEN SSPCON2_bits.SEN
923 #define RSEN SSPCON2_bits.RSEN
924 #define PEN SSPCON2_bits.PEN
925 #define RCEN SSPCON2_bits.RCEN
926 #define ACKEN SSPCON2_bits.ACKEN
927 #define ACKDT SSPCON2_bits.ACKDT
928 #define ACKSTAT SSPCON2_bits.ACKSTAT
929 #define GCEN SSPCON2_bits.GCEN
930 #endif /* NO_BIT_DEFINES */
932 // ----- SSPSTAT bits --------------------
947 unsigned char I2C_READ:1;
948 unsigned char I2C_START:1;
949 unsigned char I2C_STOP:1;
950 unsigned char I2C_DATA:1;
957 unsigned char NOT_W:1;
960 unsigned char NOT_A:1;
967 unsigned char NOT_WRITE:1;
970 unsigned char NOT_ADDRESS:1;
987 unsigned char READ_WRITE:1;
990 unsigned char DATA_ADDRESS:1;
995 extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits;
997 #ifndef NO_BIT_DEFINES
998 #define BF SSPSTAT_bits.BF
999 #define UA SSPSTAT_bits.UA
1000 #define R SSPSTAT_bits.R
1001 #define I2C_READ SSPSTAT_bits.I2C_READ
1002 #define NOT_W SSPSTAT_bits.NOT_W
1003 #define NOT_WRITE SSPSTAT_bits.NOT_WRITE
1004 #define R_W SSPSTAT_bits.R_W
1005 #define READ_WRITE SSPSTAT_bits.READ_WRITE
1006 #define S SSPSTAT_bits.S
1007 #define I2C_START SSPSTAT_bits.I2C_START
1008 #define P SSPSTAT_bits.P
1009 #define I2C_STOP SSPSTAT_bits.I2C_STOP
1010 #define D SSPSTAT_bits.D
1011 #define I2C_DATA SSPSTAT_bits.I2C_DATA
1012 #define NOT_A SSPSTAT_bits.NOT_A
1013 #define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS
1014 #define D_A SSPSTAT_bits.D_A
1015 #define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS
1016 #define CKE SSPSTAT_bits.CKE
1017 #define SMP SSPSTAT_bits.SMP
1018 #endif /* NO_BIT_DEFINES */
1020 // ----- STATUS bits --------------------
1026 unsigned char NOT_PD:1;
1027 unsigned char NOT_TO:1;
1028 unsigned char RP0:1;
1029 unsigned char RP1:1;
1030 unsigned char IRP:1;
1033 extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits;
1035 #ifndef NO_BIT_DEFINES
1036 #define C STATUS_bits.C
1037 #define DC STATUS_bits.DC
1038 #define Z STATUS_bits.Z
1039 #define NOT_PD STATUS_bits.NOT_PD
1040 #define NOT_TO STATUS_bits.NOT_TO
1041 #define RP0 STATUS_bits.RP0
1042 #define RP1 STATUS_bits.RP1
1043 #define IRP STATUS_bits.IRP
1044 #endif /* NO_BIT_DEFINES */
1046 // ----- T1CON bits --------------------
1049 unsigned char TMR1ON:1;
1050 unsigned char TMR1CS:1;
1051 unsigned char NOT_T1SYNC:1;
1052 unsigned char T1OSCEN:1;
1053 unsigned char T1CKPS0:1;
1054 unsigned char T1CKPS1:1;
1061 unsigned char T1INSYNC:1;
1071 unsigned char T1SYNC:1;
1079 extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits;
1081 #ifndef NO_BIT_DEFINES
1082 #define TMR1ON T1CON_bits.TMR1ON
1083 #define TMR1CS T1CON_bits.TMR1CS
1084 #define NOT_T1SYNC T1CON_bits.NOT_T1SYNC
1085 #define T1INSYNC T1CON_bits.T1INSYNC
1086 #define T1SYNC T1CON_bits.T1SYNC
1087 #define T1OSCEN T1CON_bits.T1OSCEN
1088 #define T1CKPS0 T1CON_bits.T1CKPS0
1089 #define T1CKPS1 T1CON_bits.T1CKPS1
1090 #endif /* NO_BIT_DEFINES */
1092 // ----- T2CON bits --------------------
1095 unsigned char T2CKPS0:1;
1096 unsigned char T2CKPS1:1;
1097 unsigned char TMR2ON:1;
1098 unsigned char TOUTPS0:1;
1099 unsigned char TOUTPS1:1;
1100 unsigned char TOUTPS2:1;
1101 unsigned char TOUTPS3:1;
1105 extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits;
1107 #ifndef NO_BIT_DEFINES
1108 #define T2CKPS0 T2CON_bits.T2CKPS0
1109 #define T2CKPS1 T2CON_bits.T2CKPS1
1110 #define TMR2ON T2CON_bits.TMR2ON
1111 #define TOUTPS0 T2CON_bits.TOUTPS0
1112 #define TOUTPS1 T2CON_bits.TOUTPS1
1113 #define TOUTPS2 T2CON_bits.TOUTPS2
1114 #define TOUTPS3 T2CON_bits.TOUTPS3
1115 #endif /* NO_BIT_DEFINES */
1117 // ----- TRISA bits --------------------
1120 unsigned char TRISA0:1;
1121 unsigned char TRISA1:1;
1122 unsigned char TRISA2:1;
1123 unsigned char TRISA3:1;
1124 unsigned char TRISA4:1;
1125 unsigned char TRISA5:1;
1130 extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits;
1132 #ifndef NO_BIT_DEFINES
1133 #define TRISA0 TRISA_bits.TRISA0
1134 #define TRISA1 TRISA_bits.TRISA1
1135 #define TRISA2 TRISA_bits.TRISA2
1136 #define TRISA3 TRISA_bits.TRISA3
1137 #define TRISA4 TRISA_bits.TRISA4
1138 #define TRISA5 TRISA_bits.TRISA5
1139 #endif /* NO_BIT_DEFINES */
1141 // ----- TRISB bits --------------------
1144 unsigned char TRISB0:1;
1145 unsigned char TRISB1:1;
1146 unsigned char TRISB2:1;
1147 unsigned char TRISB3:1;
1148 unsigned char TRISB4:1;
1149 unsigned char TRISB5:1;
1150 unsigned char TRISB6:1;
1151 unsigned char TRISB7:1;
1154 extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits;
1156 #ifndef NO_BIT_DEFINES
1157 #define TRISB0 TRISB_bits.TRISB0
1158 #define TRISB1 TRISB_bits.TRISB1
1159 #define TRISB2 TRISB_bits.TRISB2
1160 #define TRISB3 TRISB_bits.TRISB3
1161 #define TRISB4 TRISB_bits.TRISB4
1162 #define TRISB5 TRISB_bits.TRISB5
1163 #define TRISB6 TRISB_bits.TRISB6
1164 #define TRISB7 TRISB_bits.TRISB7
1165 #endif /* NO_BIT_DEFINES */
1167 // ----- TRISC bits --------------------
1170 unsigned char TRISC0:1;
1171 unsigned char TRISC1:1;
1172 unsigned char TRISC2:1;
1173 unsigned char TRISC3:1;
1174 unsigned char TRISC4:1;
1175 unsigned char TRISC5:1;
1176 unsigned char TRISC6:1;
1177 unsigned char TRISC7:1;
1180 extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits;
1182 #ifndef NO_BIT_DEFINES
1183 #define TRISC0 TRISC_bits.TRISC0
1184 #define TRISC1 TRISC_bits.TRISC1
1185 #define TRISC2 TRISC_bits.TRISC2
1186 #define TRISC3 TRISC_bits.TRISC3
1187 #define TRISC4 TRISC_bits.TRISC4
1188 #define TRISC5 TRISC_bits.TRISC5
1189 #define TRISC6 TRISC_bits.TRISC6
1190 #define TRISC7 TRISC_bits.TRISC7
1191 #endif /* NO_BIT_DEFINES */
1193 // ----- TRISD bits --------------------
1196 unsigned char TRISD0:1;
1197 unsigned char TRISD1:1;
1198 unsigned char TRISD2:1;
1199 unsigned char TRISD3:1;
1200 unsigned char TRISD4:1;
1201 unsigned char TRISD5:1;
1202 unsigned char TRISD6:1;
1203 unsigned char TRISD7:1;
1206 extern volatile __TRISD_bits_t __at(TRISD_ADDR) TRISD_bits;
1208 #ifndef NO_BIT_DEFINES
1209 #define TRISD0 TRISD_bits.TRISD0
1210 #define TRISD1 TRISD_bits.TRISD1
1211 #define TRISD2 TRISD_bits.TRISD2
1212 #define TRISD3 TRISD_bits.TRISD3
1213 #define TRISD4 TRISD_bits.TRISD4
1214 #define TRISD5 TRISD_bits.TRISD5
1215 #define TRISD6 TRISD_bits.TRISD6
1216 #define TRISD7 TRISD_bits.TRISD7
1217 #endif /* NO_BIT_DEFINES */
1219 // ----- TRISE bits --------------------
1222 unsigned char TRISE0:1;
1223 unsigned char TRISE1:1;
1224 unsigned char TRISE2:1;
1226 unsigned char PSPMODE:1;
1227 unsigned char IBOV:1;
1228 unsigned char OBF:1;
1229 unsigned char IBF:1;
1232 extern volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits;
1234 #ifndef NO_BIT_DEFINES
1235 #define TRISE0 TRISE_bits.TRISE0
1236 #define TRISE1 TRISE_bits.TRISE1
1237 #define TRISE2 TRISE_bits.TRISE2
1238 #define PSPMODE TRISE_bits.PSPMODE
1239 #define IBOV TRISE_bits.IBOV
1240 #define OBF TRISE_bits.OBF
1241 #define IBF TRISE_bits.IBF
1242 #endif /* NO_BIT_DEFINES */
1244 // ----- TXSTA bits --------------------
1247 unsigned char TX9D:1;
1248 unsigned char TRMT:1;
1249 unsigned char BRGH:1;
1251 unsigned char SYNC:1;
1252 unsigned char TXEN:1;
1253 unsigned char TX9:1;
1254 unsigned char CSRC:1;
1257 unsigned char TXD8:1;
1263 unsigned char NOT_TX8:1;
1273 unsigned char TX8_9:1;
1277 extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits;
1279 #ifndef NO_BIT_DEFINES
1280 #define TX9D TXSTA_bits.TX9D
1281 #define TXD8 TXSTA_bits.TXD8
1282 #define TRMT TXSTA_bits.TRMT
1283 #define BRGH TXSTA_bits.BRGH
1284 #define SYNC TXSTA_bits.SYNC
1285 #define TXEN TXSTA_bits.TXEN
1286 #define TX9 TXSTA_bits.TX9
1287 #define NOT_TX8 TXSTA_bits.NOT_TX8
1288 #define TX8_9 TXSTA_bits.TX8_9
1289 #define CSRC TXSTA_bits.CSRC
1290 #endif /* NO_BIT_DEFINES */