2 // Register Declarations for Microchip 16F874 Processor
5 // This header file was automatically generated by:
9 // Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved
11 // SDCC is licensed under the GNU Public license (GPL) v2. Note that
12 // this license covers the code to the compiler and other executables,
13 // but explicitly does not cover any code or objects generated by sdcc.
14 // We have not yet decided on a license for the run time libraries, but
15 // it will not put any requirements on code linked against it. See:
17 // http://www.gnu.org/copyleft/gpl/html
19 // See http://sdcc.sourceforge.net/ for the latest information on sdcc.
26 // Register addresses.
28 #define INDF_ADDR 0x0000
29 #define TMR0_ADDR 0x0001
30 #define PCL_ADDR 0x0002
31 #define STATUS_ADDR 0x0003
32 #define FSR_ADDR 0x0004
33 #define PORTA_ADDR 0x0005
34 #define PORTB_ADDR 0x0006
35 #define PORTC_ADDR 0x0007
36 #define PORTD_ADDR 0x0008
37 #define PORTE_ADDR 0x0009
38 #define PCLATH_ADDR 0x000A
39 #define INTCON_ADDR 0x000B
40 #define PIR1_ADDR 0x000C
41 #define PIR2_ADDR 0x000D
42 #define TMR1L_ADDR 0x000E
43 #define TMR1H_ADDR 0x000F
44 #define T1CON_ADDR 0x0010
45 #define TMR2_ADDR 0x0011
46 #define T2CON_ADDR 0x0012
47 #define SSPBUF_ADDR 0x0013
48 #define SSPCON_ADDR 0x0014
49 #define CCPR1L_ADDR 0x0015
50 #define CCPR1H_ADDR 0x0016
51 #define CCP1CON_ADDR 0x0017
52 #define RCSTA_ADDR 0x0018
53 #define TXREG_ADDR 0x0019
54 #define RCREG_ADDR 0x001A
55 #define CCPR2L_ADDR 0x001B
56 #define CCPR2H_ADDR 0x001C
57 #define CCP2CON_ADDR 0x001D
58 #define ADRESH_ADDR 0x001E
59 #define ADCON0_ADDR 0x001F
60 #define OPTION_REG_ADDR 0x0081
61 #define TRISA_ADDR 0x0085
62 #define TRISB_ADDR 0x0086
63 #define TRISC_ADDR 0x0087
64 #define TRISD_ADDR 0x0088
65 #define TRISE_ADDR 0x0089
66 #define PIE1_ADDR 0x008C
67 #define PIE2_ADDR 0x008D
68 #define PCON_ADDR 0x008E
69 #define SSPCON2_ADDR 0x0091
70 #define PR2_ADDR 0x0092
71 #define SSPADD_ADDR 0x0093
72 #define SSPSTAT_ADDR 0x0094
73 #define TXSTA_ADDR 0x0098
74 #define SPBRG_ADDR 0x0099
75 #define ADRESL_ADDR 0x009E
76 #define ADCON1_ADDR 0x009F
77 #define EEDATA_ADDR 0x010C
78 #define EEADR_ADDR 0x010D
79 #define EEDATH_ADDR 0x010E
80 #define EEADRH_ADDR 0x010F
81 #define EECON1_ADDR 0x018C
82 #define EECON2_ADDR 0x018D
85 // Memory organization.
91 // P16F874.INC Standard Header File, Version 1.00 Microchip Technology, Inc.
94 // This header file defines configurations, registers, and other useful bits of
95 // information for the PIC16F874 microcontroller. These names are taken to match
96 // the data sheets as closely as possible.
98 // Note that the processor must be selected before this file is
99 // included. The processor may be selected the following ways:
101 // 1. Command line switch:
102 // C:\ MPASM MYFILE.ASM /PIC16F874
103 // 2. LIST directive in the source file
105 // 3. Processor Type entry in the MPASM full-screen interface
107 //==========================================================================
111 //==========================================================================
115 //1.12 01/12/00 Changed some bit names, a register name, configuration bits
116 // to match datasheet (DS30292B)
117 //1.11 10/18/98 Changes to file registers to match updated DOS
118 //1.10 08/17/98 Fixed typo in processor name, RCSTA and ADCON1
119 //1.00 08/07/98 Initial Release
121 //==========================================================================
125 //==========================================================================
128 // MESSG "Processor-header file mismatch. Verify selected processor."
131 //==========================================================================
133 // Register Definitions
135 //==========================================================================
140 //----- Register Files------------------------------------------------------
142 extern __sfr __at (INDF_ADDR) INDF;
143 extern __sfr __at (TMR0_ADDR) TMR0;
144 extern __sfr __at (PCL_ADDR) PCL;
145 extern __sfr __at (STATUS_ADDR) STATUS;
146 extern __sfr __at (FSR_ADDR) FSR;
147 extern __sfr __at (PORTA_ADDR) PORTA;
148 extern __sfr __at (PORTB_ADDR) PORTB;
149 extern __sfr __at (PORTC_ADDR) PORTC;
150 extern __sfr __at (PORTD_ADDR) PORTD;
151 extern __sfr __at (PORTE_ADDR) PORTE;
152 extern __sfr __at (PCLATH_ADDR) PCLATH;
153 extern __sfr __at (INTCON_ADDR) INTCON;
154 extern __sfr __at (PIR1_ADDR) PIR1;
155 extern __sfr __at (PIR2_ADDR) PIR2;
156 extern __sfr __at (TMR1L_ADDR) TMR1L;
157 extern __sfr __at (TMR1H_ADDR) TMR1H;
158 extern __sfr __at (T1CON_ADDR) T1CON;
159 extern __sfr __at (TMR2_ADDR) TMR2;
160 extern __sfr __at (T2CON_ADDR) T2CON;
161 extern __sfr __at (SSPBUF_ADDR) SSPBUF;
162 extern __sfr __at (SSPCON_ADDR) SSPCON;
163 extern __sfr __at (CCPR1L_ADDR) CCPR1L;
164 extern __sfr __at (CCPR1H_ADDR) CCPR1H;
165 extern __sfr __at (CCP1CON_ADDR) CCP1CON;
166 extern __sfr __at (RCSTA_ADDR) RCSTA;
167 extern __sfr __at (TXREG_ADDR) TXREG;
168 extern __sfr __at (RCREG_ADDR) RCREG;
169 extern __sfr __at (CCPR2L_ADDR) CCPR2L;
170 extern __sfr __at (CCPR2H_ADDR) CCPR2H;
171 extern __sfr __at (CCP2CON_ADDR) CCP2CON;
172 extern __sfr __at (ADRESH_ADDR) ADRESH;
173 extern __sfr __at (ADCON0_ADDR) ADCON0;
175 extern __sfr __at (OPTION_REG_ADDR) OPTION_REG;
176 extern __sfr __at (TRISA_ADDR) TRISA;
177 extern __sfr __at (TRISB_ADDR) TRISB;
178 extern __sfr __at (TRISC_ADDR) TRISC;
179 extern __sfr __at (TRISD_ADDR) TRISD;
180 extern __sfr __at (TRISE_ADDR) TRISE;
181 extern __sfr __at (PIE1_ADDR) PIE1;
182 extern __sfr __at (PIE2_ADDR) PIE2;
183 extern __sfr __at (PCON_ADDR) PCON;
184 extern __sfr __at (SSPCON2_ADDR) SSPCON2;
185 extern __sfr __at (PR2_ADDR) PR2;
186 extern __sfr __at (SSPADD_ADDR) SSPADD;
187 extern __sfr __at (SSPSTAT_ADDR) SSPSTAT;
188 extern __sfr __at (TXSTA_ADDR) TXSTA;
189 extern __sfr __at (SPBRG_ADDR) SPBRG;
190 extern __sfr __at (ADRESL_ADDR) ADRESL;
191 extern __sfr __at (ADCON1_ADDR) ADCON1;
193 extern __sfr __at (EEDATA_ADDR) EEDATA;
194 extern __sfr __at (EEADR_ADDR) EEADR;
195 extern __sfr __at (EEDATH_ADDR) EEDATH;
196 extern __sfr __at (EEADRH_ADDR) EEADRH;
198 extern __sfr __at (EECON1_ADDR) EECON1;
199 extern __sfr __at (EECON2_ADDR) EECON2;
200 //----- STATUS Bits --------------------------------------------------------
203 //----- INTCON Bits --------------------------------------------------------
206 //----- PIR1 Bits ----------------------------------------------------------
209 //----- PIR2 Bits ----------------------------------------------------------
212 //----- T1CON Bits ---------------------------------------------------------
215 //----- T2CON Bits ---------------------------------------------------------
218 //----- SSPCON Bits --------------------------------------------------------
221 //----- CCP1CON Bits -------------------------------------------------------
224 //----- RCSTA Bits ---------------------------------------------------------
227 //----- CCP2CON Bits -------------------------------------------------------
230 //----- ADCON0 Bits --------------------------------------------------------
233 //----- OPTION_REG Bits --------------------------------------------------------
236 //----- TRISE Bits ---------------------------------------------------------
239 //----- PIE1 Bits ----------------------------------------------------------
242 //----- PIE2 Bits ----------------------------------------------------------
245 //----- PCON Bits ----------------------------------------------------------
248 //----- SSPCON2 Bits --------------------------------------------------------
251 //----- SSPSTAT Bits -------------------------------------------------------
254 //----- TXSTA Bits ---------------------------------------------------------
257 //----- ADCON1 Bits --------------------------------------------------------
260 //----- EECON1 Bits --------------------------------------------------------
263 //==========================================================================
267 //==========================================================================
270 // __BADRAM H'8F'-H'90', H'95'-H'97', H'9A'-H'9D'
271 // __BADRAM H'105', H'107'-H'109', H'110'-H'11F'
272 // __BADRAM H'185', H'187'-H'189', H'18E'-H'19F'
274 //==========================================================================
276 // Configuration Bits
278 //==========================================================================
280 #define _CP_ALL 0x0FCF
281 #define _CP_HALF 0x1FDF
282 #define _CP_UPPER_256 0x2FEF
283 #define _CP_OFF 0x3FFF
284 #define _DEBUG_ON 0x37FF
285 #define _DEBUG_OFF 0x3FFF
286 #define _WRT_ENABLE_ON 0x3FFF
287 #define _WRT_ENABLE_OFF 0x3DFF
288 #define _CPD_ON 0x3EFF
289 #define _CPD_OFF 0x3FFF
290 #define _LVP_ON 0x3FFF
291 #define _LVP_OFF 0x3F7F
292 #define _BODEN_ON 0x3FFF
293 #define _BODEN_OFF 0x3FBF
294 #define _PWRTE_OFF 0x3FFF
295 #define _PWRTE_ON 0x3FF7
296 #define _WDT_ON 0x3FFF
297 #define _WDT_OFF 0x3FFB
298 #define _LP_OSC 0x3FFC
299 #define _XT_OSC 0x3FFD
300 #define _HS_OSC 0x3FFE
301 #define _RC_OSC 0x3FFF
305 // ----- ADCON0 bits --------------------
308 unsigned char ADON:1;
311 unsigned char CHS0:1;
312 unsigned char CHS1:1;
313 unsigned char CHS2:1;
314 unsigned char ADCS0:1;
315 unsigned char ADCS1:1;
320 unsigned char NOT_DONE:1;
330 unsigned char GO_DONE:1;
338 extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits;
340 #ifndef NO_BIT_DEFINES
341 #define ADON ADCON0_bits.ADON
342 #define GO ADCON0_bits.GO
343 #define NOT_DONE ADCON0_bits.NOT_DONE
344 #define GO_DONE ADCON0_bits.GO_DONE
345 #define CHS0 ADCON0_bits.CHS0
346 #define CHS1 ADCON0_bits.CHS1
347 #define CHS2 ADCON0_bits.CHS2
348 #define ADCS0 ADCON0_bits.ADCS0
349 #define ADCS1 ADCON0_bits.ADCS1
350 #endif /* NO_BIT_DEFINES */
352 // ----- ADCON1 bits --------------------
355 unsigned char PCFG0:1;
356 unsigned char PCFG1:1;
357 unsigned char PCFG2:1;
358 unsigned char PCFG3:1;
362 unsigned char ADFM:1;
365 extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits;
367 #ifndef NO_BIT_DEFINES
368 #define PCFG0 ADCON1_bits.PCFG0
369 #define PCFG1 ADCON1_bits.PCFG1
370 #define PCFG2 ADCON1_bits.PCFG2
371 #define PCFG3 ADCON1_bits.PCFG3
372 #define ADFM ADCON1_bits.ADFM
373 #endif /* NO_BIT_DEFINES */
375 // ----- CCP1CON bits --------------------
378 unsigned char CCP1M0:1;
379 unsigned char CCP1M1:1;
380 unsigned char CCP1M2:1;
381 unsigned char CCP1M3:1;
382 unsigned char CCP1Y:1;
383 unsigned char CCP1X:1;
388 extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits;
390 #ifndef NO_BIT_DEFINES
391 #define CCP1M0 CCP1CON_bits.CCP1M0
392 #define CCP1M1 CCP1CON_bits.CCP1M1
393 #define CCP1M2 CCP1CON_bits.CCP1M2
394 #define CCP1M3 CCP1CON_bits.CCP1M3
395 #define CCP1Y CCP1CON_bits.CCP1Y
396 #define CCP1X CCP1CON_bits.CCP1X
397 #endif /* NO_BIT_DEFINES */
399 // ----- CCP2CON bits --------------------
402 unsigned char CCP2M0:1;
403 unsigned char CCP2M1:1;
404 unsigned char CCP2M2:1;
405 unsigned char CCP2M3:1;
406 unsigned char CCP2Y:1;
407 unsigned char CCP2X:1;
412 extern volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits;
414 #ifndef NO_BIT_DEFINES
415 #define CCP2M0 CCP2CON_bits.CCP2M0
416 #define CCP2M1 CCP2CON_bits.CCP2M1
417 #define CCP2M2 CCP2CON_bits.CCP2M2
418 #define CCP2M3 CCP2CON_bits.CCP2M3
419 #define CCP2Y CCP2CON_bits.CCP2Y
420 #define CCP2X CCP2CON_bits.CCP2X
421 #endif /* NO_BIT_DEFINES */
423 // ----- EECON1 bits --------------------
428 unsigned char WREN:1;
429 unsigned char WRERR:1;
433 unsigned char EEPGD:1;
436 extern volatile __EECON1_bits_t __at(EECON1_ADDR) EECON1_bits;
438 #ifndef NO_BIT_DEFINES
439 #define RD EECON1_bits.RD
440 #define WR EECON1_bits.WR
441 #define WREN EECON1_bits.WREN
442 #define WRERR EECON1_bits.WRERR
443 #define EEPGD EECON1_bits.EEPGD
444 #endif /* NO_BIT_DEFINES */
446 // ----- INTCON bits --------------------
449 unsigned char RBIF:1;
450 unsigned char INTF:1;
451 unsigned char T0IF:1;
452 unsigned char RBIE:1;
453 unsigned char INTE:1;
454 unsigned char T0IE:1;
455 unsigned char PEIE:1;
459 extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits;
461 #ifndef NO_BIT_DEFINES
462 #define RBIF INTCON_bits.RBIF
463 #define INTF INTCON_bits.INTF
464 #define T0IF INTCON_bits.T0IF
465 #define RBIE INTCON_bits.RBIE
466 #define INTE INTCON_bits.INTE
467 #define T0IE INTCON_bits.T0IE
468 #define PEIE INTCON_bits.PEIE
469 #define GIE INTCON_bits.GIE
470 #endif /* NO_BIT_DEFINES */
472 // ----- OPTION_REG bits --------------------
479 unsigned char T0SE:1;
480 unsigned char T0CS:1;
481 unsigned char INTEDG:1;
482 unsigned char NOT_RBPU:1;
484 } __OPTION_REG_bits_t;
485 extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits;
487 #ifndef NO_BIT_DEFINES
488 #define PS0 OPTION_REG_bits.PS0
489 #define PS1 OPTION_REG_bits.PS1
490 #define PS2 OPTION_REG_bits.PS2
491 #define PSA OPTION_REG_bits.PSA
492 #define T0SE OPTION_REG_bits.T0SE
493 #define T0CS OPTION_REG_bits.T0CS
494 #define INTEDG OPTION_REG_bits.INTEDG
495 #define NOT_RBPU OPTION_REG_bits.NOT_RBPU
496 #endif /* NO_BIT_DEFINES */
498 // ----- PCON bits --------------------
501 unsigned char NOT_BO:1;
502 unsigned char NOT_POR:1;
511 unsigned char NOT_BOR:1;
521 extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits;
523 #ifndef NO_BIT_DEFINES
524 #define NOT_BO PCON_bits.NOT_BO
525 #define NOT_BOR PCON_bits.NOT_BOR
526 #define NOT_POR PCON_bits.NOT_POR
527 #endif /* NO_BIT_DEFINES */
529 // ----- PIE1 bits --------------------
532 unsigned char TMR1IE:1;
533 unsigned char TMR2IE:1;
534 unsigned char CCP1IE:1;
535 unsigned char SSPIE:1;
536 unsigned char TXIE:1;
537 unsigned char RCIE:1;
538 unsigned char ADIE:1;
539 unsigned char PSPIE:1;
542 extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits;
544 #ifndef NO_BIT_DEFINES
545 #define TMR1IE PIE1_bits.TMR1IE
546 #define TMR2IE PIE1_bits.TMR2IE
547 #define CCP1IE PIE1_bits.CCP1IE
548 #define SSPIE PIE1_bits.SSPIE
549 #define TXIE PIE1_bits.TXIE
550 #define RCIE PIE1_bits.RCIE
551 #define ADIE PIE1_bits.ADIE
552 #define PSPIE PIE1_bits.PSPIE
553 #endif /* NO_BIT_DEFINES */
555 // ----- PIE2 bits --------------------
558 unsigned char CCP2IE:1;
561 unsigned char BCLIE:1;
562 unsigned char EEIE:1;
568 extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits;
570 #ifndef NO_BIT_DEFINES
571 #define CCP2IE PIE2_bits.CCP2IE
572 #define BCLIE PIE2_bits.BCLIE
573 #define EEIE PIE2_bits.EEIE
574 #endif /* NO_BIT_DEFINES */
576 // ----- PIR1 bits --------------------
579 unsigned char TMR1IF:1;
580 unsigned char TMR2IF:1;
581 unsigned char CCP1IF:1;
582 unsigned char SSPIF:1;
583 unsigned char TXIF:1;
584 unsigned char RCIF:1;
585 unsigned char ADIF:1;
586 unsigned char PSPIF:1;
589 extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits;
591 #ifndef NO_BIT_DEFINES
592 #define TMR1IF PIR1_bits.TMR1IF
593 #define TMR2IF PIR1_bits.TMR2IF
594 #define CCP1IF PIR1_bits.CCP1IF
595 #define SSPIF PIR1_bits.SSPIF
596 #define TXIF PIR1_bits.TXIF
597 #define RCIF PIR1_bits.RCIF
598 #define ADIF PIR1_bits.ADIF
599 #define PSPIF PIR1_bits.PSPIF
600 #endif /* NO_BIT_DEFINES */
602 // ----- PIR2 bits --------------------
605 unsigned char CCP2IF:1;
608 unsigned char BCLIF:1;
609 unsigned char EEIF:1;
615 extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits;
617 #ifndef NO_BIT_DEFINES
618 #define CCP2IF PIR2_bits.CCP2IF
619 #define BCLIF PIR2_bits.BCLIF
620 #define EEIF PIR2_bits.EEIF
621 #endif /* NO_BIT_DEFINES */
623 // ----- PORTA bits --------------------
636 extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits;
638 #ifndef NO_BIT_DEFINES
639 #define RA0 PORTA_bits.RA0
640 #define RA1 PORTA_bits.RA1
641 #define RA2 PORTA_bits.RA2
642 #define RA3 PORTA_bits.RA3
643 #define RA4 PORTA_bits.RA4
644 #define RA5 PORTA_bits.RA5
645 #endif /* NO_BIT_DEFINES */
647 // ----- PORTB bits --------------------
660 extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits;
662 #ifndef NO_BIT_DEFINES
663 #define RB0 PORTB_bits.RB0
664 #define RB1 PORTB_bits.RB1
665 #define RB2 PORTB_bits.RB2
666 #define RB3 PORTB_bits.RB3
667 #define RB4 PORTB_bits.RB4
668 #define RB5 PORTB_bits.RB5
669 #define RB6 PORTB_bits.RB6
670 #define RB7 PORTB_bits.RB7
671 #endif /* NO_BIT_DEFINES */
673 // ----- PORTC bits --------------------
686 extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits;
688 #ifndef NO_BIT_DEFINES
689 #define RC0 PORTC_bits.RC0
690 #define RC1 PORTC_bits.RC1
691 #define RC2 PORTC_bits.RC2
692 #define RC3 PORTC_bits.RC3
693 #define RC4 PORTC_bits.RC4
694 #define RC5 PORTC_bits.RC5
695 #define RC6 PORTC_bits.RC6
696 #define RC7 PORTC_bits.RC7
697 #endif /* NO_BIT_DEFINES */
699 // ----- PORTD bits --------------------
712 extern volatile __PORTD_bits_t __at(PORTD_ADDR) PORTD_bits;
714 #ifndef NO_BIT_DEFINES
715 #define RD0 PORTD_bits.RD0
716 #define RD1 PORTD_bits.RD1
717 #define RD2 PORTD_bits.RD2
718 #define RD3 PORTD_bits.RD3
719 #define RD4 PORTD_bits.RD4
720 #define RD5 PORTD_bits.RD5
721 #define RD6 PORTD_bits.RD6
722 #define RD7 PORTD_bits.RD7
723 #endif /* NO_BIT_DEFINES */
725 // ----- PORTE bits --------------------
738 extern volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits;
740 #ifndef NO_BIT_DEFINES
741 #define RE0 PORTE_bits.RE0
742 #define RE1 PORTE_bits.RE1
743 #define RE2 PORTE_bits.RE2
744 #endif /* NO_BIT_DEFINES */
746 // ----- RCSTA bits --------------------
749 unsigned char RX9D:1;
750 unsigned char OERR:1;
751 unsigned char FERR:1;
752 unsigned char ADDEN:1;
753 unsigned char CREN:1;
754 unsigned char SREN:1;
756 unsigned char SPEN:1;
759 unsigned char RCD8:1;
775 unsigned char NOT_RC8:1;
785 unsigned char RC8_9:1;
789 extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits;
791 #ifndef NO_BIT_DEFINES
792 #define RX9D RCSTA_bits.RX9D
793 #define RCD8 RCSTA_bits.RCD8
794 #define OERR RCSTA_bits.OERR
795 #define FERR RCSTA_bits.FERR
796 #define ADDEN RCSTA_bits.ADDEN
797 #define CREN RCSTA_bits.CREN
798 #define SREN RCSTA_bits.SREN
799 #define RX9 RCSTA_bits.RX9
800 #define RC9 RCSTA_bits.RC9
801 #define NOT_RC8 RCSTA_bits.NOT_RC8
802 #define RC8_9 RCSTA_bits.RC8_9
803 #define SPEN RCSTA_bits.SPEN
804 #endif /* NO_BIT_DEFINES */
806 // ----- SSPCON bits --------------------
809 unsigned char SSPM0:1;
810 unsigned char SSPM1:1;
811 unsigned char SSPM2:1;
812 unsigned char SSPM3:1;
814 unsigned char SSPEN:1;
815 unsigned char SSPOV:1;
816 unsigned char WCOL:1;
819 extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits;
821 #ifndef NO_BIT_DEFINES
822 #define SSPM0 SSPCON_bits.SSPM0
823 #define SSPM1 SSPCON_bits.SSPM1
824 #define SSPM2 SSPCON_bits.SSPM2
825 #define SSPM3 SSPCON_bits.SSPM3
826 #define CKP SSPCON_bits.CKP
827 #define SSPEN SSPCON_bits.SSPEN
828 #define SSPOV SSPCON_bits.SSPOV
829 #define WCOL SSPCON_bits.WCOL
830 #endif /* NO_BIT_DEFINES */
832 // ----- SSPCON2 bits --------------------
836 unsigned char RSEN:1;
838 unsigned char RCEN:1;
839 unsigned char ACKEN:1;
840 unsigned char ACKDT:1;
841 unsigned char ACKSTAT:1;
842 unsigned char GCEN:1;
845 extern volatile __SSPCON2_bits_t __at(SSPCON2_ADDR) SSPCON2_bits;
847 #ifndef NO_BIT_DEFINES
848 #define SEN SSPCON2_bits.SEN
849 #define RSEN SSPCON2_bits.RSEN
850 #define PEN SSPCON2_bits.PEN
851 #define RCEN SSPCON2_bits.RCEN
852 #define ACKEN SSPCON2_bits.ACKEN
853 #define ACKDT SSPCON2_bits.ACKDT
854 #define ACKSTAT SSPCON2_bits.ACKSTAT
855 #define GCEN SSPCON2_bits.GCEN
856 #endif /* NO_BIT_DEFINES */
858 // ----- SSPSTAT bits --------------------
873 unsigned char I2C_READ:1;
874 unsigned char I2C_START:1;
875 unsigned char I2C_STOP:1;
876 unsigned char I2C_DATA:1;
883 unsigned char NOT_W:1;
886 unsigned char NOT_A:1;
893 unsigned char NOT_WRITE:1;
896 unsigned char NOT_ADDRESS:1;
913 unsigned char READ_WRITE:1;
916 unsigned char DATA_ADDRESS:1;
921 extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits;
923 #ifndef NO_BIT_DEFINES
924 #define BF SSPSTAT_bits.BF
925 #define UA SSPSTAT_bits.UA
926 #define R SSPSTAT_bits.R
927 #define I2C_READ SSPSTAT_bits.I2C_READ
928 #define NOT_W SSPSTAT_bits.NOT_W
929 #define NOT_WRITE SSPSTAT_bits.NOT_WRITE
930 #define R_W SSPSTAT_bits.R_W
931 #define READ_WRITE SSPSTAT_bits.READ_WRITE
932 #define S SSPSTAT_bits.S
933 #define I2C_START SSPSTAT_bits.I2C_START
934 #define P SSPSTAT_bits.P
935 #define I2C_STOP SSPSTAT_bits.I2C_STOP
936 #define D SSPSTAT_bits.D
937 #define I2C_DATA SSPSTAT_bits.I2C_DATA
938 #define NOT_A SSPSTAT_bits.NOT_A
939 #define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS
940 #define D_A SSPSTAT_bits.D_A
941 #define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS
942 #define CKE SSPSTAT_bits.CKE
943 #define SMP SSPSTAT_bits.SMP
944 #endif /* NO_BIT_DEFINES */
946 // ----- STATUS bits --------------------
952 unsigned char NOT_PD:1;
953 unsigned char NOT_TO:1;
959 extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits;
961 #ifndef NO_BIT_DEFINES
962 #define C STATUS_bits.C
963 #define DC STATUS_bits.DC
964 #define Z STATUS_bits.Z
965 #define NOT_PD STATUS_bits.NOT_PD
966 #define NOT_TO STATUS_bits.NOT_TO
967 #define RP0 STATUS_bits.RP0
968 #define RP1 STATUS_bits.RP1
969 #define IRP STATUS_bits.IRP
970 #endif /* NO_BIT_DEFINES */
972 // ----- T1CON bits --------------------
975 unsigned char TMR1ON:1;
976 unsigned char TMR1CS:1;
977 unsigned char NOT_T1SYNC:1;
978 unsigned char T1OSCEN:1;
979 unsigned char T1CKPS0:1;
980 unsigned char T1CKPS1:1;
987 unsigned char T1INSYNC:1;
997 unsigned char T1SYNC:1;
1005 extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits;
1007 #ifndef NO_BIT_DEFINES
1008 #define TMR1ON T1CON_bits.TMR1ON
1009 #define TMR1CS T1CON_bits.TMR1CS
1010 #define NOT_T1SYNC T1CON_bits.NOT_T1SYNC
1011 #define T1INSYNC T1CON_bits.T1INSYNC
1012 #define T1SYNC T1CON_bits.T1SYNC
1013 #define T1OSCEN T1CON_bits.T1OSCEN
1014 #define T1CKPS0 T1CON_bits.T1CKPS0
1015 #define T1CKPS1 T1CON_bits.T1CKPS1
1016 #endif /* NO_BIT_DEFINES */
1018 // ----- T2CON bits --------------------
1021 unsigned char T2CKPS0:1;
1022 unsigned char T2CKPS1:1;
1023 unsigned char TMR2ON:1;
1024 unsigned char TOUTPS0:1;
1025 unsigned char TOUTPS1:1;
1026 unsigned char TOUTPS2:1;
1027 unsigned char TOUTPS3:1;
1031 extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits;
1033 #ifndef NO_BIT_DEFINES
1034 #define T2CKPS0 T2CON_bits.T2CKPS0
1035 #define T2CKPS1 T2CON_bits.T2CKPS1
1036 #define TMR2ON T2CON_bits.TMR2ON
1037 #define TOUTPS0 T2CON_bits.TOUTPS0
1038 #define TOUTPS1 T2CON_bits.TOUTPS1
1039 #define TOUTPS2 T2CON_bits.TOUTPS2
1040 #define TOUTPS3 T2CON_bits.TOUTPS3
1041 #endif /* NO_BIT_DEFINES */
1043 // ----- TRISA bits --------------------
1046 unsigned char TRISA0:1;
1047 unsigned char TRISA1:1;
1048 unsigned char TRISA2:1;
1049 unsigned char TRISA3:1;
1050 unsigned char TRISA4:1;
1051 unsigned char TRISA5:1;
1056 extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits;
1058 #ifndef NO_BIT_DEFINES
1059 #define TRISA0 TRISA_bits.TRISA0
1060 #define TRISA1 TRISA_bits.TRISA1
1061 #define TRISA2 TRISA_bits.TRISA2
1062 #define TRISA3 TRISA_bits.TRISA3
1063 #define TRISA4 TRISA_bits.TRISA4
1064 #define TRISA5 TRISA_bits.TRISA5
1065 #endif /* NO_BIT_DEFINES */
1067 // ----- TRISB bits --------------------
1070 unsigned char TRISB0:1;
1071 unsigned char TRISB1:1;
1072 unsigned char TRISB2:1;
1073 unsigned char TRISB3:1;
1074 unsigned char TRISB4:1;
1075 unsigned char TRISB5:1;
1076 unsigned char TRISB6:1;
1077 unsigned char TRISB7:1;
1080 extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits;
1082 #ifndef NO_BIT_DEFINES
1083 #define TRISB0 TRISB_bits.TRISB0
1084 #define TRISB1 TRISB_bits.TRISB1
1085 #define TRISB2 TRISB_bits.TRISB2
1086 #define TRISB3 TRISB_bits.TRISB3
1087 #define TRISB4 TRISB_bits.TRISB4
1088 #define TRISB5 TRISB_bits.TRISB5
1089 #define TRISB6 TRISB_bits.TRISB6
1090 #define TRISB7 TRISB_bits.TRISB7
1091 #endif /* NO_BIT_DEFINES */
1093 // ----- TRISC bits --------------------
1096 unsigned char TRISC0:1;
1097 unsigned char TRISC1:1;
1098 unsigned char TRISC2:1;
1099 unsigned char TRISC3:1;
1100 unsigned char TRISC4:1;
1101 unsigned char TRISC5:1;
1102 unsigned char TRISC6:1;
1103 unsigned char TRISC7:1;
1106 extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits;
1108 #ifndef NO_BIT_DEFINES
1109 #define TRISC0 TRISC_bits.TRISC0
1110 #define TRISC1 TRISC_bits.TRISC1
1111 #define TRISC2 TRISC_bits.TRISC2
1112 #define TRISC3 TRISC_bits.TRISC3
1113 #define TRISC4 TRISC_bits.TRISC4
1114 #define TRISC5 TRISC_bits.TRISC5
1115 #define TRISC6 TRISC_bits.TRISC6
1116 #define TRISC7 TRISC_bits.TRISC7
1117 #endif /* NO_BIT_DEFINES */
1119 // ----- TRISD bits --------------------
1122 unsigned char TRISD0:1;
1123 unsigned char TRISD1:1;
1124 unsigned char TRISD2:1;
1125 unsigned char TRISD3:1;
1126 unsigned char TRISD4:1;
1127 unsigned char TRISD5:1;
1128 unsigned char TRISD6:1;
1129 unsigned char TRISD7:1;
1132 extern volatile __TRISD_bits_t __at(TRISD_ADDR) TRISD_bits;
1134 #ifndef NO_BIT_DEFINES
1135 #define TRISD0 TRISD_bits.TRISD0
1136 #define TRISD1 TRISD_bits.TRISD1
1137 #define TRISD2 TRISD_bits.TRISD2
1138 #define TRISD3 TRISD_bits.TRISD3
1139 #define TRISD4 TRISD_bits.TRISD4
1140 #define TRISD5 TRISD_bits.TRISD5
1141 #define TRISD6 TRISD_bits.TRISD6
1142 #define TRISD7 TRISD_bits.TRISD7
1143 #endif /* NO_BIT_DEFINES */
1145 // ----- TRISE bits --------------------
1148 unsigned char TRISE0:1;
1149 unsigned char TRISE1:1;
1150 unsigned char TRISE2:1;
1152 unsigned char PSPMODE:1;
1153 unsigned char IBOV:1;
1154 unsigned char OBF:1;
1155 unsigned char IBF:1;
1158 extern volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits;
1160 #ifndef NO_BIT_DEFINES
1161 #define TRISE0 TRISE_bits.TRISE0
1162 #define TRISE1 TRISE_bits.TRISE1
1163 #define TRISE2 TRISE_bits.TRISE2
1164 #define PSPMODE TRISE_bits.PSPMODE
1165 #define IBOV TRISE_bits.IBOV
1166 #define OBF TRISE_bits.OBF
1167 #define IBF TRISE_bits.IBF
1168 #endif /* NO_BIT_DEFINES */
1170 // ----- TXSTA bits --------------------
1173 unsigned char TX9D:1;
1174 unsigned char TRMT:1;
1175 unsigned char BRGH:1;
1177 unsigned char SYNC:1;
1178 unsigned char TXEN:1;
1179 unsigned char TX9:1;
1180 unsigned char CSRC:1;
1183 unsigned char TXD8:1;
1189 unsigned char NOT_TX8:1;
1199 unsigned char TX8_9:1;
1203 extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits;
1205 #ifndef NO_BIT_DEFINES
1206 #define TX9D TXSTA_bits.TX9D
1207 #define TXD8 TXSTA_bits.TXD8
1208 #define TRMT TXSTA_bits.TRMT
1209 #define BRGH TXSTA_bits.BRGH
1210 #define SYNC TXSTA_bits.SYNC
1211 #define TXEN TXSTA_bits.TXEN
1212 #define TX9 TXSTA_bits.TX9
1213 #define NOT_TX8 TXSTA_bits.NOT_TX8
1214 #define TX8_9 TXSTA_bits.TX8_9
1215 #define CSRC TXSTA_bits.CSRC
1216 #endif /* NO_BIT_DEFINES */