2 // Register Declarations for Microchip 16F77 Processor
5 // This header file was automatically generated by:
9 // Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved
11 // SDCC is licensed under the GNU Public license (GPL) v2. Note that
12 // this license covers the code to the compiler and other executables,
13 // but explicitly does not cover any code or objects generated by sdcc.
14 // We have not yet decided on a license for the run time libraries, but
15 // it will not put any requirements on code linked against it. See:
17 // http://www.gnu.org/copyleft/gpl/html
19 // See http://sdcc.sourceforge.net/ for the latest information on sdcc.
26 // Register addresses.
28 #define INDF_ADDR 0x0000
29 #define TMR0_ADDR 0x0001
30 #define PCL_ADDR 0x0002
31 #define STATUS_ADDR 0x0003
32 #define FSR_ADDR 0x0004
33 #define PORTA_ADDR 0x0005
34 #define PORTB_ADDR 0x0006
35 #define PORTC_ADDR 0x0007
36 #define PORTD_ADDR 0x0008
37 #define PORTE_ADDR 0x0009
38 #define PCLATH_ADDR 0x000A
39 #define INTCON_ADDR 0x000B
40 #define PIR1_ADDR 0x000C
41 #define PIR2_ADDR 0x000D
42 #define TMR1L_ADDR 0x000E
43 #define TMR1H_ADDR 0x000F
44 #define T1CON_ADDR 0x0010
45 #define TMR2_ADDR 0x0011
46 #define T2CON_ADDR 0x0012
47 #define SSPBUF_ADDR 0x0013
48 #define SSPCON_ADDR 0x0014
49 #define CCPR1L_ADDR 0x0015
50 #define CCPR1H_ADDR 0x0016
51 #define CCP1CON_ADDR 0x0017
52 #define RCSTA_ADDR 0x0018
53 #define TXREG_ADDR 0x0019
54 #define RCREG_ADDR 0x001A
55 #define CCPR2L_ADDR 0x001B
56 #define CCPR2H_ADDR 0x001C
57 #define CCP2CON_ADDR 0x001D
58 #define ADRES_ADDR 0x001E
59 #define ADCON0_ADDR 0x001F
60 #define OPTION_REG_ADDR 0x0081
61 #define TRISA_ADDR 0x0085
62 #define TRISB_ADDR 0x0086
63 #define TRISC_ADDR 0x0087
64 #define TRISD_ADDR 0x0088
65 #define TRISE_ADDR 0x0089
66 #define PIE1_ADDR 0x008C
67 #define PIE2_ADDR 0x008D
68 #define PCON_ADDR 0x008E
69 #define PR2_ADDR 0x0092
70 #define SSPADD_ADDR 0x0093
71 #define SSPSTAT_ADDR 0x0094
72 #define TXSTA_ADDR 0x0098
73 #define SPBRG_ADDR 0x0099
74 #define ADCON1_ADDR 0x009F
75 #define PMDATA_ADDR 0x010C
76 #define PMADR_ADDR 0x010D
77 #define PMDATH_ADDR 0x010E
78 #define PMADRH_ADDR 0x010F
79 #define PMCON1_ADDR 0x018C
82 // Memory organization.
88 // P16F77.INC Standard Header File, Version 1.01 Microchip Technology, Inc.
91 // This header file defines configurations, registers, and other useful bits of
92 // information for the PIC16F77 microcontroller. These names are taken to match
93 // the data sheets as closely as possible.
95 // Note that the processor must be selected before this file is
96 // included. The processor may be selected the following ways:
98 // 1. Command line switch:
99 // C:\ MPASM MYFILE.ASM /PIC16F77
100 // 2. LIST directive in the source file
102 // 3. Processor Type entry in the MPASM full-screen interface
104 //==========================================================================
108 //==========================================================================
112 //1.00 00/00/00 Initial Release
114 //==========================================================================
118 //==========================================================================
121 // MESSG "Processor-header file mismatch. Verify selected processor."
124 //==========================================================================
126 // Register Definitions
128 //==========================================================================
133 //----- Register Files------------------------------------------------------
135 extern __data __at (INDF_ADDR) volatile char INDF;
136 extern __sfr __at (TMR0_ADDR) TMR0;
137 extern __data __at (PCL_ADDR) volatile char PCL;
138 extern __sfr __at (STATUS_ADDR) STATUS;
139 extern __sfr __at (FSR_ADDR) FSR;
140 extern __sfr __at (PORTA_ADDR) PORTA;
141 extern __sfr __at (PORTB_ADDR) PORTB;
142 extern __sfr __at (PORTC_ADDR) PORTC;
143 extern __sfr __at (PORTD_ADDR) PORTD;
144 extern __sfr __at (PORTE_ADDR) PORTE;
145 extern __sfr __at (PCLATH_ADDR) PCLATH;
146 extern __sfr __at (INTCON_ADDR) INTCON;
147 extern __sfr __at (PIR1_ADDR) PIR1;
148 extern __sfr __at (PIR2_ADDR) PIR2;
149 extern __sfr __at (TMR1L_ADDR) TMR1L;
150 extern __sfr __at (TMR1H_ADDR) TMR1H;
151 extern __sfr __at (T1CON_ADDR) T1CON;
152 extern __sfr __at (TMR2_ADDR) TMR2;
153 extern __sfr __at (T2CON_ADDR) T2CON;
154 extern __sfr __at (SSPBUF_ADDR) SSPBUF;
155 extern __sfr __at (SSPCON_ADDR) SSPCON;
156 extern __sfr __at (CCPR1L_ADDR) CCPR1L;
157 extern __sfr __at (CCPR1H_ADDR) CCPR1H;
158 extern __sfr __at (CCP1CON_ADDR) CCP1CON;
159 extern __sfr __at (RCSTA_ADDR) RCSTA;
160 extern __sfr __at (TXREG_ADDR) TXREG;
161 extern __sfr __at (RCREG_ADDR) RCREG;
162 extern __sfr __at (CCPR2L_ADDR) CCPR2L;
163 extern __sfr __at (CCPR2H_ADDR) CCPR2H;
164 extern __sfr __at (CCP2CON_ADDR) CCP2CON;
165 extern __sfr __at (ADRES_ADDR) ADRES;
166 extern __sfr __at (ADCON0_ADDR) ADCON0;
168 extern __sfr __at (OPTION_REG_ADDR) OPTION_REG;
169 extern __sfr __at (TRISA_ADDR) TRISA;
170 extern __sfr __at (TRISB_ADDR) TRISB;
171 extern __sfr __at (TRISC_ADDR) TRISC;
172 extern __sfr __at (TRISD_ADDR) TRISD;
173 extern __sfr __at (TRISE_ADDR) TRISE;
174 extern __sfr __at (PIE1_ADDR) PIE1;
175 extern __sfr __at (PIE2_ADDR) PIE2;
176 extern __sfr __at (PCON_ADDR) PCON;
177 extern __sfr __at (PR2_ADDR) PR2;
178 extern __sfr __at (SSPADD_ADDR) SSPADD;
179 extern __sfr __at (SSPSTAT_ADDR) SSPSTAT;
180 extern __sfr __at (TXSTA_ADDR) TXSTA;
181 extern __sfr __at (SPBRG_ADDR) SPBRG;
182 extern __sfr __at (ADCON1_ADDR) ADCON1;
184 extern __sfr __at (PMDATA_ADDR) PMDATA;
185 extern __sfr __at (PMADR_ADDR) PMADR;
186 extern __sfr __at (PMDATH_ADDR) PMDATH;
187 extern __sfr __at (PMADRH_ADDR) PMADRH;
189 extern __sfr __at (PMCON1_ADDR) PMCON1;
191 //----- STATUS Bits --------------------------------------------------------
194 //----- INTCON Bits --------------------------------------------------------
197 //----- PIR1 Bits ----------------------------------------------------------
200 //----- PIR2 Bits ----------------------------------------------------------
203 //----- T1CON Bits ---------------------------------------------------------
206 //----- T2CON Bits ---------------------------------------------------------
209 //----- SSPCON Bits --------------------------------------------------------
212 //----- CCP1CON Bits -------------------------------------------------------
215 //----- RCSTA Bits ---------------------------------------------------------
218 //----- CCP2CON Bits -------------------------------------------------------
221 //----- ADCON0 Bits --------------------------------------------------------
224 //----- OPTION Bits --------------------------------------------------------
227 //----- TRISE Bits ---------------------------------------------------------
230 //----- PIE1 Bits ----------------------------------------------------------
233 //----- PIE2 Bits ----------------------------------------------------------
236 //----- PCON Bits ----------------------------------------------------------
239 //----- SSPSTAT Bits -------------------------------------------------------
242 //----- TXSTA Bits ---------------------------------------------------------
245 //----- ADCON1 Bits --------------------------------------------------------
248 //----- PMCON1 Bits --------------------------------------------------------
250 //==========================================================================
254 //==========================================================================
257 // __BADRAM H'8F'-H'91', H'95'-H'97', H'9A'-H'9E'
258 // __BADRAM H'105', H'107'-H'109'
259 // __BADRAM H'185', H'187'-H'189', H'18D'-H'18F'
261 //==========================================================================
263 // Configuration Bits
265 //==========================================================================
267 #define _BODEN_ON 0x3FFF
268 #define _BODEN_OFF 0x3FBF
269 #define _CP_ALL 0x3FEF
270 #define _CP_OFF 0x3FFF
271 #define _PWRTE_OFF 0x3FFF
272 #define _PWRTE_ON 0x3FF7
273 #define _WDT_ON 0x3FFF
274 #define _WDT_OFF 0x3FFB
275 #define _LP_OSC 0x3FFC
276 #define _XT_OSC 0x3FFD
277 #define _HS_OSC 0x3FFE
278 #define _RC_OSC 0x3FFF
282 // ----- ADCON0 bits --------------------
285 unsigned char ADON:1;
288 unsigned char CHS0:1;
289 unsigned char CHS1:1;
290 unsigned char CHS2:1;
291 unsigned char ADCS0:1;
292 unsigned char ADCS1:1;
297 unsigned char NOT_DONE:1;
307 unsigned char GO_DONE:1;
315 extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits;
317 #define ADON ADCON0_bits.ADON
318 #define GO ADCON0_bits.GO
319 #define NOT_DONE ADCON0_bits.NOT_DONE
320 #define GO_DONE ADCON0_bits.GO_DONE
321 #define CHS0 ADCON0_bits.CHS0
322 #define CHS1 ADCON0_bits.CHS1
323 #define CHS2 ADCON0_bits.CHS2
324 #define ADCS0 ADCON0_bits.ADCS0
325 #define ADCS1 ADCON0_bits.ADCS1
327 // ----- ADCON1 bits --------------------
330 unsigned char PCFG0:1;
331 unsigned char PCFG1:1;
332 unsigned char PCFG2:1;
340 extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits;
342 #define PCFG0 ADCON1_bits.PCFG0
343 #define PCFG1 ADCON1_bits.PCFG1
344 #define PCFG2 ADCON1_bits.PCFG2
346 // ----- CCP1CON bits --------------------
349 unsigned char CCP1M0:1;
350 unsigned char CCP1M1:1;
351 unsigned char CCP1M2:1;
352 unsigned char CCP1M3:1;
353 unsigned char CCP1Y:1;
354 unsigned char CCP1X:1;
359 extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits;
361 #define CCP1M0 CCP1CON_bits.CCP1M0
362 #define CCP1M1 CCP1CON_bits.CCP1M1
363 #define CCP1M2 CCP1CON_bits.CCP1M2
364 #define CCP1M3 CCP1CON_bits.CCP1M3
365 #define CCP1Y CCP1CON_bits.CCP1Y
366 #define CCP1X CCP1CON_bits.CCP1X
368 // ----- CCP2CON bits --------------------
371 unsigned char CCP2M0:1;
372 unsigned char CCP2M1:1;
373 unsigned char CCP2M2:1;
374 unsigned char CCP2M3:1;
375 unsigned char CCP2Y:1;
376 unsigned char CCP2X:1;
381 extern volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits;
383 #define CCP2M0 CCP2CON_bits.CCP2M0
384 #define CCP2M1 CCP2CON_bits.CCP2M1
385 #define CCP2M2 CCP2CON_bits.CCP2M2
386 #define CCP2M3 CCP2CON_bits.CCP2M3
387 #define CCP2Y CCP2CON_bits.CCP2Y
388 #define CCP2X CCP2CON_bits.CCP2X
390 // ----- INTCON bits --------------------
393 unsigned char RBIF:1;
394 unsigned char INTF:1;
395 unsigned char T0IF:1;
396 unsigned char RBIE:1;
397 unsigned char INTE:1;
398 unsigned char T0IE:1;
399 unsigned char PEIE:1;
403 extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits;
405 #define RBIF INTCON_bits.RBIF
406 #define INTF INTCON_bits.INTF
407 #define T0IF INTCON_bits.T0IF
408 #define RBIE INTCON_bits.RBIE
409 #define INTE INTCON_bits.INTE
410 #define T0IE INTCON_bits.T0IE
411 #define PEIE INTCON_bits.PEIE
412 #define GIE INTCON_bits.GIE
414 // ----- OPTION_REG bits --------------------
421 unsigned char T0SE:1;
422 unsigned char T0CS:1;
423 unsigned char INTEDG:1;
424 unsigned char NOT_RBPU:1;
426 } __OPTION_REG_bits_t;
427 extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits;
429 #define PS0 OPTION_REG_bits.PS0
430 #define PS1 OPTION_REG_bits.PS1
431 #define PS2 OPTION_REG_bits.PS2
432 #define PSA OPTION_REG_bits.PSA
433 #define T0SE OPTION_REG_bits.T0SE
434 #define T0CS OPTION_REG_bits.T0CS
435 #define INTEDG OPTION_REG_bits.INTEDG
436 #define NOT_RBPU OPTION_REG_bits.NOT_RBPU
438 // ----- PCON bits --------------------
441 unsigned char NOT_BO:1;
442 unsigned char NOT_POR:1;
451 unsigned char NOT_BOR:1;
461 extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits;
463 #define NOT_BO PCON_bits.NOT_BO
464 #define NOT_BOR PCON_bits.NOT_BOR
465 #define NOT_POR PCON_bits.NOT_POR
467 // ----- PIE1 bits --------------------
470 unsigned char TMR1IE:1;
471 unsigned char TMR2IE:1;
472 unsigned char CCP1IE:1;
473 unsigned char SSPIE:1;
474 unsigned char TXIE:1;
475 unsigned char RCIE:1;
476 unsigned char ADIE:1;
477 unsigned char PSPIE:1;
480 extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits;
482 #define TMR1IE PIE1_bits.TMR1IE
483 #define TMR2IE PIE1_bits.TMR2IE
484 #define CCP1IE PIE1_bits.CCP1IE
485 #define SSPIE PIE1_bits.SSPIE
486 #define TXIE PIE1_bits.TXIE
487 #define RCIE PIE1_bits.RCIE
488 #define ADIE PIE1_bits.ADIE
489 #define PSPIE PIE1_bits.PSPIE
491 // ----- PIE2 bits --------------------
494 unsigned char CCP2IE:1;
504 extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits;
506 #define CCP2IE PIE2_bits.CCP2IE
508 // ----- PIR1 bits --------------------
511 unsigned char TMR1IF:1;
512 unsigned char TMR2IF:1;
513 unsigned char CCP1IF:1;
514 unsigned char SSPIF:1;
515 unsigned char TXIF:1;
516 unsigned char RCIF:1;
517 unsigned char ADIF:1;
518 unsigned char PSPIF:1;
521 extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits;
523 #define TMR1IF PIR1_bits.TMR1IF
524 #define TMR2IF PIR1_bits.TMR2IF
525 #define CCP1IF PIR1_bits.CCP1IF
526 #define SSPIF PIR1_bits.SSPIF
527 #define TXIF PIR1_bits.TXIF
528 #define RCIF PIR1_bits.RCIF
529 #define ADIF PIR1_bits.ADIF
530 #define PSPIF PIR1_bits.PSPIF
532 // ----- PIR2 bits --------------------
535 unsigned char CCP2IF:1;
545 extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits;
547 #define CCP2IF PIR2_bits.CCP2IF
549 // ----- PMCON1 bits --------------------
562 extern volatile __PMCON1_bits_t __at(PMCON1_ADDR) PMCON1_bits;
564 #define RD PMCON1_bits.RD
566 // ----- RCSTA bits --------------------
569 unsigned char RX9D:1;
570 unsigned char OERR:1;
571 unsigned char FERR:1;
573 unsigned char CREN:1;
574 unsigned char SREN:1;
576 unsigned char SPEN:1;
579 unsigned char RCD8:1;
595 unsigned char NOT_RC8:1;
605 unsigned char RC8_9:1;
609 extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits;
611 #define RX9D RCSTA_bits.RX9D
612 #define RCD8 RCSTA_bits.RCD8
613 #define OERR RCSTA_bits.OERR
614 #define FERR RCSTA_bits.FERR
615 #define CREN RCSTA_bits.CREN
616 #define SREN RCSTA_bits.SREN
617 #define RX9 RCSTA_bits.RX9
618 #define RC9 RCSTA_bits.RC9
619 #define NOT_RC8 RCSTA_bits.NOT_RC8
620 #define RC8_9 RCSTA_bits.RC8_9
621 #define SPEN RCSTA_bits.SPEN
623 // ----- SSPCON bits --------------------
626 unsigned char SSPM0:1;
627 unsigned char SSPM1:1;
628 unsigned char SSPM2:1;
629 unsigned char SSPM3:1;
631 unsigned char SSPEN:1;
632 unsigned char SSPOV:1;
633 unsigned char WCOL:1;
636 extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits;
638 #define SSPM0 SSPCON_bits.SSPM0
639 #define SSPM1 SSPCON_bits.SSPM1
640 #define SSPM2 SSPCON_bits.SSPM2
641 #define SSPM3 SSPCON_bits.SSPM3
642 #define CKP SSPCON_bits.CKP
643 #define SSPEN SSPCON_bits.SSPEN
644 #define SSPOV SSPCON_bits.SSPOV
645 #define WCOL SSPCON_bits.WCOL
647 // ----- SSPSTAT bits --------------------
662 unsigned char I2C_READ:1;
663 unsigned char I2C_START:1;
664 unsigned char I2C_STOP:1;
665 unsigned char I2C_DATA:1;
672 unsigned char NOT_W:1;
675 unsigned char NOT_A:1;
682 unsigned char NOT_WRITE:1;
685 unsigned char NOT_ADDRESS:1;
702 unsigned char READ_WRITE:1;
705 unsigned char DATA_ADDRESS:1;
710 extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits;
712 #define BF SSPSTAT_bits.BF
713 #define UA SSPSTAT_bits.UA
714 #define R SSPSTAT_bits.R
715 #define I2C_READ SSPSTAT_bits.I2C_READ
716 #define NOT_W SSPSTAT_bits.NOT_W
717 #define NOT_WRITE SSPSTAT_bits.NOT_WRITE
718 #define R_W SSPSTAT_bits.R_W
719 #define READ_WRITE SSPSTAT_bits.READ_WRITE
720 #define S SSPSTAT_bits.S
721 #define I2C_START SSPSTAT_bits.I2C_START
722 #define P SSPSTAT_bits.P
723 #define I2C_STOP SSPSTAT_bits.I2C_STOP
724 #define D SSPSTAT_bits.D
725 #define I2C_DATA SSPSTAT_bits.I2C_DATA
726 #define NOT_A SSPSTAT_bits.NOT_A
727 #define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS
728 #define D_A SSPSTAT_bits.D_A
729 #define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS
730 #define CKE SSPSTAT_bits.CKE
731 #define SMP SSPSTAT_bits.SMP
733 // ----- STATUS bits --------------------
739 unsigned char NOT_PD:1;
740 unsigned char NOT_TO:1;
746 extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits;
748 #define C STATUS_bits.C
749 #define DC STATUS_bits.DC
750 #define Z STATUS_bits.Z
751 #define NOT_PD STATUS_bits.NOT_PD
752 #define NOT_TO STATUS_bits.NOT_TO
753 #define RP0 STATUS_bits.RP0
754 #define RP1 STATUS_bits.RP1
755 #define IRP STATUS_bits.IRP
757 // ----- T1CON bits --------------------
760 unsigned char TMR1ON:1;
761 unsigned char TMR1CS:1;
762 unsigned char NOT_T1SYNC:1;
763 unsigned char T1OSCEN:1;
764 unsigned char T1CKPS0:1;
765 unsigned char T1CKPS1:1;
772 unsigned char T1INSYNC:1;
780 extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits;
782 #define TMR1ON T1CON_bits.TMR1ON
783 #define TMR1CS T1CON_bits.TMR1CS
784 #define NOT_T1SYNC T1CON_bits.NOT_T1SYNC
785 #define T1INSYNC T1CON_bits.T1INSYNC
786 #define T1OSCEN T1CON_bits.T1OSCEN
787 #define T1CKPS0 T1CON_bits.T1CKPS0
788 #define T1CKPS1 T1CON_bits.T1CKPS1
790 // ----- T2CON bits --------------------
793 unsigned char T2CKPS0:1;
794 unsigned char T2CKPS1:1;
795 unsigned char TMR2ON:1;
796 unsigned char TOUTPS0:1;
797 unsigned char TOUTPS1:1;
798 unsigned char TOUTPS2:1;
799 unsigned char TOUTPS3:1;
803 extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits;
805 #define T2CKPS0 T2CON_bits.T2CKPS0
806 #define T2CKPS1 T2CON_bits.T2CKPS1
807 #define TMR2ON T2CON_bits.TMR2ON
808 #define TOUTPS0 T2CON_bits.TOUTPS0
809 #define TOUTPS1 T2CON_bits.TOUTPS1
810 #define TOUTPS2 T2CON_bits.TOUTPS2
811 #define TOUTPS3 T2CON_bits.TOUTPS3
813 // ----- TRISE bits --------------------
816 unsigned char TRISE0:1;
817 unsigned char TRISE1:1;
818 unsigned char TRISE2:1;
820 unsigned char PSPMODE:1;
821 unsigned char IBOV:1;
826 extern volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits;
828 #define TRISE0 TRISE_bits.TRISE0
829 #define TRISE1 TRISE_bits.TRISE1
830 #define TRISE2 TRISE_bits.TRISE2
831 #define PSPMODE TRISE_bits.PSPMODE
832 #define IBOV TRISE_bits.IBOV
833 #define OBF TRISE_bits.OBF
834 #define IBF TRISE_bits.IBF
836 // ----- TXSTA bits --------------------
839 unsigned char TX9D:1;
840 unsigned char TRMT:1;
841 unsigned char BRGH:1;
843 unsigned char SYNC:1;
844 unsigned char TXEN:1;
846 unsigned char CSRC:1;
849 unsigned char TXD8:1;
855 unsigned char NOT_TX8:1;
865 unsigned char TX8_9:1;
869 extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits;
871 #define TX9D TXSTA_bits.TX9D
872 #define TXD8 TXSTA_bits.TXD8
873 #define TRMT TXSTA_bits.TRMT
874 #define BRGH TXSTA_bits.BRGH
875 #define SYNC TXSTA_bits.SYNC
876 #define TXEN TXSTA_bits.TXEN
877 #define TX9 TXSTA_bits.TX9
878 #define NOT_TX8 TXSTA_bits.NOT_TX8
879 #define TX8_9 TXSTA_bits.TX8_9
880 #define CSRC TXSTA_bits.CSRC