2 // Register Declarations for Microchip 16F77 Processor
5 // This header file was automatically generated by:
9 // Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved
11 // SDCC is licensed under the GNU Public license (GPL) v2. Note that
12 // this license covers the code to the compiler and other executables,
13 // but explicitly does not cover any code or objects generated by sdcc.
14 // We have not yet decided on a license for the run time libraries, but
15 // it will not put any requirements on code linked against it. See:
17 // http://www.gnu.org/copyleft/gpl/html
19 // See http://sdcc.sourceforge.net/ for the latest information on sdcc.
26 // Register addresses.
28 #define INDF_ADDR 0x0000
29 #define TMR0_ADDR 0x0001
30 #define PCL_ADDR 0x0002
31 #define STATUS_ADDR 0x0003
32 #define FSR_ADDR 0x0004
33 #define PORTA_ADDR 0x0005
34 #define PORTB_ADDR 0x0006
35 #define PORTC_ADDR 0x0007
36 #define PORTD_ADDR 0x0008
37 #define PORTE_ADDR 0x0009
38 #define PCLATH_ADDR 0x000A
39 #define INTCON_ADDR 0x000B
40 #define PIR1_ADDR 0x000C
41 #define PIR2_ADDR 0x000D
42 #define TMR1L_ADDR 0x000E
43 #define TMR1H_ADDR 0x000F
44 #define T1CON_ADDR 0x0010
45 #define TMR2_ADDR 0x0011
46 #define T2CON_ADDR 0x0012
47 #define SSPBUF_ADDR 0x0013
48 #define SSPCON_ADDR 0x0014
49 #define CCPR1L_ADDR 0x0015
50 #define CCPR1H_ADDR 0x0016
51 #define CCP1CON_ADDR 0x0017
52 #define RCSTA_ADDR 0x0018
53 #define TXREG_ADDR 0x0019
54 #define RCREG_ADDR 0x001A
55 #define CCPR2L_ADDR 0x001B
56 #define CCPR2H_ADDR 0x001C
57 #define CCP2CON_ADDR 0x001D
58 #define ADRES_ADDR 0x001E
59 #define ADCON0_ADDR 0x001F
60 #define OPTION_REG_ADDR 0x0081
61 #define TRISA_ADDR 0x0085
62 #define TRISB_ADDR 0x0086
63 #define TRISC_ADDR 0x0087
64 #define TRISD_ADDR 0x0088
65 #define TRISE_ADDR 0x0089
66 #define PIE1_ADDR 0x008C
67 #define PIE2_ADDR 0x008D
68 #define PCON_ADDR 0x008E
69 #define PR2_ADDR 0x0092
70 #define SSPADD_ADDR 0x0093
71 #define SSPSTAT_ADDR 0x0094
72 #define TXSTA_ADDR 0x0098
73 #define SPBRG_ADDR 0x0099
74 #define ADCON1_ADDR 0x009F
75 #define PMDATA_ADDR 0x010C
76 #define PMADR_ADDR 0x010D
77 #define PMDATH_ADDR 0x010E
78 #define PMADRH_ADDR 0x010F
79 #define PMCON1_ADDR 0x018C
82 // Memory organization.
88 // P16F77.INC Standard Header File, Version 1.01 Microchip Technology, Inc.
91 // This header file defines configurations, registers, and other useful bits of
92 // information for the PIC16F77 microcontroller. These names are taken to match
93 // the data sheets as closely as possible.
95 // Note that the processor must be selected before this file is
96 // included. The processor may be selected the following ways:
98 // 1. Command line switch:
99 // C:\ MPASM MYFILE.ASM /PIC16F77
100 // 2. LIST directive in the source file
102 // 3. Processor Type entry in the MPASM full-screen interface
104 //==========================================================================
108 //==========================================================================
112 //1.00 00/00/00 Initial Release
114 //==========================================================================
118 //==========================================================================
121 // MESSG "Processor-header file mismatch. Verify selected processor."
124 //==========================================================================
126 // Register Definitions
128 //==========================================================================
133 //----- Register Files------------------------------------------------------
135 extern __sfr __at (INDF_ADDR) INDF;
136 extern __sfr __at (TMR0_ADDR) TMR0;
137 extern __sfr __at (PCL_ADDR) PCL;
138 extern __sfr __at (STATUS_ADDR) STATUS;
139 extern __sfr __at (FSR_ADDR) FSR;
140 extern __sfr __at (PORTA_ADDR) PORTA;
141 extern __sfr __at (PORTB_ADDR) PORTB;
142 extern __sfr __at (PORTC_ADDR) PORTC;
143 extern __sfr __at (PORTD_ADDR) PORTD;
144 extern __sfr __at (PORTE_ADDR) PORTE;
145 extern __sfr __at (PCLATH_ADDR) PCLATH;
146 extern __sfr __at (INTCON_ADDR) INTCON;
147 extern __sfr __at (PIR1_ADDR) PIR1;
148 extern __sfr __at (PIR2_ADDR) PIR2;
149 extern __sfr __at (TMR1L_ADDR) TMR1L;
150 extern __sfr __at (TMR1H_ADDR) TMR1H;
151 extern __sfr __at (T1CON_ADDR) T1CON;
152 extern __sfr __at (TMR2_ADDR) TMR2;
153 extern __sfr __at (T2CON_ADDR) T2CON;
154 extern __sfr __at (SSPBUF_ADDR) SSPBUF;
155 extern __sfr __at (SSPCON_ADDR) SSPCON;
156 extern __sfr __at (CCPR1L_ADDR) CCPR1L;
157 extern __sfr __at (CCPR1H_ADDR) CCPR1H;
158 extern __sfr __at (CCP1CON_ADDR) CCP1CON;
159 extern __sfr __at (RCSTA_ADDR) RCSTA;
160 extern __sfr __at (TXREG_ADDR) TXREG;
161 extern __sfr __at (RCREG_ADDR) RCREG;
162 extern __sfr __at (CCPR2L_ADDR) CCPR2L;
163 extern __sfr __at (CCPR2H_ADDR) CCPR2H;
164 extern __sfr __at (CCP2CON_ADDR) CCP2CON;
165 extern __sfr __at (ADRES_ADDR) ADRES;
166 extern __sfr __at (ADCON0_ADDR) ADCON0;
168 extern __sfr __at (OPTION_REG_ADDR) OPTION_REG;
169 extern __sfr __at (TRISA_ADDR) TRISA;
170 extern __sfr __at (TRISB_ADDR) TRISB;
171 extern __sfr __at (TRISC_ADDR) TRISC;
172 extern __sfr __at (TRISD_ADDR) TRISD;
173 extern __sfr __at (TRISE_ADDR) TRISE;
174 extern __sfr __at (PIE1_ADDR) PIE1;
175 extern __sfr __at (PIE2_ADDR) PIE2;
176 extern __sfr __at (PCON_ADDR) PCON;
177 extern __sfr __at (PR2_ADDR) PR2;
178 extern __sfr __at (SSPADD_ADDR) SSPADD;
179 extern __sfr __at (SSPSTAT_ADDR) SSPSTAT;
180 extern __sfr __at (TXSTA_ADDR) TXSTA;
181 extern __sfr __at (SPBRG_ADDR) SPBRG;
182 extern __sfr __at (ADCON1_ADDR) ADCON1;
184 extern __sfr __at (PMDATA_ADDR) PMDATA;
185 extern __sfr __at (PMADR_ADDR) PMADR;
186 extern __sfr __at (PMDATH_ADDR) PMDATH;
187 extern __sfr __at (PMADRH_ADDR) PMADRH;
189 extern __sfr __at (PMCON1_ADDR) PMCON1;
191 //----- STATUS Bits --------------------------------------------------------
194 //----- INTCON Bits --------------------------------------------------------
197 //----- PIR1 Bits ----------------------------------------------------------
200 //----- PIR2 Bits ----------------------------------------------------------
203 //----- T1CON Bits ---------------------------------------------------------
206 //----- T2CON Bits ---------------------------------------------------------
209 //----- SSPCON Bits --------------------------------------------------------
212 //----- CCP1CON Bits -------------------------------------------------------
215 //----- RCSTA Bits ---------------------------------------------------------
218 //----- CCP2CON Bits -------------------------------------------------------
221 //----- ADCON0 Bits --------------------------------------------------------
224 //----- OPTION Bits --------------------------------------------------------
227 //----- TRISE Bits ---------------------------------------------------------
230 //----- PIE1 Bits ----------------------------------------------------------
233 //----- PIE2 Bits ----------------------------------------------------------
236 //----- PCON Bits ----------------------------------------------------------
239 //----- SSPSTAT Bits -------------------------------------------------------
242 //----- TXSTA Bits ---------------------------------------------------------
245 //----- ADCON1 Bits --------------------------------------------------------
248 //----- PMCON1 Bits --------------------------------------------------------
250 //==========================================================================
254 //==========================================================================
257 // __BADRAM H'8F'-H'91', H'95'-H'97', H'9A'-H'9E'
258 // __BADRAM H'105', H'107'-H'109'
259 // __BADRAM H'185', H'187'-H'189', H'18D'-H'18F'
261 //==========================================================================
263 // Configuration Bits
265 //==========================================================================
267 #define _BODEN_ON 0x3FFF
268 #define _BODEN_OFF 0x3FBF
269 #define _CP_ALL 0x3FEF
270 #define _CP_OFF 0x3FFF
271 #define _PWRTE_OFF 0x3FFF
272 #define _PWRTE_ON 0x3FF7
273 #define _WDT_ON 0x3FFF
274 #define _WDT_OFF 0x3FFB
275 #define _LP_OSC 0x3FFC
276 #define _XT_OSC 0x3FFD
277 #define _HS_OSC 0x3FFE
278 #define _RC_OSC 0x3FFF
282 // ----- ADCON0 bits --------------------
285 unsigned char ADON:1;
288 unsigned char CHS0:1;
289 unsigned char CHS1:1;
290 unsigned char CHS2:1;
291 unsigned char ADCS0:1;
292 unsigned char ADCS1:1;
297 unsigned char NOT_DONE:1;
307 unsigned char GO_DONE:1;
315 extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits;
317 #ifndef NO_BIT_DEFINES
318 #define ADON ADCON0_bits.ADON
319 #define GO ADCON0_bits.GO
320 #define NOT_DONE ADCON0_bits.NOT_DONE
321 #define GO_DONE ADCON0_bits.GO_DONE
322 #define CHS0 ADCON0_bits.CHS0
323 #define CHS1 ADCON0_bits.CHS1
324 #define CHS2 ADCON0_bits.CHS2
325 #define ADCS0 ADCON0_bits.ADCS0
326 #define ADCS1 ADCON0_bits.ADCS1
327 #endif /* NO_BIT_DEFINES */
329 // ----- ADCON1 bits --------------------
332 unsigned char PCFG0:1;
333 unsigned char PCFG1:1;
334 unsigned char PCFG2:1;
342 extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits;
344 #ifndef NO_BIT_DEFINES
345 #define PCFG0 ADCON1_bits.PCFG0
346 #define PCFG1 ADCON1_bits.PCFG1
347 #define PCFG2 ADCON1_bits.PCFG2
348 #endif /* NO_BIT_DEFINES */
350 // ----- CCP1CON bits --------------------
353 unsigned char CCP1M0:1;
354 unsigned char CCP1M1:1;
355 unsigned char CCP1M2:1;
356 unsigned char CCP1M3:1;
357 unsigned char CCP1Y:1;
358 unsigned char CCP1X:1;
363 extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits;
365 #ifndef NO_BIT_DEFINES
366 #define CCP1M0 CCP1CON_bits.CCP1M0
367 #define CCP1M1 CCP1CON_bits.CCP1M1
368 #define CCP1M2 CCP1CON_bits.CCP1M2
369 #define CCP1M3 CCP1CON_bits.CCP1M3
370 #define CCP1Y CCP1CON_bits.CCP1Y
371 #define CCP1X CCP1CON_bits.CCP1X
372 #endif /* NO_BIT_DEFINES */
374 // ----- CCP2CON bits --------------------
377 unsigned char CCP2M0:1;
378 unsigned char CCP2M1:1;
379 unsigned char CCP2M2:1;
380 unsigned char CCP2M3:1;
381 unsigned char CCP2Y:1;
382 unsigned char CCP2X:1;
387 extern volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits;
389 #ifndef NO_BIT_DEFINES
390 #define CCP2M0 CCP2CON_bits.CCP2M0
391 #define CCP2M1 CCP2CON_bits.CCP2M1
392 #define CCP2M2 CCP2CON_bits.CCP2M2
393 #define CCP2M3 CCP2CON_bits.CCP2M3
394 #define CCP2Y CCP2CON_bits.CCP2Y
395 #define CCP2X CCP2CON_bits.CCP2X
396 #endif /* NO_BIT_DEFINES */
398 // ----- INTCON bits --------------------
401 unsigned char RBIF:1;
402 unsigned char INTF:1;
403 unsigned char T0IF:1;
404 unsigned char RBIE:1;
405 unsigned char INTE:1;
406 unsigned char T0IE:1;
407 unsigned char PEIE:1;
411 extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits;
413 #ifndef NO_BIT_DEFINES
414 #define RBIF INTCON_bits.RBIF
415 #define INTF INTCON_bits.INTF
416 #define T0IF INTCON_bits.T0IF
417 #define RBIE INTCON_bits.RBIE
418 #define INTE INTCON_bits.INTE
419 #define T0IE INTCON_bits.T0IE
420 #define PEIE INTCON_bits.PEIE
421 #define GIE INTCON_bits.GIE
422 #endif /* NO_BIT_DEFINES */
424 // ----- OPTION_REG bits --------------------
431 unsigned char T0SE:1;
432 unsigned char T0CS:1;
433 unsigned char INTEDG:1;
434 unsigned char NOT_RBPU:1;
436 } __OPTION_REG_bits_t;
437 extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits;
439 #ifndef NO_BIT_DEFINES
440 #define PS0 OPTION_REG_bits.PS0
441 #define PS1 OPTION_REG_bits.PS1
442 #define PS2 OPTION_REG_bits.PS2
443 #define PSA OPTION_REG_bits.PSA
444 #define T0SE OPTION_REG_bits.T0SE
445 #define T0CS OPTION_REG_bits.T0CS
446 #define INTEDG OPTION_REG_bits.INTEDG
447 #define NOT_RBPU OPTION_REG_bits.NOT_RBPU
448 #endif /* NO_BIT_DEFINES */
450 // ----- PCON bits --------------------
453 unsigned char NOT_BO:1;
454 unsigned char NOT_POR:1;
463 unsigned char NOT_BOR:1;
473 extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits;
475 #ifndef NO_BIT_DEFINES
476 #define NOT_BO PCON_bits.NOT_BO
477 #define NOT_BOR PCON_bits.NOT_BOR
478 #define NOT_POR PCON_bits.NOT_POR
479 #endif /* NO_BIT_DEFINES */
481 // ----- PIE1 bits --------------------
484 unsigned char TMR1IE:1;
485 unsigned char TMR2IE:1;
486 unsigned char CCP1IE:1;
487 unsigned char SSPIE:1;
488 unsigned char TXIE:1;
489 unsigned char RCIE:1;
490 unsigned char ADIE:1;
491 unsigned char PSPIE:1;
494 extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits;
496 #ifndef NO_BIT_DEFINES
497 #define TMR1IE PIE1_bits.TMR1IE
498 #define TMR2IE PIE1_bits.TMR2IE
499 #define CCP1IE PIE1_bits.CCP1IE
500 #define SSPIE PIE1_bits.SSPIE
501 #define TXIE PIE1_bits.TXIE
502 #define RCIE PIE1_bits.RCIE
503 #define ADIE PIE1_bits.ADIE
504 #define PSPIE PIE1_bits.PSPIE
505 #endif /* NO_BIT_DEFINES */
507 // ----- PIE2 bits --------------------
510 unsigned char CCP2IE:1;
520 extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits;
522 #ifndef NO_BIT_DEFINES
523 #define CCP2IE PIE2_bits.CCP2IE
524 #endif /* NO_BIT_DEFINES */
526 // ----- PIR1 bits --------------------
529 unsigned char TMR1IF:1;
530 unsigned char TMR2IF:1;
531 unsigned char CCP1IF:1;
532 unsigned char SSPIF:1;
533 unsigned char TXIF:1;
534 unsigned char RCIF:1;
535 unsigned char ADIF:1;
536 unsigned char PSPIF:1;
539 extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits;
541 #ifndef NO_BIT_DEFINES
542 #define TMR1IF PIR1_bits.TMR1IF
543 #define TMR2IF PIR1_bits.TMR2IF
544 #define CCP1IF PIR1_bits.CCP1IF
545 #define SSPIF PIR1_bits.SSPIF
546 #define TXIF PIR1_bits.TXIF
547 #define RCIF PIR1_bits.RCIF
548 #define ADIF PIR1_bits.ADIF
549 #define PSPIF PIR1_bits.PSPIF
550 #endif /* NO_BIT_DEFINES */
552 // ----- PIR2 bits --------------------
555 unsigned char CCP2IF:1;
565 extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits;
567 #ifndef NO_BIT_DEFINES
568 #define CCP2IF PIR2_bits.CCP2IF
569 #endif /* NO_BIT_DEFINES */
571 // ----- PMCON1 bits --------------------
584 extern volatile __PMCON1_bits_t __at(PMCON1_ADDR) PMCON1_bits;
586 #ifndef NO_BIT_DEFINES
587 #define RD PMCON1_bits.RD
588 #endif /* NO_BIT_DEFINES */
590 // ----- PORTA bits --------------------
603 extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits;
605 #ifndef NO_BIT_DEFINES
606 #define RA0 PORTA_bits.RA0
607 #define RA1 PORTA_bits.RA1
608 #define RA2 PORTA_bits.RA2
609 #define RA3 PORTA_bits.RA3
610 #define RA4 PORTA_bits.RA4
611 #define RA5 PORTA_bits.RA5
612 #endif /* NO_BIT_DEFINES */
614 // ----- PORTB bits --------------------
627 extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits;
629 #ifndef NO_BIT_DEFINES
630 #define RB0 PORTB_bits.RB0
631 #define RB1 PORTB_bits.RB1
632 #define RB2 PORTB_bits.RB2
633 #define RB3 PORTB_bits.RB3
634 #define RB4 PORTB_bits.RB4
635 #define RB5 PORTB_bits.RB5
636 #define RB6 PORTB_bits.RB6
637 #define RB7 PORTB_bits.RB7
638 #endif /* NO_BIT_DEFINES */
640 // ----- PORTC bits --------------------
653 extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits;
655 #ifndef NO_BIT_DEFINES
656 #define RC0 PORTC_bits.RC0
657 #define RC1 PORTC_bits.RC1
658 #define RC2 PORTC_bits.RC2
659 #define RC3 PORTC_bits.RC3
660 #define RC4 PORTC_bits.RC4
661 #define RC5 PORTC_bits.RC5
662 #define RC6 PORTC_bits.RC6
663 #define RC7 PORTC_bits.RC7
664 #endif /* NO_BIT_DEFINES */
666 // ----- PORTD bits --------------------
679 extern volatile __PORTD_bits_t __at(PORTD_ADDR) PORTD_bits;
681 #ifndef NO_BIT_DEFINES
682 #define RD0 PORTD_bits.RD0
683 #define RD1 PORTD_bits.RD1
684 #define RD2 PORTD_bits.RD2
685 #define RD3 PORTD_bits.RD3
686 #define RD4 PORTD_bits.RD4
687 #define RD5 PORTD_bits.RD5
688 #define RD6 PORTD_bits.RD6
689 #define RD7 PORTD_bits.RD7
690 #endif /* NO_BIT_DEFINES */
692 // ----- PORTE bits --------------------
705 extern volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits;
707 #ifndef NO_BIT_DEFINES
708 #define RE0 PORTE_bits.RE0
709 #define RE1 PORTE_bits.RE1
710 #define RE2 PORTE_bits.RE2
711 #endif /* NO_BIT_DEFINES */
713 // ----- RCSTA bits --------------------
716 unsigned char RX9D:1;
717 unsigned char OERR:1;
718 unsigned char FERR:1;
720 unsigned char CREN:1;
721 unsigned char SREN:1;
723 unsigned char SPEN:1;
726 unsigned char RCD8:1;
742 unsigned char NOT_RC8:1;
752 unsigned char RC8_9:1;
756 extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits;
758 #ifndef NO_BIT_DEFINES
759 #define RX9D RCSTA_bits.RX9D
760 #define RCD8 RCSTA_bits.RCD8
761 #define OERR RCSTA_bits.OERR
762 #define FERR RCSTA_bits.FERR
763 #define CREN RCSTA_bits.CREN
764 #define SREN RCSTA_bits.SREN
765 #define RX9 RCSTA_bits.RX9
766 #define RC9 RCSTA_bits.RC9
767 #define NOT_RC8 RCSTA_bits.NOT_RC8
768 #define RC8_9 RCSTA_bits.RC8_9
769 #define SPEN RCSTA_bits.SPEN
770 #endif /* NO_BIT_DEFINES */
772 // ----- SSPCON bits --------------------
775 unsigned char SSPM0:1;
776 unsigned char SSPM1:1;
777 unsigned char SSPM2:1;
778 unsigned char SSPM3:1;
780 unsigned char SSPEN:1;
781 unsigned char SSPOV:1;
782 unsigned char WCOL:1;
785 extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits;
787 #ifndef NO_BIT_DEFINES
788 #define SSPM0 SSPCON_bits.SSPM0
789 #define SSPM1 SSPCON_bits.SSPM1
790 #define SSPM2 SSPCON_bits.SSPM2
791 #define SSPM3 SSPCON_bits.SSPM3
792 #define CKP SSPCON_bits.CKP
793 #define SSPEN SSPCON_bits.SSPEN
794 #define SSPOV SSPCON_bits.SSPOV
795 #define WCOL SSPCON_bits.WCOL
796 #endif /* NO_BIT_DEFINES */
798 // ----- SSPSTAT bits --------------------
813 unsigned char I2C_READ:1;
814 unsigned char I2C_START:1;
815 unsigned char I2C_STOP:1;
816 unsigned char I2C_DATA:1;
823 unsigned char NOT_W:1;
826 unsigned char NOT_A:1;
833 unsigned char NOT_WRITE:1;
836 unsigned char NOT_ADDRESS:1;
853 unsigned char READ_WRITE:1;
856 unsigned char DATA_ADDRESS:1;
861 extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits;
863 #ifndef NO_BIT_DEFINES
864 #define BF SSPSTAT_bits.BF
865 #define UA SSPSTAT_bits.UA
866 #define R SSPSTAT_bits.R
867 #define I2C_READ SSPSTAT_bits.I2C_READ
868 #define NOT_W SSPSTAT_bits.NOT_W
869 #define NOT_WRITE SSPSTAT_bits.NOT_WRITE
870 #define R_W SSPSTAT_bits.R_W
871 #define READ_WRITE SSPSTAT_bits.READ_WRITE
872 #define S SSPSTAT_bits.S
873 #define I2C_START SSPSTAT_bits.I2C_START
874 #define P SSPSTAT_bits.P
875 #define I2C_STOP SSPSTAT_bits.I2C_STOP
876 #define D SSPSTAT_bits.D
877 #define I2C_DATA SSPSTAT_bits.I2C_DATA
878 #define NOT_A SSPSTAT_bits.NOT_A
879 #define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS
880 #define D_A SSPSTAT_bits.D_A
881 #define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS
882 #define CKE SSPSTAT_bits.CKE
883 #define SMP SSPSTAT_bits.SMP
884 #endif /* NO_BIT_DEFINES */
886 // ----- STATUS bits --------------------
892 unsigned char NOT_PD:1;
893 unsigned char NOT_TO:1;
899 extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits;
901 #ifndef NO_BIT_DEFINES
902 #define C STATUS_bits.C
903 #define DC STATUS_bits.DC
904 #define Z STATUS_bits.Z
905 #define NOT_PD STATUS_bits.NOT_PD
906 #define NOT_TO STATUS_bits.NOT_TO
907 #define RP0 STATUS_bits.RP0
908 #define RP1 STATUS_bits.RP1
909 #define IRP STATUS_bits.IRP
910 #endif /* NO_BIT_DEFINES */
912 // ----- T1CON bits --------------------
915 unsigned char TMR1ON:1;
916 unsigned char TMR1CS:1;
917 unsigned char NOT_T1SYNC:1;
918 unsigned char T1OSCEN:1;
919 unsigned char T1CKPS0:1;
920 unsigned char T1CKPS1:1;
927 unsigned char T1INSYNC:1;
935 extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits;
937 #ifndef NO_BIT_DEFINES
938 #define TMR1ON T1CON_bits.TMR1ON
939 #define TMR1CS T1CON_bits.TMR1CS
940 #define NOT_T1SYNC T1CON_bits.NOT_T1SYNC
941 #define T1INSYNC T1CON_bits.T1INSYNC
942 #define T1OSCEN T1CON_bits.T1OSCEN
943 #define T1CKPS0 T1CON_bits.T1CKPS0
944 #define T1CKPS1 T1CON_bits.T1CKPS1
945 #endif /* NO_BIT_DEFINES */
947 // ----- T2CON bits --------------------
950 unsigned char T2CKPS0:1;
951 unsigned char T2CKPS1:1;
952 unsigned char TMR2ON:1;
953 unsigned char TOUTPS0:1;
954 unsigned char TOUTPS1:1;
955 unsigned char TOUTPS2:1;
956 unsigned char TOUTPS3:1;
960 extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits;
962 #ifndef NO_BIT_DEFINES
963 #define T2CKPS0 T2CON_bits.T2CKPS0
964 #define T2CKPS1 T2CON_bits.T2CKPS1
965 #define TMR2ON T2CON_bits.TMR2ON
966 #define TOUTPS0 T2CON_bits.TOUTPS0
967 #define TOUTPS1 T2CON_bits.TOUTPS1
968 #define TOUTPS2 T2CON_bits.TOUTPS2
969 #define TOUTPS3 T2CON_bits.TOUTPS3
970 #endif /* NO_BIT_DEFINES */
972 // ----- TRISA bits --------------------
975 unsigned char TRISA0:1;
976 unsigned char TRISA1:1;
977 unsigned char TRISA2:1;
978 unsigned char TRISA3:1;
979 unsigned char TRISA4:1;
980 unsigned char TRISA5:1;
985 extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits;
987 #ifndef NO_BIT_DEFINES
988 #define TRISA0 TRISA_bits.TRISA0
989 #define TRISA1 TRISA_bits.TRISA1
990 #define TRISA2 TRISA_bits.TRISA2
991 #define TRISA3 TRISA_bits.TRISA3
992 #define TRISA4 TRISA_bits.TRISA4
993 #define TRISA5 TRISA_bits.TRISA5
994 #endif /* NO_BIT_DEFINES */
996 // ----- TRISB bits --------------------
999 unsigned char TRISB0:1;
1000 unsigned char TRISB1:1;
1001 unsigned char TRISB2:1;
1002 unsigned char TRISB3:1;
1003 unsigned char TRISB4:1;
1004 unsigned char TRISB5:1;
1005 unsigned char TRISB6:1;
1006 unsigned char TRISB7:1;
1009 extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits;
1011 #ifndef NO_BIT_DEFINES
1012 #define TRISB0 TRISB_bits.TRISB0
1013 #define TRISB1 TRISB_bits.TRISB1
1014 #define TRISB2 TRISB_bits.TRISB2
1015 #define TRISB3 TRISB_bits.TRISB3
1016 #define TRISB4 TRISB_bits.TRISB4
1017 #define TRISB5 TRISB_bits.TRISB5
1018 #define TRISB6 TRISB_bits.TRISB6
1019 #define TRISB7 TRISB_bits.TRISB7
1020 #endif /* NO_BIT_DEFINES */
1022 // ----- TRISC bits --------------------
1025 unsigned char TRISC0:1;
1026 unsigned char TRISC1:1;
1027 unsigned char TRISC2:1;
1028 unsigned char TRISC3:1;
1029 unsigned char TRISC4:1;
1030 unsigned char TRISC5:1;
1031 unsigned char TRISC6:1;
1032 unsigned char TRISC7:1;
1035 extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits;
1037 #ifndef NO_BIT_DEFINES
1038 #define TRISC0 TRISC_bits.TRISC0
1039 #define TRISC1 TRISC_bits.TRISC1
1040 #define TRISC2 TRISC_bits.TRISC2
1041 #define TRISC3 TRISC_bits.TRISC3
1042 #define TRISC4 TRISC_bits.TRISC4
1043 #define TRISC5 TRISC_bits.TRISC5
1044 #define TRISC6 TRISC_bits.TRISC6
1045 #define TRISC7 TRISC_bits.TRISC7
1046 #endif /* NO_BIT_DEFINES */
1048 // ----- TRISD bits --------------------
1051 unsigned char TRISD0:1;
1052 unsigned char TRISD1:1;
1053 unsigned char TRISD2:1;
1054 unsigned char TRISD3:1;
1055 unsigned char TRISD4:1;
1056 unsigned char TRISD5:1;
1057 unsigned char TRISD6:1;
1058 unsigned char TRISD7:1;
1061 extern volatile __TRISD_bits_t __at(TRISD_ADDR) TRISD_bits;
1063 #ifndef NO_BIT_DEFINES
1064 #define TRISD0 TRISD_bits.TRISD0
1065 #define TRISD1 TRISD_bits.TRISD1
1066 #define TRISD2 TRISD_bits.TRISD2
1067 #define TRISD3 TRISD_bits.TRISD3
1068 #define TRISD4 TRISD_bits.TRISD4
1069 #define TRISD5 TRISD_bits.TRISD5
1070 #define TRISD6 TRISD_bits.TRISD6
1071 #define TRISD7 TRISD_bits.TRISD7
1072 #endif /* NO_BIT_DEFINES */
1074 // ----- TRISE bits --------------------
1077 unsigned char TRISE0:1;
1078 unsigned char TRISE1:1;
1079 unsigned char TRISE2:1;
1081 unsigned char PSPMODE:1;
1082 unsigned char IBOV:1;
1083 unsigned char OBF:1;
1084 unsigned char IBF:1;
1087 extern volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits;
1089 #ifndef NO_BIT_DEFINES
1090 #define TRISE0 TRISE_bits.TRISE0
1091 #define TRISE1 TRISE_bits.TRISE1
1092 #define TRISE2 TRISE_bits.TRISE2
1093 #define PSPMODE TRISE_bits.PSPMODE
1094 #define IBOV TRISE_bits.IBOV
1095 #define OBF TRISE_bits.OBF
1096 #define IBF TRISE_bits.IBF
1097 #endif /* NO_BIT_DEFINES */
1099 // ----- TXSTA bits --------------------
1102 unsigned char TX9D:1;
1103 unsigned char TRMT:1;
1104 unsigned char BRGH:1;
1106 unsigned char SYNC:1;
1107 unsigned char TXEN:1;
1108 unsigned char TX9:1;
1109 unsigned char CSRC:1;
1112 unsigned char TXD8:1;
1118 unsigned char NOT_TX8:1;
1128 unsigned char TX8_9:1;
1132 extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits;
1134 #ifndef NO_BIT_DEFINES
1135 #define TX9D TXSTA_bits.TX9D
1136 #define TXD8 TXSTA_bits.TXD8
1137 #define TRMT TXSTA_bits.TRMT
1138 #define BRGH TXSTA_bits.BRGH
1139 #define SYNC TXSTA_bits.SYNC
1140 #define TXEN TXSTA_bits.TXEN
1141 #define TX9 TXSTA_bits.TX9
1142 #define NOT_TX8 TXSTA_bits.NOT_TX8
1143 #define TX8_9 TXSTA_bits.TX8_9
1144 #define CSRC TXSTA_bits.CSRC
1145 #endif /* NO_BIT_DEFINES */