2 // Register Declarations for Microchip 16F72 Processor
5 // This header file was automatically generated by:
9 // Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved
11 // SDCC is licensed under the GNU Public license (GPL) v2. Note that
12 // this license covers the code to the compiler and other executables,
13 // but explicitly does not cover any code or objects generated by sdcc.
14 // We have not yet decided on a license for the run time libraries, but
15 // it will not put any requirements on code linked against it. See:
17 // http://www.gnu.org/copyleft/gpl/html
19 // See http://sdcc.sourceforge.net/ for the latest information on sdcc.
26 // Register addresses.
28 #define INDF_ADDR 0x0000
29 #define TMR0_ADDR 0x0001
30 #define PCL_ADDR 0x0002
31 #define STATUS_ADDR 0x0003
32 #define FSR_ADDR 0x0004
33 #define PORTA_ADDR 0x0005
34 #define PORTB_ADDR 0x0006
35 #define PORTC_ADDR 0x0007
36 #define PCLATH_ADDR 0x000A
37 #define INTCON_ADDR 0x000B
38 #define PIR1_ADDR 0x000C
39 #define TMR1L_ADDR 0x000E
40 #define TMR1H_ADDR 0x000F
41 #define T1CON_ADDR 0x0010
42 #define TMR2_ADDR 0x0011
43 #define T2CON_ADDR 0x0012
44 #define SSPBUF_ADDR 0x0013
45 #define SSPCON_ADDR 0x0014
46 #define CCPR1L_ADDR 0x0015
47 #define CCPR1H_ADDR 0x0016
48 #define CCP1CON_ADDR 0x0017
49 #define ADRES_ADDR 0x001E
50 #define ADCON0_ADDR 0x001F
51 #define OPTION_REG_ADDR 0x0081
52 #define TRISA_ADDR 0x0085
53 #define TRISB_ADDR 0x0086
54 #define TRISC_ADDR 0x0087
55 #define PIE1_ADDR 0x008C
56 #define PCON_ADDR 0x008E
57 #define PR2_ADDR 0x0092
58 #define SSPADD_ADDR 0x0093
59 #define SSPSTAT_ADDR 0x0094
60 #define ADCON1_ADDR 0x009F
61 #define PMDATL_ADDR 0x010C
62 #define PMADRL_ADDR 0x010D
63 #define PMDATH_ADDR 0x010E
64 #define PMADRH_ADDR 0x010F
65 #define PMCON1_ADDR 0x018C
68 // Memory organization.
74 // P16F72.INC Standard Header File, Version 1.01 Microchip Technology, Inc.
77 // This header file defines configurations, registers, and other useful bits of
78 // information for the PIC16F72 microcontroller. These names are taken to match
79 // the data sheets as closely as possible.
81 // Note that the processor must be selected before this file is
82 // included. The processor may be selected the following ways:
84 // 1. Command line switch:
85 // C:\ MPASM MYFILE.ASM /PIC16F72
86 // 2. LIST directive in the source file
88 // 3. Processor Type entry in the MPASM full-screen interface
90 //==========================================================================
94 //==========================================================================
98 //1.00 03/22/02 Initial Release
100 //==========================================================================
104 //==========================================================================
107 // MESSG "Processor-header file mismatch. Verify selected processor."
110 //==========================================================================
112 // Register Definitions
114 //==========================================================================
119 //----- Register Files------------------------------------------------------
121 extern __sfr __at (INDF_ADDR) INDF;
122 extern __sfr __at (TMR0_ADDR) TMR0;
123 extern __sfr __at (PCL_ADDR) PCL;
124 extern __sfr __at (STATUS_ADDR) STATUS;
125 extern __sfr __at (FSR_ADDR) FSR;
126 extern __sfr __at (PORTA_ADDR) PORTA;
127 extern __sfr __at (PORTB_ADDR) PORTB;
128 extern __sfr __at (PORTC_ADDR) PORTC;
129 extern __sfr __at (PCLATH_ADDR) PCLATH;
130 extern __sfr __at (INTCON_ADDR) INTCON;
131 extern __sfr __at (PIR1_ADDR) PIR1;
132 extern __sfr __at (TMR1L_ADDR) TMR1L;
133 extern __sfr __at (TMR1H_ADDR) TMR1H;
134 extern __sfr __at (T1CON_ADDR) T1CON;
135 extern __sfr __at (TMR2_ADDR) TMR2;
136 extern __sfr __at (T2CON_ADDR) T2CON;
137 extern __sfr __at (SSPBUF_ADDR) SSPBUF;
138 extern __sfr __at (SSPCON_ADDR) SSPCON;
139 extern __sfr __at (CCPR1L_ADDR) CCPR1L;
140 extern __sfr __at (CCPR1H_ADDR) CCPR1H;
141 extern __sfr __at (CCP1CON_ADDR) CCP1CON;
142 extern __sfr __at (ADRES_ADDR) ADRES;
143 extern __sfr __at (ADCON0_ADDR) ADCON0;
144 extern __sfr __at (OPTION_REG_ADDR) OPTION_REG;
145 extern __sfr __at (TRISA_ADDR) TRISA;
146 extern __sfr __at (TRISB_ADDR) TRISB;
147 extern __sfr __at (TRISC_ADDR) TRISC;
148 extern __sfr __at (PIE1_ADDR) PIE1;
149 extern __sfr __at (PCON_ADDR) PCON;
150 extern __sfr __at (PR2_ADDR) PR2;
151 extern __sfr __at (SSPADD_ADDR) SSPADD;
152 extern __sfr __at (SSPSTAT_ADDR) SSPSTAT;
153 extern __sfr __at (ADCON1_ADDR) ADCON1;
155 extern __sfr __at (PMDATL_ADDR) PMDATL;
156 extern __sfr __at (PMADRL_ADDR) PMADRL;
157 extern __sfr __at (PMDATH_ADDR) PMDATH;
158 extern __sfr __at (PMADRH_ADDR) PMADRH;
160 extern __sfr __at (PMCON1_ADDR) PMCON1;
162 //----- STATUS Bits --------------------------------------------------------
165 //----- INTCON Bits --------------------------------------------------------
168 //----- PIR1 Bits ----------------------------------------------------------
171 //----- T1CON Bits ---------------------------------------------------------
174 //----- T2CON Bits ---------------------------------------------------------
177 //----- SSPCON Bits --------------------------------------------------------
180 //----- CCP1CON Bits -------------------------------------------------------
183 //----- ADCON0 Bits --------------------------------------------------------
186 //----- OPTION Bits --------------------------------------------------------
189 //----- PIE1 Bits ----------------------------------------------------------
192 //----- PCON Bits ----------------------------------------------------------
195 //----- SSPSTAT Bits -------------------------------------------------------
198 //----- ADCON1 Bits --------------------------------------------------------
201 //----- PMCON1 Bits --------------------------------------------------------
203 //==========================================================================
207 //==========================================================================
210 // __BADRAM H'08'-H'09', H'0D', H'18'-H'1D'
211 // __BADRAM H'88'-H'89', H'8D', H'8F'-H'91', H'95'-H'9E'
212 // __BADRAM H'105', H'107'-H'109', H'110'-H'11F'
213 // __BADRAM H'185', H'187'-H'189', H'18D'-H'19F'
216 //==========================================================================
218 // Configuration Bits
220 //==========================================================================
222 #define _BOREN_ON 0x3FFF
223 #define _BODEN_ON 0x3FFF // Backward compatibility only
224 #define _BOREN_OFF 0x3FBF
225 #define _BODEN_OFF 0x3FBF // Backward compatibility only
226 #define _CP_ALL 0x3FEF
227 #define _CP_OFF 0x3FFF
228 #define _PWRTEN_OFF 0x3FFF
229 #define _PWRTE_OFF 0x3FFF // Backward compatibility only
230 #define _PWRTEN_ON 0x3FF7
231 #define _PWRTE_ON 0x3FF7 // Backward compatibility only
232 #define _WDTEN_ON 0x3FFF
233 #define _WDTEN_OFF 0x3FFB
234 #define _WDT_ON 0x3FFF // Backward compatibility only
235 #define _WDT_OFF 0x3FFB // Backward compatibility only
236 #define _LP_OSC 0x3FFC
237 #define _XT_OSC 0x3FFD
238 #define _HS_OSC 0x3FFE
239 #define _RC_OSC 0x3FFF
243 // ----- ADCON0 bits --------------------
246 unsigned char ADON:1;
249 unsigned char CHS0:1;
250 unsigned char CHS1:1;
251 unsigned char CHS2:1;
252 unsigned char ADCS0:1;
253 unsigned char ADCS1:1;
258 unsigned char NOT_DONE:1;
268 unsigned char GO_DONE:1;
276 extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits;
278 #ifndef NO_BIT_DEFINES
279 #define ADON ADCON0_bits.ADON
280 #define GO ADCON0_bits.GO
281 #define NOT_DONE ADCON0_bits.NOT_DONE
282 #define GO_DONE ADCON0_bits.GO_DONE
283 #define CHS0 ADCON0_bits.CHS0
284 #define CHS1 ADCON0_bits.CHS1
285 #define CHS2 ADCON0_bits.CHS2
286 #define ADCS0 ADCON0_bits.ADCS0
287 #define ADCS1 ADCON0_bits.ADCS1
288 #endif /* NO_BIT_DEFINES */
290 // ----- ADCON1 bits --------------------
293 unsigned char PCFG0:1;
294 unsigned char PCFG1:1;
295 unsigned char PCFG2:1;
303 extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits;
305 #ifndef NO_BIT_DEFINES
306 #define PCFG0 ADCON1_bits.PCFG0
307 #define PCFG1 ADCON1_bits.PCFG1
308 #define PCFG2 ADCON1_bits.PCFG2
309 #endif /* NO_BIT_DEFINES */
311 // ----- CCP1CON bits --------------------
314 unsigned char CCP1M0:1;
315 unsigned char CCP1M1:1;
316 unsigned char CCP1M2:1;
317 unsigned char CCP1M3:1;
318 unsigned char CCP1Y:1;
319 unsigned char CCP1X:1;
324 extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits;
326 #ifndef NO_BIT_DEFINES
327 #define CCP1M0 CCP1CON_bits.CCP1M0
328 #define CCP1M1 CCP1CON_bits.CCP1M1
329 #define CCP1M2 CCP1CON_bits.CCP1M2
330 #define CCP1M3 CCP1CON_bits.CCP1M3
331 #define CCP1Y CCP1CON_bits.CCP1Y
332 #define CCP1X CCP1CON_bits.CCP1X
333 #endif /* NO_BIT_DEFINES */
335 // ----- INTCON bits --------------------
338 unsigned char RBIF:1;
339 unsigned char INTF:1;
340 unsigned char TMR0IF:1;
341 unsigned char RBIE:1;
342 unsigned char INTE:1;
343 unsigned char TMR0IE:1;
344 unsigned char PEIE:1;
350 unsigned char T0IF:1;
353 unsigned char T0IE:1;
358 extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits;
360 #ifndef NO_BIT_DEFINES
361 #define RBIF INTCON_bits.RBIF
362 #define INTF INTCON_bits.INTF
363 #define TMR0IF INTCON_bits.TMR0IF
364 #define T0IF INTCON_bits.T0IF
365 #define RBIE INTCON_bits.RBIE
366 #define INTE INTCON_bits.INTE
367 #define TMR0IE INTCON_bits.TMR0IE
368 #define T0IE INTCON_bits.T0IE
369 #define PEIE INTCON_bits.PEIE
370 #define GIE INTCON_bits.GIE
371 #endif /* NO_BIT_DEFINES */
373 // ----- OPTION_REG bits --------------------
380 unsigned char T0SE:1;
381 unsigned char T0CS:1;
382 unsigned char INTEDG:1;
383 unsigned char NOT_RBPU:1;
385 } __OPTION_REG_bits_t;
386 extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits;
388 #ifndef NO_BIT_DEFINES
389 #define PS0 OPTION_REG_bits.PS0
390 #define PS1 OPTION_REG_bits.PS1
391 #define PS2 OPTION_REG_bits.PS2
392 #define PSA OPTION_REG_bits.PSA
393 #define T0SE OPTION_REG_bits.T0SE
394 #define T0CS OPTION_REG_bits.T0CS
395 #define INTEDG OPTION_REG_bits.INTEDG
396 #define NOT_RBPU OPTION_REG_bits.NOT_RBPU
397 #endif /* NO_BIT_DEFINES */
399 // ----- PCON bits --------------------
402 unsigned char NOT_BO:1;
403 unsigned char NOT_POR:1;
412 unsigned char NOT_BOR:1;
422 extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits;
424 #ifndef NO_BIT_DEFINES
425 #define NOT_BO PCON_bits.NOT_BO
426 #define NOT_BOR PCON_bits.NOT_BOR
427 #define NOT_POR PCON_bits.NOT_POR
428 #endif /* NO_BIT_DEFINES */
430 // ----- PIE1 bits --------------------
433 unsigned char TMR1IE:1;
434 unsigned char TMR2IE:1;
435 unsigned char CCP1IE:1;
436 unsigned char SSPIE:1;
439 unsigned char ADIE:1;
443 extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits;
445 #ifndef NO_BIT_DEFINES
446 #define TMR1IE PIE1_bits.TMR1IE
447 #define TMR2IE PIE1_bits.TMR2IE
448 #define CCP1IE PIE1_bits.CCP1IE
449 #define SSPIE PIE1_bits.SSPIE
450 #define ADIE PIE1_bits.ADIE
451 #endif /* NO_BIT_DEFINES */
453 // ----- PIR1 bits --------------------
456 unsigned char TMR1IF:1;
457 unsigned char TMR2IF:1;
458 unsigned char CCP1IF:1;
459 unsigned char SSPIF:1;
462 unsigned char ADIF:1;
466 extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits;
468 #ifndef NO_BIT_DEFINES
469 #define TMR1IF PIR1_bits.TMR1IF
470 #define TMR2IF PIR1_bits.TMR2IF
471 #define CCP1IF PIR1_bits.CCP1IF
472 #define SSPIF PIR1_bits.SSPIF
473 #define ADIF PIR1_bits.ADIF
474 #endif /* NO_BIT_DEFINES */
476 // ----- PMCON1 bits --------------------
489 extern volatile __PMCON1_bits_t __at(PMCON1_ADDR) PMCON1_bits;
491 #ifndef NO_BIT_DEFINES
492 #define RD PMCON1_bits.RD
493 #endif /* NO_BIT_DEFINES */
495 // ----- PORTA bits --------------------
508 extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits;
510 #ifndef NO_BIT_DEFINES
511 #define RA0 PORTA_bits.RA0
512 #define RA1 PORTA_bits.RA1
513 #define RA2 PORTA_bits.RA2
514 #define RA3 PORTA_bits.RA3
515 #define RA4 PORTA_bits.RA4
516 #define RA5 PORTA_bits.RA5
517 #endif /* NO_BIT_DEFINES */
519 // ----- PORTB bits --------------------
532 extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits;
534 #ifndef NO_BIT_DEFINES
535 #define RB0 PORTB_bits.RB0
536 #define RB1 PORTB_bits.RB1
537 #define RB2 PORTB_bits.RB2
538 #define RB3 PORTB_bits.RB3
539 #define RB4 PORTB_bits.RB4
540 #define RB5 PORTB_bits.RB5
541 #define RB6 PORTB_bits.RB6
542 #define RB7 PORTB_bits.RB7
543 #endif /* NO_BIT_DEFINES */
545 // ----- PORTC bits --------------------
558 extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits;
560 #ifndef NO_BIT_DEFINES
561 #define RC0 PORTC_bits.RC0
562 #define RC1 PORTC_bits.RC1
563 #define RC2 PORTC_bits.RC2
564 #define RC3 PORTC_bits.RC3
565 #define RC4 PORTC_bits.RC4
566 #define RC5 PORTC_bits.RC5
567 #define RC6 PORTC_bits.RC6
568 #define RC7 PORTC_bits.RC7
569 #endif /* NO_BIT_DEFINES */
571 // ----- SSPCON bits --------------------
574 unsigned char SSPM0:1;
575 unsigned char SSPM1:1;
576 unsigned char SSPM2:1;
577 unsigned char SSPM3:1;
579 unsigned char SSPEN:1;
580 unsigned char SSPOV:1;
581 unsigned char WCOL:1;
584 extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits;
586 #ifndef NO_BIT_DEFINES
587 #define SSPM0 SSPCON_bits.SSPM0
588 #define SSPM1 SSPCON_bits.SSPM1
589 #define SSPM2 SSPCON_bits.SSPM2
590 #define SSPM3 SSPCON_bits.SSPM3
591 #define CKP SSPCON_bits.CKP
592 #define SSPEN SSPCON_bits.SSPEN
593 #define SSPOV SSPCON_bits.SSPOV
594 #define WCOL SSPCON_bits.WCOL
595 #endif /* NO_BIT_DEFINES */
597 // ----- SSPSTAT bits --------------------
612 unsigned char I2C_READ:1;
613 unsigned char I2C_START:1;
614 unsigned char I2C_STOP:1;
615 unsigned char I2C_DATA:1;
622 unsigned char NOT_W:1;
625 unsigned char NOT_A:1;
632 unsigned char NOT_WRITE:1;
635 unsigned char NOT_ADDRESS:1;
652 unsigned char READ_WRITE:1;
655 unsigned char DATA_ADDRESS:1;
660 extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits;
662 #ifndef NO_BIT_DEFINES
663 #define BF SSPSTAT_bits.BF
664 #define UA SSPSTAT_bits.UA
665 #define R SSPSTAT_bits.R
666 #define I2C_READ SSPSTAT_bits.I2C_READ
667 #define NOT_W SSPSTAT_bits.NOT_W
668 #define NOT_WRITE SSPSTAT_bits.NOT_WRITE
669 #define R_W SSPSTAT_bits.R_W
670 #define READ_WRITE SSPSTAT_bits.READ_WRITE
671 #define S SSPSTAT_bits.S
672 #define I2C_START SSPSTAT_bits.I2C_START
673 #define P SSPSTAT_bits.P
674 #define I2C_STOP SSPSTAT_bits.I2C_STOP
675 #define D SSPSTAT_bits.D
676 #define I2C_DATA SSPSTAT_bits.I2C_DATA
677 #define NOT_A SSPSTAT_bits.NOT_A
678 #define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS
679 #define D_A SSPSTAT_bits.D_A
680 #define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS
681 #define CKE SSPSTAT_bits.CKE
682 #define SMP SSPSTAT_bits.SMP
683 #endif /* NO_BIT_DEFINES */
685 // ----- STATUS bits --------------------
691 unsigned char NOT_PD:1;
692 unsigned char NOT_TO:1;
698 extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits;
700 #ifndef NO_BIT_DEFINES
701 #define C STATUS_bits.C
702 #define DC STATUS_bits.DC
703 #define Z STATUS_bits.Z
704 #define NOT_PD STATUS_bits.NOT_PD
705 #define NOT_TO STATUS_bits.NOT_TO
706 #define RP0 STATUS_bits.RP0
707 #define RP1 STATUS_bits.RP1
708 #define IRP STATUS_bits.IRP
709 #endif /* NO_BIT_DEFINES */
711 // ----- T1CON bits --------------------
714 unsigned char TMR1ON:1;
715 unsigned char TMR1CS:1;
716 unsigned char NOT_T1SYNC:1;
717 unsigned char T1OSCEN:1;
718 unsigned char T1CKPS0:1;
719 unsigned char T1CKPS1:1;
726 unsigned char T1INSYNC:1;
734 extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits;
736 #ifndef NO_BIT_DEFINES
737 #define TMR1ON T1CON_bits.TMR1ON
738 #define TMR1CS T1CON_bits.TMR1CS
739 #define NOT_T1SYNC T1CON_bits.NOT_T1SYNC
740 #define T1INSYNC T1CON_bits.T1INSYNC
741 #define T1OSCEN T1CON_bits.T1OSCEN
742 #define T1CKPS0 T1CON_bits.T1CKPS0
743 #define T1CKPS1 T1CON_bits.T1CKPS1
744 #endif /* NO_BIT_DEFINES */
746 // ----- T2CON bits --------------------
749 unsigned char T2CKPS0:1;
750 unsigned char T2CKPS1:1;
751 unsigned char TMR2ON:1;
752 unsigned char TOUTPS0:1;
753 unsigned char TOUTPS1:1;
754 unsigned char TOUTPS2:1;
755 unsigned char TOUTPS3:1;
759 extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits;
761 #ifndef NO_BIT_DEFINES
762 #define T2CKPS0 T2CON_bits.T2CKPS0
763 #define T2CKPS1 T2CON_bits.T2CKPS1
764 #define TMR2ON T2CON_bits.TMR2ON
765 #define TOUTPS0 T2CON_bits.TOUTPS0
766 #define TOUTPS1 T2CON_bits.TOUTPS1
767 #define TOUTPS2 T2CON_bits.TOUTPS2
768 #define TOUTPS3 T2CON_bits.TOUTPS3
769 #endif /* NO_BIT_DEFINES */
771 // ----- TRISA bits --------------------
774 unsigned char TRISA0:1;
775 unsigned char TRISA1:1;
776 unsigned char TRISA2:1;
777 unsigned char TRISA3:1;
778 unsigned char TRISA4:1;
779 unsigned char TRISA5:1;
784 extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits;
786 #ifndef NO_BIT_DEFINES
787 #define TRISA0 TRISA_bits.TRISA0
788 #define TRISA1 TRISA_bits.TRISA1
789 #define TRISA2 TRISA_bits.TRISA2
790 #define TRISA3 TRISA_bits.TRISA3
791 #define TRISA4 TRISA_bits.TRISA4
792 #define TRISA5 TRISA_bits.TRISA5
793 #endif /* NO_BIT_DEFINES */
795 // ----- TRISB bits --------------------
798 unsigned char TRISB0:1;
799 unsigned char TRISB1:1;
800 unsigned char TRISB2:1;
801 unsigned char TRISB3:1;
802 unsigned char TRISB4:1;
803 unsigned char TRISB5:1;
804 unsigned char TRISB6:1;
805 unsigned char TRISB7:1;
808 extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits;
810 #ifndef NO_BIT_DEFINES
811 #define TRISB0 TRISB_bits.TRISB0
812 #define TRISB1 TRISB_bits.TRISB1
813 #define TRISB2 TRISB_bits.TRISB2
814 #define TRISB3 TRISB_bits.TRISB3
815 #define TRISB4 TRISB_bits.TRISB4
816 #define TRISB5 TRISB_bits.TRISB5
817 #define TRISB6 TRISB_bits.TRISB6
818 #define TRISB7 TRISB_bits.TRISB7
819 #endif /* NO_BIT_DEFINES */
821 // ----- TRISC bits --------------------
824 unsigned char TRISC0:1;
825 unsigned char TRISC1:1;
826 unsigned char TRISC2:1;
827 unsigned char TRISC3:1;
828 unsigned char TRISC4:1;
829 unsigned char TRISC5:1;
830 unsigned char TRISC6:1;
831 unsigned char TRISC7:1;
834 extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits;
836 #ifndef NO_BIT_DEFINES
837 #define TRISC0 TRISC_bits.TRISC0
838 #define TRISC1 TRISC_bits.TRISC1
839 #define TRISC2 TRISC_bits.TRISC2
840 #define TRISC3 TRISC_bits.TRISC3
841 #define TRISC4 TRISC_bits.TRISC4
842 #define TRISC5 TRISC_bits.TRISC5
843 #define TRISC6 TRISC_bits.TRISC6
844 #define TRISC7 TRISC_bits.TRISC7
845 #endif /* NO_BIT_DEFINES */