2 // Register Declarations for Microchip 16C774 Processor
5 // This header file was automatically generated by:
9 // Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved
11 // SDCC is licensed under the GNU Public license (GPL) v2. Note that
12 // this license covers the code to the compiler and other executables,
13 // but explicitly does not cover any code or objects generated by sdcc.
14 // We have not yet decided on a license for the run time libraries, but
15 // it will not put any requirements on code linked against it. See:
17 // http://www.gnu.org/copyleft/gpl/html
19 // See http://sdcc.sourceforge.net/ for the latest information on sdcc.
26 // Register addresses.
28 #define INDF_ADDR 0x0000
29 #define TMR0_ADDR 0x0001
30 #define PCL_ADDR 0x0002
31 #define STATUS_ADDR 0x0003
32 #define FSR_ADDR 0x0004
33 #define PORTA_ADDR 0x0005
34 #define PORTB_ADDR 0x0006
35 #define PORTC_ADDR 0x0007
36 #define PORTD_ADDR 0x0008
37 #define PORTE_ADDR 0x0009
38 #define PCLATH_ADDR 0x000A
39 #define INTCON_ADDR 0x000B
40 #define PIR1_ADDR 0x000C
41 #define PIR2_ADDR 0x000D
42 #define TMR1L_ADDR 0x000E
43 #define TMR1H_ADDR 0x000F
44 #define T1CON_ADDR 0x0010
45 #define TMR2_ADDR 0x0011
46 #define T2CON_ADDR 0x0012
47 #define SSPBUF_ADDR 0x0013
48 #define SSPCON_ADDR 0x0014
49 #define CCPR1L_ADDR 0x0015
50 #define CCPR1H_ADDR 0x0016
51 #define CCP1CON_ADDR 0x0017
52 #define RCSTA_ADDR 0x0018
53 #define TXREG_ADDR 0x0019
54 #define RCREG_ADDR 0x001A
55 #define CCPR2L_ADDR 0x001B
56 #define CCPR2H_ADDR 0x001C
57 #define CCP2CON_ADDR 0x001D
58 #define ADRESH_ADDR 0x001E
59 #define ADCON0_ADDR 0x001F
60 #define OPTION_REG_ADDR 0x0081
61 #define TRISA_ADDR 0x0085
62 #define TRISB_ADDR 0x0086
63 #define TRISC_ADDR 0x0087
64 #define TRISD_ADDR 0x0088
65 #define TRISE_ADDR 0x0089
66 #define PIE1_ADDR 0x008C
67 #define PIE2_ADDR 0x008D
68 #define PCON_ADDR 0x008E
69 #define SSPCON2_ADDR 0x0091
70 #define PR2_ADDR 0x0092
71 #define SSPADD_ADDR 0x0093
72 #define SSPSTAT_ADDR 0x0094
73 #define TXSTA_ADDR 0x0098
74 #define SPBRG_ADDR 0x0099
75 #define REFCON_ADDR 0x009B
76 #define LVDCON_ADDR 0x009C
77 #define ADRESL_ADDR 0x009E
78 #define ADCON1_ADDR 0x009F
81 // Memory organization.
87 // P16C774.INC Standard Header File, Version 1.01 Microchip Technology, Inc.
90 // This header file defines configurations, registers, and other useful bits of
91 // information for the PIC16C774 microcontroller. These names are taken to match
92 // the data sheets as closely as possible.
94 // Note that the processor must be selected before this file is
95 // included. The processor may be selected the following ways:
97 // 1. Command line switch:
98 // C:\ MPASM MYFILE.ASM /PIC16C774
99 // 2. LIST directive in the source file
101 // 3. Processor Type entry in the MPASM full-screen interface
103 //==========================================================================
107 //==========================================================================
111 //1.00 08/07/98 Initial Release
112 //1.01 25Jan99 Fixed LVVx bits
114 //==========================================================================
118 //==========================================================================
121 // MESSG "Processor-header file mismatch. Verify selected processor."
124 //==========================================================================
126 // Register Definitions
128 //==========================================================================
133 //----- Register Files------------------------------------------------------
135 extern __sfr __at (INDF_ADDR) INDF;
136 extern __sfr __at (TMR0_ADDR) TMR0;
137 extern __sfr __at (PCL_ADDR) PCL;
138 extern __sfr __at (STATUS_ADDR) STATUS;
139 extern __sfr __at (FSR_ADDR) FSR;
140 extern __sfr __at (PORTA_ADDR) PORTA;
141 extern __sfr __at (PORTB_ADDR) PORTB;
142 extern __sfr __at (PORTC_ADDR) PORTC;
143 extern __sfr __at (PORTD_ADDR) PORTD;
144 extern __sfr __at (PORTE_ADDR) PORTE;
145 extern __sfr __at (PCLATH_ADDR) PCLATH;
146 extern __sfr __at (INTCON_ADDR) INTCON;
147 extern __sfr __at (PIR1_ADDR) PIR1;
148 extern __sfr __at (PIR2_ADDR) PIR2;
149 extern __sfr __at (TMR1L_ADDR) TMR1L;
150 extern __sfr __at (TMR1H_ADDR) TMR1H;
151 extern __sfr __at (T1CON_ADDR) T1CON;
152 extern __sfr __at (TMR2_ADDR) TMR2;
153 extern __sfr __at (T2CON_ADDR) T2CON;
154 extern __sfr __at (SSPBUF_ADDR) SSPBUF;
155 extern __sfr __at (SSPCON_ADDR) SSPCON;
156 extern __sfr __at (CCPR1L_ADDR) CCPR1L;
157 extern __sfr __at (CCPR1H_ADDR) CCPR1H;
158 extern __sfr __at (CCP1CON_ADDR) CCP1CON;
159 extern __sfr __at (RCSTA_ADDR) RCSTA;
160 extern __sfr __at (TXREG_ADDR) TXREG;
161 extern __sfr __at (RCREG_ADDR) RCREG;
162 extern __sfr __at (CCPR2L_ADDR) CCPR2L;
163 extern __sfr __at (CCPR2H_ADDR) CCPR2H;
164 extern __sfr __at (CCP2CON_ADDR) CCP2CON;
165 extern __sfr __at (ADRESH_ADDR) ADRESH;
166 extern __sfr __at (ADCON0_ADDR) ADCON0;
168 extern __sfr __at (OPTION_REG_ADDR) OPTION_REG;
169 extern __sfr __at (TRISA_ADDR) TRISA;
170 extern __sfr __at (TRISB_ADDR) TRISB;
171 extern __sfr __at (TRISC_ADDR) TRISC;
172 extern __sfr __at (TRISD_ADDR) TRISD;
173 extern __sfr __at (TRISE_ADDR) TRISE;
174 extern __sfr __at (PIE1_ADDR) PIE1;
175 extern __sfr __at (PIE2_ADDR) PIE2;
176 extern __sfr __at (PCON_ADDR) PCON;
177 extern __sfr __at (SSPCON2_ADDR) SSPCON2;
178 extern __sfr __at (PR2_ADDR) PR2;
179 extern __sfr __at (SSPADD_ADDR) SSPADD;
180 extern __sfr __at (SSPSTAT_ADDR) SSPSTAT;
181 extern __sfr __at (TXSTA_ADDR) TXSTA;
182 extern __sfr __at (SPBRG_ADDR) SPBRG;
183 extern __sfr __at (REFCON_ADDR) REFCON;
184 extern __sfr __at (LVDCON_ADDR) LVDCON;
185 extern __sfr __at (ADRESL_ADDR) ADRESL;
186 extern __sfr __at (ADCON1_ADDR) ADCON1;
188 //----- STATUS Bits --------------------------------------------------------
191 //----- INTCON Bits --------------------------------------------------------
194 //----- PIR1 Bits ----------------------------------------------------------
197 //----- PIR2 Bits ----------------------------------------------------------
200 //----- T1CON Bits ---------------------------------------------------------
203 //----- T2CON Bits ---------------------------------------------------------
206 //----- SSPCON Bits --------------------------------------------------------
209 //----- CCP1CON Bits -------------------------------------------------------
212 //----- RCSTA Bits ---------------------------------------------------------
215 //----- CCP2CON Bits -------------------------------------------------------
218 //----- ADCON0 Bits --------------------------------------------------------
221 //----- OPTION_REG Bits ----------------------------------------------------
224 //----- TRISE Bits ---------------------------------------------------------
227 //----- PIE1 Bits ----------------------------------------------------------
230 //----- PIE2 Bits ----------------------------------------------------------
233 //----- PCON Bits ----------------------------------------------------------
236 //----- SSPCON2 Bits --------------------------------------------------------
239 //----- SSPSTAT Bits -------------------------------------------------------
242 //----- TXSTA Bits ---------------------------------------------------------
245 //----- REFCON Bits --------------------------------------------------------
248 //----- LVDCON Bits --------------------------------------------------------
251 //----- ADCON1 Bits --------------------------------------------------------
254 //==========================================================================
258 //==========================================================================
261 // __BADRAM H'8F'-H'90', H'95'-H'97', H'9A', H'9D'
262 // __BADRAM H'105', H'107'-H'109', H'10C'-H'11F'
263 // __BADRAM H'185', H'187'-H'189', H'18C'-H'1EF'
265 //==========================================================================
267 // Configuration Bits
269 //==========================================================================
271 #define _BODEN_ON 0x3FFF
272 #define _BODEN_OFF 0x3FBF
273 #define _CP_ALL 0x0CCF
274 #define _CP_75 0x1DDF
275 #define _CP_50 0x2EEF
276 #define _CP_OFF 0x3FFF
277 #define _VBOR_25 0x3FFF
278 #define _VBOR_27 0x3BFF
279 #define _VBOR_42 0x37FF
280 #define _VBOR_45 0x33FF
281 #define _PWRTE_OFF 0x3FFF
282 #define _PWRTE_ON 0x3FF7
283 #define _WDT_ON 0x3FFF
284 #define _WDT_OFF 0x3FFB
285 #define _LP_OSC 0x3FFC
286 #define _XT_OSC 0x3FFD
287 #define _HS_OSC 0x3FFE
288 #define _RC_OSC 0x3FFF
292 // ----- ADCON0 bits --------------------
295 unsigned char ADON:1;
296 unsigned char CHS3:1;
298 unsigned char CHS0:1;
299 unsigned char CHS1:1;
300 unsigned char CHS2:1;
301 unsigned char ADCS0:1;
302 unsigned char ADCS1:1;
307 unsigned char NOT_DONE:1;
317 unsigned char GO_DONE:1;
325 extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits;
327 #ifndef NO_BIT_DEFINES
328 #define ADON ADCON0_bits.ADON
329 #define CHS3 ADCON0_bits.CHS3
330 #define GO ADCON0_bits.GO
331 #define NOT_DONE ADCON0_bits.NOT_DONE
332 #define GO_DONE ADCON0_bits.GO_DONE
333 #define CHS0 ADCON0_bits.CHS0
334 #define CHS1 ADCON0_bits.CHS1
335 #define CHS2 ADCON0_bits.CHS2
336 #define ADCS0 ADCON0_bits.ADCS0
337 #define ADCS1 ADCON0_bits.ADCS1
338 #endif /* NO_BIT_DEFINES */
340 // ----- ADCON1 bits --------------------
343 unsigned char PCFG0:1;
344 unsigned char PCFG1:1;
345 unsigned char PCFG2:1;
346 unsigned char PCFG3:1;
347 unsigned char VCFG0:1;
348 unsigned char VCFG1:1;
349 unsigned char VCFG2:1;
350 unsigned char ADFM:1;
353 extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits;
355 #ifndef NO_BIT_DEFINES
356 #define PCFG0 ADCON1_bits.PCFG0
357 #define PCFG1 ADCON1_bits.PCFG1
358 #define PCFG2 ADCON1_bits.PCFG2
359 #define PCFG3 ADCON1_bits.PCFG3
360 #define VCFG0 ADCON1_bits.VCFG0
361 #define VCFG1 ADCON1_bits.VCFG1
362 #define VCFG2 ADCON1_bits.VCFG2
363 #define ADFM ADCON1_bits.ADFM
364 #endif /* NO_BIT_DEFINES */
366 // ----- CCP1CON bits --------------------
369 unsigned char CCP1M0:1;
370 unsigned char CCP1M1:1;
371 unsigned char CCP1M2:1;
372 unsigned char CCP1M3:1;
373 unsigned char CCP1Y:1;
374 unsigned char CCP1X:1;
379 extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits;
381 #ifndef NO_BIT_DEFINES
382 #define CCP1M0 CCP1CON_bits.CCP1M0
383 #define CCP1M1 CCP1CON_bits.CCP1M1
384 #define CCP1M2 CCP1CON_bits.CCP1M2
385 #define CCP1M3 CCP1CON_bits.CCP1M3
386 #define CCP1Y CCP1CON_bits.CCP1Y
387 #define CCP1X CCP1CON_bits.CCP1X
388 #endif /* NO_BIT_DEFINES */
390 // ----- CCP2CON bits --------------------
393 unsigned char CCP2M0:1;
394 unsigned char CCP2M1:1;
395 unsigned char CCP2M2:1;
396 unsigned char CCP2M3:1;
397 unsigned char CCP2Y:1;
398 unsigned char CCP2X:1;
403 extern volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits;
405 #ifndef NO_BIT_DEFINES
406 #define CCP2M0 CCP2CON_bits.CCP2M0
407 #define CCP2M1 CCP2CON_bits.CCP2M1
408 #define CCP2M2 CCP2CON_bits.CCP2M2
409 #define CCP2M3 CCP2CON_bits.CCP2M3
410 #define CCP2Y CCP2CON_bits.CCP2Y
411 #define CCP2X CCP2CON_bits.CCP2X
412 #endif /* NO_BIT_DEFINES */
414 // ----- INTCON bits --------------------
417 unsigned char RBIF:1;
418 unsigned char INTF:1;
419 unsigned char T0IF:1;
420 unsigned char RBIE:1;
421 unsigned char INTE:1;
422 unsigned char T0IE:1;
423 unsigned char PEIE:1;
427 extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits;
429 #ifndef NO_BIT_DEFINES
430 #define RBIF INTCON_bits.RBIF
431 #define INTF INTCON_bits.INTF
432 #define T0IF INTCON_bits.T0IF
433 #define RBIE INTCON_bits.RBIE
434 #define INTE INTCON_bits.INTE
435 #define T0IE INTCON_bits.T0IE
436 #define PEIE INTCON_bits.PEIE
437 #define GIE INTCON_bits.GIE
438 #endif /* NO_BIT_DEFINES */
440 // ----- LVDCON bits --------------------
447 unsigned char LVDEN:1;
448 unsigned char BGST:1;
453 extern volatile __LVDCON_bits_t __at(LVDCON_ADDR) LVDCON_bits;
455 #ifndef NO_BIT_DEFINES
456 #define LV0 LVDCON_bits.LV0
457 #define LV1 LVDCON_bits.LV1
458 #define LV2 LVDCON_bits.LV2
459 #define LV3 LVDCON_bits.LV3
460 #define LVDEN LVDCON_bits.LVDEN
461 #define BGST LVDCON_bits.BGST
462 #endif /* NO_BIT_DEFINES */
464 // ----- OPTION_REG bits --------------------
471 unsigned char T0SE:1;
472 unsigned char T0CS:1;
473 unsigned char INTEDG:1;
474 unsigned char NOT_RBPU:1;
476 } __OPTION_REG_bits_t;
477 extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits;
479 #ifndef NO_BIT_DEFINES
480 #define PS0 OPTION_REG_bits.PS0
481 #define PS1 OPTION_REG_bits.PS1
482 #define PS2 OPTION_REG_bits.PS2
483 #define PSA OPTION_REG_bits.PSA
484 #define T0SE OPTION_REG_bits.T0SE
485 #define T0CS OPTION_REG_bits.T0CS
486 #define INTEDG OPTION_REG_bits.INTEDG
487 #define NOT_RBPU OPTION_REG_bits.NOT_RBPU
488 #endif /* NO_BIT_DEFINES */
490 // ----- PCON bits --------------------
493 unsigned char NOT_BO:1;
494 unsigned char NOT_POR:1;
503 unsigned char NOT_BOR:1;
513 extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits;
515 #ifndef NO_BIT_DEFINES
516 #define NOT_BO PCON_bits.NOT_BO
517 #define NOT_BOR PCON_bits.NOT_BOR
518 #define NOT_POR PCON_bits.NOT_POR
519 #endif /* NO_BIT_DEFINES */
521 // ----- PIE1 bits --------------------
524 unsigned char TMR1IE:1;
525 unsigned char TMR2IE:1;
526 unsigned char CCP1IE:1;
527 unsigned char SSPIE:1;
528 unsigned char TXIE:1;
529 unsigned char RCIE:1;
530 unsigned char ADIE:1;
534 extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits;
536 #ifndef NO_BIT_DEFINES
537 #define TMR1IE PIE1_bits.TMR1IE
538 #define TMR2IE PIE1_bits.TMR2IE
539 #define CCP1IE PIE1_bits.CCP1IE
540 #define SSPIE PIE1_bits.SSPIE
541 #define TXIE PIE1_bits.TXIE
542 #define RCIE PIE1_bits.RCIE
543 #define ADIE PIE1_bits.ADIE
544 #endif /* NO_BIT_DEFINES */
546 // ----- PIE2 bits --------------------
549 unsigned char CCP2IE:1;
552 unsigned char BCLIE:1;
556 unsigned char LVDIE:1;
559 extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits;
561 #ifndef NO_BIT_DEFINES
562 #define CCP2IE PIE2_bits.CCP2IE
563 #define BCLIE PIE2_bits.BCLIE
564 #define LVDIE PIE2_bits.LVDIE
565 #endif /* NO_BIT_DEFINES */
567 // ----- PIR1 bits --------------------
570 unsigned char TMR1IF:1;
571 unsigned char TMR2IF:1;
572 unsigned char CCP1IF:1;
573 unsigned char SSPIF:1;
574 unsigned char TXIF:1;
575 unsigned char RCIF:1;
576 unsigned char ADIF:1;
580 extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits;
582 #ifndef NO_BIT_DEFINES
583 #define TMR1IF PIR1_bits.TMR1IF
584 #define TMR2IF PIR1_bits.TMR2IF
585 #define CCP1IF PIR1_bits.CCP1IF
586 #define SSPIF PIR1_bits.SSPIF
587 #define TXIF PIR1_bits.TXIF
588 #define RCIF PIR1_bits.RCIF
589 #define ADIF PIR1_bits.ADIF
590 #endif /* NO_BIT_DEFINES */
592 // ----- PIR2 bits --------------------
595 unsigned char CCP2IF:1;
598 unsigned char BCLIF:1;
602 unsigned char LVDIF:1;
605 extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits;
607 #ifndef NO_BIT_DEFINES
608 #define CCP2IF PIR2_bits.CCP2IF
609 #define BCLIF PIR2_bits.BCLIF
610 #define LVDIF PIR2_bits.LVDIF
611 #endif /* NO_BIT_DEFINES */
613 // ----- PORTA bits --------------------
626 extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits;
628 #ifndef NO_BIT_DEFINES
629 #define RA0 PORTA_bits.RA0
630 #define RA1 PORTA_bits.RA1
631 #define RA2 PORTA_bits.RA2
632 #define RA3 PORTA_bits.RA3
633 #define RA4 PORTA_bits.RA4
634 #define RA5 PORTA_bits.RA5
635 #endif /* NO_BIT_DEFINES */
637 // ----- PORTB bits --------------------
650 extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits;
652 #ifndef NO_BIT_DEFINES
653 #define RB0 PORTB_bits.RB0
654 #define RB1 PORTB_bits.RB1
655 #define RB2 PORTB_bits.RB2
656 #define RB3 PORTB_bits.RB3
657 #define RB4 PORTB_bits.RB4
658 #define RB5 PORTB_bits.RB5
659 #define RB6 PORTB_bits.RB6
660 #define RB7 PORTB_bits.RB7
661 #endif /* NO_BIT_DEFINES */
663 // ----- PORTC bits --------------------
676 extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits;
678 #ifndef NO_BIT_DEFINES
679 #define RC0 PORTC_bits.RC0
680 #define RC1 PORTC_bits.RC1
681 #define RC2 PORTC_bits.RC2
682 #define RC3 PORTC_bits.RC3
683 #define RC4 PORTC_bits.RC4
684 #define RC5 PORTC_bits.RC5
685 #define RC6 PORTC_bits.RC6
686 #define RC7 PORTC_bits.RC7
687 #endif /* NO_BIT_DEFINES */
689 // ----- PORTD bits --------------------
702 extern volatile __PORTD_bits_t __at(PORTD_ADDR) PORTD_bits;
704 #ifndef NO_BIT_DEFINES
705 #define RD0 PORTD_bits.RD0
706 #define RD1 PORTD_bits.RD1
707 #define RD2 PORTD_bits.RD2
708 #define RD3 PORTD_bits.RD3
709 #define RD4 PORTD_bits.RD4
710 #define RD5 PORTD_bits.RD5
711 #define RD6 PORTD_bits.RD6
712 #define RD7 PORTD_bits.RD7
713 #endif /* NO_BIT_DEFINES */
715 // ----- PORTE bits --------------------
728 extern volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits;
730 #ifndef NO_BIT_DEFINES
731 #define RE0 PORTE_bits.RE0
732 #define RE1 PORTE_bits.RE1
733 #define RE2 PORTE_bits.RE2
734 #endif /* NO_BIT_DEFINES */
736 // ----- RCSTA bits --------------------
739 unsigned char RX9D:1;
740 unsigned char OERR:1;
741 unsigned char FERR:1;
742 unsigned char ADDEN:1;
743 unsigned char CREN:1;
744 unsigned char SREN:1;
746 unsigned char SPEN:1;
749 unsigned char RCD8:1;
765 unsigned char NOT_RC8:1;
775 unsigned char RC8_9:1;
779 extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits;
781 #ifndef NO_BIT_DEFINES
782 #define RX9D RCSTA_bits.RX9D
783 #define RCD8 RCSTA_bits.RCD8
784 #define OERR RCSTA_bits.OERR
785 #define FERR RCSTA_bits.FERR
786 #define ADDEN RCSTA_bits.ADDEN
787 #define CREN RCSTA_bits.CREN
788 #define SREN RCSTA_bits.SREN
789 #define RX9 RCSTA_bits.RX9
790 #define RC9 RCSTA_bits.RC9
791 #define NOT_RC8 RCSTA_bits.NOT_RC8
792 #define RC8_9 RCSTA_bits.RC8_9
793 #define SPEN RCSTA_bits.SPEN
794 #endif /* NO_BIT_DEFINES */
796 // ----- REFCON bits --------------------
803 unsigned char VRLOEN:1;
804 unsigned char VRHOEN:1;
805 unsigned char VRLEN:1;
806 unsigned char VRHEN:1;
809 extern volatile __REFCON_bits_t __at(REFCON_ADDR) REFCON_bits;
811 #ifndef NO_BIT_DEFINES
812 #define VRLOEN REFCON_bits.VRLOEN
813 #define VRHOEN REFCON_bits.VRHOEN
814 #define VRLEN REFCON_bits.VRLEN
815 #define VRHEN REFCON_bits.VRHEN
816 #endif /* NO_BIT_DEFINES */
818 // ----- SSPCON bits --------------------
821 unsigned char SSPM0:1;
822 unsigned char SSPM1:1;
823 unsigned char SSPM2:1;
824 unsigned char SSPM3:1;
826 unsigned char SSPEN:1;
827 unsigned char SSPOV:1;
828 unsigned char WCOL:1;
831 extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits;
833 #ifndef NO_BIT_DEFINES
834 #define SSPM0 SSPCON_bits.SSPM0
835 #define SSPM1 SSPCON_bits.SSPM1
836 #define SSPM2 SSPCON_bits.SSPM2
837 #define SSPM3 SSPCON_bits.SSPM3
838 #define CKP SSPCON_bits.CKP
839 #define SSPEN SSPCON_bits.SSPEN
840 #define SSPOV SSPCON_bits.SSPOV
841 #define WCOL SSPCON_bits.WCOL
842 #endif /* NO_BIT_DEFINES */
844 // ----- SSPCON2 bits --------------------
848 unsigned char RSEN:1;
850 unsigned char RCEN:1;
851 unsigned char ACKEN:1;
852 unsigned char ACKDT:1;
853 unsigned char ACKSTAT:1;
854 unsigned char GCEN:1;
857 extern volatile __SSPCON2_bits_t __at(SSPCON2_ADDR) SSPCON2_bits;
859 #ifndef NO_BIT_DEFINES
860 #define SEN SSPCON2_bits.SEN
861 #define RSEN SSPCON2_bits.RSEN
862 #define PEN SSPCON2_bits.PEN
863 #define RCEN SSPCON2_bits.RCEN
864 #define ACKEN SSPCON2_bits.ACKEN
865 #define ACKDT SSPCON2_bits.ACKDT
866 #define ACKSTAT SSPCON2_bits.ACKSTAT
867 #define GCEN SSPCON2_bits.GCEN
868 #endif /* NO_BIT_DEFINES */
870 // ----- SSPSTAT bits --------------------
885 unsigned char I2C_READ:1;
886 unsigned char I2C_START:1;
887 unsigned char I2C_STOP:1;
888 unsigned char I2C_DATA:1;
895 unsigned char NOT_W:1;
898 unsigned char NOT_A:1;
905 unsigned char NOT_WRITE:1;
908 unsigned char NOT_ADDRESS:1;
925 unsigned char READ_WRITE:1;
928 unsigned char DATA_ADDRESS:1;
933 extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits;
935 #ifndef NO_BIT_DEFINES
936 #define BF SSPSTAT_bits.BF
937 #define UA SSPSTAT_bits.UA
938 #define R SSPSTAT_bits.R
939 #define I2C_READ SSPSTAT_bits.I2C_READ
940 #define NOT_W SSPSTAT_bits.NOT_W
941 #define NOT_WRITE SSPSTAT_bits.NOT_WRITE
942 #define R_W SSPSTAT_bits.R_W
943 #define READ_WRITE SSPSTAT_bits.READ_WRITE
944 #define S SSPSTAT_bits.S
945 #define I2C_START SSPSTAT_bits.I2C_START
946 #define P SSPSTAT_bits.P
947 #define I2C_STOP SSPSTAT_bits.I2C_STOP
948 #define D SSPSTAT_bits.D
949 #define I2C_DATA SSPSTAT_bits.I2C_DATA
950 #define NOT_A SSPSTAT_bits.NOT_A
951 #define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS
952 #define D_A SSPSTAT_bits.D_A
953 #define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS
954 #define CKE SSPSTAT_bits.CKE
955 #define SMP SSPSTAT_bits.SMP
956 #endif /* NO_BIT_DEFINES */
958 // ----- STATUS bits --------------------
964 unsigned char NOT_PD:1;
965 unsigned char NOT_TO:1;
971 extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits;
973 #ifndef NO_BIT_DEFINES
974 #define C STATUS_bits.C
975 #define DC STATUS_bits.DC
976 #define Z STATUS_bits.Z
977 #define NOT_PD STATUS_bits.NOT_PD
978 #define NOT_TO STATUS_bits.NOT_TO
979 #define RP0 STATUS_bits.RP0
980 #define RP1 STATUS_bits.RP1
981 #define IRP STATUS_bits.IRP
982 #endif /* NO_BIT_DEFINES */
984 // ----- T1CON bits --------------------
987 unsigned char TMR1ON:1;
988 unsigned char TMR1CS:1;
989 unsigned char NOT_T1SYNC:1;
990 unsigned char T1OSCEN:1;
991 unsigned char T1CKPS0:1;
992 unsigned char T1CKPS1:1;
999 unsigned char T1INSYNC:1;
1009 unsigned char T1SYNC:1;
1017 extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits;
1019 #ifndef NO_BIT_DEFINES
1020 #define TMR1ON T1CON_bits.TMR1ON
1021 #define TMR1CS T1CON_bits.TMR1CS
1022 #define NOT_T1SYNC T1CON_bits.NOT_T1SYNC
1023 #define T1INSYNC T1CON_bits.T1INSYNC
1024 #define T1SYNC T1CON_bits.T1SYNC
1025 #define T1OSCEN T1CON_bits.T1OSCEN
1026 #define T1CKPS0 T1CON_bits.T1CKPS0
1027 #define T1CKPS1 T1CON_bits.T1CKPS1
1028 #endif /* NO_BIT_DEFINES */
1030 // ----- T2CON bits --------------------
1033 unsigned char T2CKPS0:1;
1034 unsigned char T2CKPS1:1;
1035 unsigned char TMR2ON:1;
1036 unsigned char TOUTPS0:1;
1037 unsigned char TOUTPS1:1;
1038 unsigned char TOUTPS2:1;
1039 unsigned char TOUTPS3:1;
1043 extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits;
1045 #ifndef NO_BIT_DEFINES
1046 #define T2CKPS0 T2CON_bits.T2CKPS0
1047 #define T2CKPS1 T2CON_bits.T2CKPS1
1048 #define TMR2ON T2CON_bits.TMR2ON
1049 #define TOUTPS0 T2CON_bits.TOUTPS0
1050 #define TOUTPS1 T2CON_bits.TOUTPS1
1051 #define TOUTPS2 T2CON_bits.TOUTPS2
1052 #define TOUTPS3 T2CON_bits.TOUTPS3
1053 #endif /* NO_BIT_DEFINES */
1055 // ----- TRISA bits --------------------
1058 unsigned char TRISA0:1;
1059 unsigned char TRISA1:1;
1060 unsigned char TRISA2:1;
1061 unsigned char TRISA3:1;
1062 unsigned char TRISA4:1;
1063 unsigned char TRISA5:1;
1068 extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits;
1070 #ifndef NO_BIT_DEFINES
1071 #define TRISA0 TRISA_bits.TRISA0
1072 #define TRISA1 TRISA_bits.TRISA1
1073 #define TRISA2 TRISA_bits.TRISA2
1074 #define TRISA3 TRISA_bits.TRISA3
1075 #define TRISA4 TRISA_bits.TRISA4
1076 #define TRISA5 TRISA_bits.TRISA5
1077 #endif /* NO_BIT_DEFINES */
1079 // ----- TRISB bits --------------------
1082 unsigned char TRISB0:1;
1083 unsigned char TRISB1:1;
1084 unsigned char TRISB2:1;
1085 unsigned char TRISB3:1;
1086 unsigned char TRISB4:1;
1087 unsigned char TRISB5:1;
1088 unsigned char TRISB6:1;
1089 unsigned char TRISB7:1;
1092 extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits;
1094 #ifndef NO_BIT_DEFINES
1095 #define TRISB0 TRISB_bits.TRISB0
1096 #define TRISB1 TRISB_bits.TRISB1
1097 #define TRISB2 TRISB_bits.TRISB2
1098 #define TRISB3 TRISB_bits.TRISB3
1099 #define TRISB4 TRISB_bits.TRISB4
1100 #define TRISB5 TRISB_bits.TRISB5
1101 #define TRISB6 TRISB_bits.TRISB6
1102 #define TRISB7 TRISB_bits.TRISB7
1103 #endif /* NO_BIT_DEFINES */
1105 // ----- TRISC bits --------------------
1108 unsigned char TRISC0:1;
1109 unsigned char TRISC1:1;
1110 unsigned char TRISC2:1;
1111 unsigned char TRISC3:1;
1112 unsigned char TRISC4:1;
1113 unsigned char TRISC5:1;
1114 unsigned char TRISC6:1;
1115 unsigned char TRISC7:1;
1118 extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits;
1120 #ifndef NO_BIT_DEFINES
1121 #define TRISC0 TRISC_bits.TRISC0
1122 #define TRISC1 TRISC_bits.TRISC1
1123 #define TRISC2 TRISC_bits.TRISC2
1124 #define TRISC3 TRISC_bits.TRISC3
1125 #define TRISC4 TRISC_bits.TRISC4
1126 #define TRISC5 TRISC_bits.TRISC5
1127 #define TRISC6 TRISC_bits.TRISC6
1128 #define TRISC7 TRISC_bits.TRISC7
1129 #endif /* NO_BIT_DEFINES */
1131 // ----- TRISD bits --------------------
1134 unsigned char TRISD0:1;
1135 unsigned char TRISD1:1;
1136 unsigned char TRISD2:1;
1137 unsigned char TRISD3:1;
1138 unsigned char TRISD4:1;
1139 unsigned char TRISD5:1;
1140 unsigned char TRISD6:1;
1141 unsigned char TRISD7:1;
1144 extern volatile __TRISD_bits_t __at(TRISD_ADDR) TRISD_bits;
1146 #ifndef NO_BIT_DEFINES
1147 #define TRISD0 TRISD_bits.TRISD0
1148 #define TRISD1 TRISD_bits.TRISD1
1149 #define TRISD2 TRISD_bits.TRISD2
1150 #define TRISD3 TRISD_bits.TRISD3
1151 #define TRISD4 TRISD_bits.TRISD4
1152 #define TRISD5 TRISD_bits.TRISD5
1153 #define TRISD6 TRISD_bits.TRISD6
1154 #define TRISD7 TRISD_bits.TRISD7
1155 #endif /* NO_BIT_DEFINES */
1157 // ----- TRISE bits --------------------
1160 unsigned char TRISE0:1;
1161 unsigned char TRISE1:1;
1162 unsigned char TRISE2:1;
1164 unsigned char PSPMODE:1;
1165 unsigned char IBOV:1;
1166 unsigned char OBF:1;
1167 unsigned char IBF:1;
1170 extern volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits;
1172 #ifndef NO_BIT_DEFINES
1173 #define TRISE0 TRISE_bits.TRISE0
1174 #define TRISE1 TRISE_bits.TRISE1
1175 #define TRISE2 TRISE_bits.TRISE2
1176 #define PSPMODE TRISE_bits.PSPMODE
1177 #define IBOV TRISE_bits.IBOV
1178 #define OBF TRISE_bits.OBF
1179 #define IBF TRISE_bits.IBF
1180 #endif /* NO_BIT_DEFINES */
1182 // ----- TXSTA bits --------------------
1185 unsigned char TX9D:1;
1186 unsigned char TRMT:1;
1187 unsigned char BRGH:1;
1189 unsigned char SYNC:1;
1190 unsigned char TXEN:1;
1191 unsigned char TX9:1;
1192 unsigned char CSRC:1;
1195 unsigned char TXD8:1;
1201 unsigned char NOT_TX8:1;
1211 unsigned char TX8_9:1;
1215 extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits;
1217 #ifndef NO_BIT_DEFINES
1218 #define TX9D TXSTA_bits.TX9D
1219 #define TXD8 TXSTA_bits.TXD8
1220 #define TRMT TXSTA_bits.TRMT
1221 #define BRGH TXSTA_bits.BRGH
1222 #define SYNC TXSTA_bits.SYNC
1223 #define TXEN TXSTA_bits.TXEN
1224 #define TX9 TXSTA_bits.TX9
1225 #define NOT_TX8 TXSTA_bits.NOT_TX8
1226 #define TX8_9 TXSTA_bits.TX8_9
1227 #define CSRC TXSTA_bits.CSRC
1228 #endif /* NO_BIT_DEFINES */