2 // Register Declarations for Microchip 16C773 Processor
5 // This header file was automatically generated by:
9 // Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved
11 // SDCC is licensed under the GNU Public license (GPL) v2. Note that
12 // this license covers the code to the compiler and other executables,
13 // but explicitly does not cover any code or objects generated by sdcc.
14 // We have not yet decided on a license for the run time libraries, but
15 // it will not put any requirements on code linked against it. See:
17 // http://www.gnu.org/copyleft/gpl/html
19 // See http://sdcc.sourceforge.net/ for the latest information on sdcc.
26 // Register addresses.
28 #define INDF_ADDR 0x0000
29 #define TMR0_ADDR 0x0001
30 #define PCL_ADDR 0x0002
31 #define STATUS_ADDR 0x0003
32 #define FSR_ADDR 0x0004
33 #define PORTA_ADDR 0x0005
34 #define PORTB_ADDR 0x0006
35 #define PORTC_ADDR 0x0007
36 #define PCLATH_ADDR 0x000A
37 #define INTCON_ADDR 0x000B
38 #define PIR1_ADDR 0x000C
39 #define PIR2_ADDR 0x000D
40 #define TMR1L_ADDR 0x000E
41 #define TMR1H_ADDR 0x000F
42 #define T1CON_ADDR 0x0010
43 #define TMR2_ADDR 0x0011
44 #define T2CON_ADDR 0x0012
45 #define SSPBUF_ADDR 0x0013
46 #define SSPCON_ADDR 0x0014
47 #define CCPR1L_ADDR 0x0015
48 #define CCPR1H_ADDR 0x0016
49 #define CCP1CON_ADDR 0x0017
50 #define RCSTA_ADDR 0x0018
51 #define TXREG_ADDR 0x0019
52 #define RCREG_ADDR 0x001A
53 #define CCPR2L_ADDR 0x001B
54 #define CCPR2H_ADDR 0x001C
55 #define CCP2CON_ADDR 0x001D
56 #define ADRESH_ADDR 0x001E
57 #define ADCON0_ADDR 0x001F
58 #define OPTION_REG_ADDR 0x0081
59 #define TRISA_ADDR 0x0085
60 #define TRISB_ADDR 0x0086
61 #define TRISC_ADDR 0x0087
62 #define PIE1_ADDR 0x008C
63 #define PIE2_ADDR 0x008D
64 #define PCON_ADDR 0x008E
65 #define SSPCON2_ADDR 0x0091
66 #define PR2_ADDR 0x0092
67 #define SSPADD_ADDR 0x0093
68 #define SSPSTAT_ADDR 0x0094
69 #define TXSTA_ADDR 0x0098
70 #define SPBRG_ADDR 0x0099
71 #define REFCON_ADDR 0x009B
72 #define LVDCON_ADDR 0x009C
73 #define ADRESL_ADDR 0x009E
74 #define ADCON1_ADDR 0x009F
77 // Memory organization.
83 // P16C773.INC Standard Header File, Version 1.01 Microchip Technology, Inc.
86 // This header file defines configurations, registers, and other useful bits of
87 // information for the PIC16C773 microcontroller. These names are taken to match
88 // the data sheets as closely as possible.
90 // Note that the processor must be selected before this file is
91 // included. The processor may be selected the following ways:
93 // 1. Command line switch:
94 // C:\ MPASM MYFILE.ASM /PIC16C773
95 // 2. LIST directive in the source file
97 // 3. Processor Type entry in the MPASM full-screen interface
99 //==========================================================================
103 //==========================================================================
107 //1.00 08/07/98 Initial Release
108 //1.01 25Jan99 Fixed LVVx bits
110 //==========================================================================
114 //==========================================================================
117 // MESSG "Processor-header file mismatch. Verify selected processor."
120 //==========================================================================
122 // Register Definitions
124 //==========================================================================
129 //----- Register Files------------------------------------------------------
131 extern __sfr __at (INDF_ADDR) INDF;
132 extern __sfr __at (TMR0_ADDR) TMR0;
133 extern __sfr __at (PCL_ADDR) PCL;
134 extern __sfr __at (STATUS_ADDR) STATUS;
135 extern __sfr __at (FSR_ADDR) FSR;
136 extern __sfr __at (PORTA_ADDR) PORTA;
137 extern __sfr __at (PORTB_ADDR) PORTB;
138 extern __sfr __at (PORTC_ADDR) PORTC;
139 extern __sfr __at (PCLATH_ADDR) PCLATH;
140 extern __sfr __at (INTCON_ADDR) INTCON;
141 extern __sfr __at (PIR1_ADDR) PIR1;
142 extern __sfr __at (PIR2_ADDR) PIR2;
143 extern __sfr __at (TMR1L_ADDR) TMR1L;
144 extern __sfr __at (TMR1H_ADDR) TMR1H;
145 extern __sfr __at (T1CON_ADDR) T1CON;
146 extern __sfr __at (TMR2_ADDR) TMR2;
147 extern __sfr __at (T2CON_ADDR) T2CON;
148 extern __sfr __at (SSPBUF_ADDR) SSPBUF;
149 extern __sfr __at (SSPCON_ADDR) SSPCON;
150 extern __sfr __at (CCPR1L_ADDR) CCPR1L;
151 extern __sfr __at (CCPR1H_ADDR) CCPR1H;
152 extern __sfr __at (CCP1CON_ADDR) CCP1CON;
153 extern __sfr __at (RCSTA_ADDR) RCSTA;
154 extern __sfr __at (TXREG_ADDR) TXREG;
155 extern __sfr __at (RCREG_ADDR) RCREG;
156 extern __sfr __at (CCPR2L_ADDR) CCPR2L;
157 extern __sfr __at (CCPR2H_ADDR) CCPR2H;
158 extern __sfr __at (CCP2CON_ADDR) CCP2CON;
159 extern __sfr __at (ADRESH_ADDR) ADRESH;
160 extern __sfr __at (ADCON0_ADDR) ADCON0;
162 extern __sfr __at (OPTION_REG_ADDR) OPTION_REG;
163 extern __sfr __at (TRISA_ADDR) TRISA;
164 extern __sfr __at (TRISB_ADDR) TRISB;
165 extern __sfr __at (TRISC_ADDR) TRISC;
166 extern __sfr __at (PIE1_ADDR) PIE1;
167 extern __sfr __at (PIE2_ADDR) PIE2;
168 extern __sfr __at (PCON_ADDR) PCON;
169 extern __sfr __at (SSPCON2_ADDR) SSPCON2;
170 extern __sfr __at (PR2_ADDR) PR2;
171 extern __sfr __at (SSPADD_ADDR) SSPADD;
172 extern __sfr __at (SSPSTAT_ADDR) SSPSTAT;
173 extern __sfr __at (TXSTA_ADDR) TXSTA;
174 extern __sfr __at (SPBRG_ADDR) SPBRG;
175 extern __sfr __at (REFCON_ADDR) REFCON;
176 extern __sfr __at (LVDCON_ADDR) LVDCON;
177 extern __sfr __at (ADRESL_ADDR) ADRESL;
178 extern __sfr __at (ADCON1_ADDR) ADCON1;
180 //----- STATUS Bits --------------------------------------------------------
183 //----- INTCON Bits --------------------------------------------------------
186 //----- PIR1 Bits ----------------------------------------------------------
189 //----- PIR2 Bits ----------------------------------------------------------
192 //----- T1CON Bits ---------------------------------------------------------
195 //----- T2CON Bits ---------------------------------------------------------
198 //----- SSPCON Bits --------------------------------------------------------
201 //----- CCP1CON Bits -------------------------------------------------------
204 //----- RCSTA Bits ---------------------------------------------------------
207 //----- CCP2CON Bits -------------------------------------------------------
210 //----- ADCON0 Bits --------------------------------------------------------
213 //----- OPTION_REG Bits ----------------------------------------------------
216 //----- PIE1 Bits ----------------------------------------------------------
219 //----- PIE2 Bits ----------------------------------------------------------
222 //----- PCON Bits ----------------------------------------------------------
225 //----- SSPCON2 Bits --------------------------------------------------------
228 //----- SSPSTAT Bits -------------------------------------------------------
231 //----- TXSTA Bits ---------------------------------------------------------
234 //----- REFCON Bits --------------------------------------------------------
237 //----- LVDCON Bits --------------------------------------------------------
240 //----- ADCON1 Bits --------------------------------------------------------
243 //==========================================================================
247 //==========================================================================
250 // __BADRAM H'08'-H'09'
251 // __BADRAM H'88'-H'89', H'8F'-H'90', H'95'-H'97', H'9A', H'9D'
252 // __BADRAM H'105', H'107'-H'109', H'10C'-H'11F'
253 // __BADRAM H'185', H'187'-H'189', H'18C'-H'1EF'
255 //==========================================================================
257 // Configuration Bits
259 //==========================================================================
261 #define _BODEN_ON 0x3FFF
262 #define _BODEN_OFF 0x3FBF
263 #define _CP_ALL 0x0CCF
264 #define _CP_75 0x1DDF
265 #define _CP_50 0x2EEF
266 #define _CP_OFF 0x3FFF
267 #define _VBOR_25 0x3FFF
268 #define _VBOR_27 0x3BFF
269 #define _VBOR_42 0x37FF
270 #define _VBOR_45 0x33FF
271 #define _PWRTE_OFF 0x3FFF
272 #define _PWRTE_ON 0x3FF7
273 #define _WDT_ON 0x3FFF
274 #define _WDT_OFF 0x3FFB
275 #define _LP_OSC 0x3FFC
276 #define _XT_OSC 0x3FFD
277 #define _HS_OSC 0x3FFE
278 #define _RC_OSC 0x3FFF
282 // ----- ADCON0 bits --------------------
285 unsigned char ADON:1;
286 unsigned char CHS3:1;
288 unsigned char CHS0:1;
289 unsigned char CHS1:1;
290 unsigned char CHS2:1;
291 unsigned char ADCS0:1;
292 unsigned char ADCS1:1;
297 unsigned char NOT_DONE:1;
307 unsigned char GO_DONE:1;
315 extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits;
317 #ifndef NO_BIT_DEFINES
318 #define ADON ADCON0_bits.ADON
319 #define CHS3 ADCON0_bits.CHS3
320 #define GO ADCON0_bits.GO
321 #define NOT_DONE ADCON0_bits.NOT_DONE
322 #define GO_DONE ADCON0_bits.GO_DONE
323 #define CHS0 ADCON0_bits.CHS0
324 #define CHS1 ADCON0_bits.CHS1
325 #define CHS2 ADCON0_bits.CHS2
326 #define ADCS0 ADCON0_bits.ADCS0
327 #define ADCS1 ADCON0_bits.ADCS1
328 #endif /* NO_BIT_DEFINES */
330 // ----- ADCON1 bits --------------------
333 unsigned char PCFG0:1;
334 unsigned char PCFG1:1;
335 unsigned char PCFG2:1;
336 unsigned char PCFG3:1;
337 unsigned char VCFG0:1;
338 unsigned char VCFG1:1;
339 unsigned char VCFG2:1;
340 unsigned char ADFM:1;
343 extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits;
345 #ifndef NO_BIT_DEFINES
346 #define PCFG0 ADCON1_bits.PCFG0
347 #define PCFG1 ADCON1_bits.PCFG1
348 #define PCFG2 ADCON1_bits.PCFG2
349 #define PCFG3 ADCON1_bits.PCFG3
350 #define VCFG0 ADCON1_bits.VCFG0
351 #define VCFG1 ADCON1_bits.VCFG1
352 #define VCFG2 ADCON1_bits.VCFG2
353 #define ADFM ADCON1_bits.ADFM
354 #endif /* NO_BIT_DEFINES */
356 // ----- CCP1CON bits --------------------
359 unsigned char CCP1M0:1;
360 unsigned char CCP1M1:1;
361 unsigned char CCP1M2:1;
362 unsigned char CCP1M3:1;
363 unsigned char CCP1Y:1;
364 unsigned char CCP1X:1;
369 extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits;
371 #ifndef NO_BIT_DEFINES
372 #define CCP1M0 CCP1CON_bits.CCP1M0
373 #define CCP1M1 CCP1CON_bits.CCP1M1
374 #define CCP1M2 CCP1CON_bits.CCP1M2
375 #define CCP1M3 CCP1CON_bits.CCP1M3
376 #define CCP1Y CCP1CON_bits.CCP1Y
377 #define CCP1X CCP1CON_bits.CCP1X
378 #endif /* NO_BIT_DEFINES */
380 // ----- CCP2CON bits --------------------
383 unsigned char CCP2M0:1;
384 unsigned char CCP2M1:1;
385 unsigned char CCP2M2:1;
386 unsigned char CCP2M3:1;
387 unsigned char CCP2Y:1;
388 unsigned char CCP2X:1;
393 extern volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits;
395 #ifndef NO_BIT_DEFINES
396 #define CCP2M0 CCP2CON_bits.CCP2M0
397 #define CCP2M1 CCP2CON_bits.CCP2M1
398 #define CCP2M2 CCP2CON_bits.CCP2M2
399 #define CCP2M3 CCP2CON_bits.CCP2M3
400 #define CCP2Y CCP2CON_bits.CCP2Y
401 #define CCP2X CCP2CON_bits.CCP2X
402 #endif /* NO_BIT_DEFINES */
404 // ----- INTCON bits --------------------
407 unsigned char RBIF:1;
408 unsigned char INTF:1;
409 unsigned char T0IF:1;
410 unsigned char RBIE:1;
411 unsigned char INTE:1;
412 unsigned char T0IE:1;
413 unsigned char PEIE:1;
417 extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits;
419 #ifndef NO_BIT_DEFINES
420 #define RBIF INTCON_bits.RBIF
421 #define INTF INTCON_bits.INTF
422 #define T0IF INTCON_bits.T0IF
423 #define RBIE INTCON_bits.RBIE
424 #define INTE INTCON_bits.INTE
425 #define T0IE INTCON_bits.T0IE
426 #define PEIE INTCON_bits.PEIE
427 #define GIE INTCON_bits.GIE
428 #endif /* NO_BIT_DEFINES */
430 // ----- LVDCON bits --------------------
437 unsigned char LVDEN:1;
438 unsigned char BGST:1;
443 extern volatile __LVDCON_bits_t __at(LVDCON_ADDR) LVDCON_bits;
445 #ifndef NO_BIT_DEFINES
446 #define LV0 LVDCON_bits.LV0
447 #define LV1 LVDCON_bits.LV1
448 #define LV2 LVDCON_bits.LV2
449 #define LV3 LVDCON_bits.LV3
450 #define LVDEN LVDCON_bits.LVDEN
451 #define BGST LVDCON_bits.BGST
452 #endif /* NO_BIT_DEFINES */
454 // ----- OPTION_REG bits --------------------
461 unsigned char T0SE:1;
462 unsigned char T0CS:1;
463 unsigned char INTEDG:1;
464 unsigned char NOT_RBPU:1;
466 } __OPTION_REG_bits_t;
467 extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits;
469 #ifndef NO_BIT_DEFINES
470 #define PS0 OPTION_REG_bits.PS0
471 #define PS1 OPTION_REG_bits.PS1
472 #define PS2 OPTION_REG_bits.PS2
473 #define PSA OPTION_REG_bits.PSA
474 #define T0SE OPTION_REG_bits.T0SE
475 #define T0CS OPTION_REG_bits.T0CS
476 #define INTEDG OPTION_REG_bits.INTEDG
477 #define NOT_RBPU OPTION_REG_bits.NOT_RBPU
478 #endif /* NO_BIT_DEFINES */
480 // ----- PCON bits --------------------
483 unsigned char NOT_BO:1;
484 unsigned char NOT_POR:1;
493 unsigned char NOT_BOR:1;
503 extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits;
505 #ifndef NO_BIT_DEFINES
506 #define NOT_BO PCON_bits.NOT_BO
507 #define NOT_BOR PCON_bits.NOT_BOR
508 #define NOT_POR PCON_bits.NOT_POR
509 #endif /* NO_BIT_DEFINES */
511 // ----- PIE1 bits --------------------
514 unsigned char TMR1IE:1;
515 unsigned char TMR2IE:1;
516 unsigned char CCP1IE:1;
517 unsigned char SSPIE:1;
518 unsigned char TXIE:1;
519 unsigned char RCIE:1;
520 unsigned char ADIE:1;
524 extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits;
526 #ifndef NO_BIT_DEFINES
527 #define TMR1IE PIE1_bits.TMR1IE
528 #define TMR2IE PIE1_bits.TMR2IE
529 #define CCP1IE PIE1_bits.CCP1IE
530 #define SSPIE PIE1_bits.SSPIE
531 #define TXIE PIE1_bits.TXIE
532 #define RCIE PIE1_bits.RCIE
533 #define ADIE PIE1_bits.ADIE
534 #endif /* NO_BIT_DEFINES */
536 // ----- PIE2 bits --------------------
539 unsigned char CCP2IE:1;
542 unsigned char BCLIE:1;
546 unsigned char LVDIE:1;
549 extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits;
551 #ifndef NO_BIT_DEFINES
552 #define CCP2IE PIE2_bits.CCP2IE
553 #define BCLIE PIE2_bits.BCLIE
554 #define LVDIE PIE2_bits.LVDIE
555 #endif /* NO_BIT_DEFINES */
557 // ----- PIR1 bits --------------------
560 unsigned char TMR1IF:1;
561 unsigned char TMR2IF:1;
562 unsigned char CCP1IF:1;
563 unsigned char SSPIF:1;
564 unsigned char TXIF:1;
565 unsigned char RCIF:1;
566 unsigned char ADIF:1;
570 extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits;
572 #ifndef NO_BIT_DEFINES
573 #define TMR1IF PIR1_bits.TMR1IF
574 #define TMR2IF PIR1_bits.TMR2IF
575 #define CCP1IF PIR1_bits.CCP1IF
576 #define SSPIF PIR1_bits.SSPIF
577 #define TXIF PIR1_bits.TXIF
578 #define RCIF PIR1_bits.RCIF
579 #define ADIF PIR1_bits.ADIF
580 #endif /* NO_BIT_DEFINES */
582 // ----- PIR2 bits --------------------
585 unsigned char CCP2IF:1;
588 unsigned char BCLIF:1;
592 unsigned char LVDIF:1;
595 extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits;
597 #ifndef NO_BIT_DEFINES
598 #define CCP2IF PIR2_bits.CCP2IF
599 #define BCLIF PIR2_bits.BCLIF
600 #define LVDIF PIR2_bits.LVDIF
601 #endif /* NO_BIT_DEFINES */
603 // ----- PORTA bits --------------------
616 extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits;
618 #ifndef NO_BIT_DEFINES
619 #define RA0 PORTA_bits.RA0
620 #define RA1 PORTA_bits.RA1
621 #define RA2 PORTA_bits.RA2
622 #define RA3 PORTA_bits.RA3
623 #define RA4 PORTA_bits.RA4
624 #define RA5 PORTA_bits.RA5
625 #endif /* NO_BIT_DEFINES */
627 // ----- PORTB bits --------------------
640 extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits;
642 #ifndef NO_BIT_DEFINES
643 #define RB0 PORTB_bits.RB0
644 #define RB1 PORTB_bits.RB1
645 #define RB2 PORTB_bits.RB2
646 #define RB3 PORTB_bits.RB3
647 #define RB4 PORTB_bits.RB4
648 #define RB5 PORTB_bits.RB5
649 #define RB6 PORTB_bits.RB6
650 #define RB7 PORTB_bits.RB7
651 #endif /* NO_BIT_DEFINES */
653 // ----- PORTC bits --------------------
666 extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits;
668 #ifndef NO_BIT_DEFINES
669 #define RC0 PORTC_bits.RC0
670 #define RC1 PORTC_bits.RC1
671 #define RC2 PORTC_bits.RC2
672 #define RC3 PORTC_bits.RC3
673 #define RC4 PORTC_bits.RC4
674 #define RC5 PORTC_bits.RC5
675 #define RC6 PORTC_bits.RC6
676 #define RC7 PORTC_bits.RC7
677 #endif /* NO_BIT_DEFINES */
679 // ----- RCSTA bits --------------------
682 unsigned char RX9D:1;
683 unsigned char OERR:1;
684 unsigned char FERR:1;
685 unsigned char ADDEN:1;
686 unsigned char CREN:1;
687 unsigned char SREN:1;
689 unsigned char SPEN:1;
692 unsigned char RCD8:1;
708 unsigned char NOT_RC8:1;
718 unsigned char RC8_9:1;
722 extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits;
724 #ifndef NO_BIT_DEFINES
725 #define RX9D RCSTA_bits.RX9D
726 #define RCD8 RCSTA_bits.RCD8
727 #define OERR RCSTA_bits.OERR
728 #define FERR RCSTA_bits.FERR
729 #define ADDEN RCSTA_bits.ADDEN
730 #define CREN RCSTA_bits.CREN
731 #define SREN RCSTA_bits.SREN
732 #define RX9 RCSTA_bits.RX9
733 #define RC9 RCSTA_bits.RC9
734 #define NOT_RC8 RCSTA_bits.NOT_RC8
735 #define RC8_9 RCSTA_bits.RC8_9
736 #define SPEN RCSTA_bits.SPEN
737 #endif /* NO_BIT_DEFINES */
739 // ----- REFCON bits --------------------
746 unsigned char VRLOEN:1;
747 unsigned char VRHOEN:1;
748 unsigned char VRLEN:1;
749 unsigned char VRHEN:1;
752 extern volatile __REFCON_bits_t __at(REFCON_ADDR) REFCON_bits;
754 #ifndef NO_BIT_DEFINES
755 #define VRLOEN REFCON_bits.VRLOEN
756 #define VRHOEN REFCON_bits.VRHOEN
757 #define VRLEN REFCON_bits.VRLEN
758 #define VRHEN REFCON_bits.VRHEN
759 #endif /* NO_BIT_DEFINES */
761 // ----- SSPCON bits --------------------
764 unsigned char SSPM0:1;
765 unsigned char SSPM1:1;
766 unsigned char SSPM2:1;
767 unsigned char SSPM3:1;
769 unsigned char SSPEN:1;
770 unsigned char SSPOV:1;
771 unsigned char WCOL:1;
774 extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits;
776 #ifndef NO_BIT_DEFINES
777 #define SSPM0 SSPCON_bits.SSPM0
778 #define SSPM1 SSPCON_bits.SSPM1
779 #define SSPM2 SSPCON_bits.SSPM2
780 #define SSPM3 SSPCON_bits.SSPM3
781 #define CKP SSPCON_bits.CKP
782 #define SSPEN SSPCON_bits.SSPEN
783 #define SSPOV SSPCON_bits.SSPOV
784 #define WCOL SSPCON_bits.WCOL
785 #endif /* NO_BIT_DEFINES */
787 // ----- SSPCON2 bits --------------------
791 unsigned char RSEN:1;
793 unsigned char RCEN:1;
794 unsigned char ACKEN:1;
795 unsigned char ACKDT:1;
796 unsigned char ACKSTAT:1;
797 unsigned char GCEN:1;
800 extern volatile __SSPCON2_bits_t __at(SSPCON2_ADDR) SSPCON2_bits;
802 #ifndef NO_BIT_DEFINES
803 #define SEN SSPCON2_bits.SEN
804 #define RSEN SSPCON2_bits.RSEN
805 #define PEN SSPCON2_bits.PEN
806 #define RCEN SSPCON2_bits.RCEN
807 #define ACKEN SSPCON2_bits.ACKEN
808 #define ACKDT SSPCON2_bits.ACKDT
809 #define ACKSTAT SSPCON2_bits.ACKSTAT
810 #define GCEN SSPCON2_bits.GCEN
811 #endif /* NO_BIT_DEFINES */
813 // ----- SSPSTAT bits --------------------
828 unsigned char I2C_READ:1;
829 unsigned char I2C_START:1;
830 unsigned char I2C_STOP:1;
831 unsigned char I2C_DATA:1;
838 unsigned char NOT_W:1;
841 unsigned char NOT_A:1;
848 unsigned char NOT_WRITE:1;
851 unsigned char NOT_ADDRESS:1;
868 unsigned char READ_WRITE:1;
871 unsigned char DATA_ADDRESS:1;
876 extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits;
878 #ifndef NO_BIT_DEFINES
879 #define BF SSPSTAT_bits.BF
880 #define UA SSPSTAT_bits.UA
881 #define R SSPSTAT_bits.R
882 #define I2C_READ SSPSTAT_bits.I2C_READ
883 #define NOT_W SSPSTAT_bits.NOT_W
884 #define NOT_WRITE SSPSTAT_bits.NOT_WRITE
885 #define R_W SSPSTAT_bits.R_W
886 #define READ_WRITE SSPSTAT_bits.READ_WRITE
887 #define S SSPSTAT_bits.S
888 #define I2C_START SSPSTAT_bits.I2C_START
889 #define P SSPSTAT_bits.P
890 #define I2C_STOP SSPSTAT_bits.I2C_STOP
891 #define D SSPSTAT_bits.D
892 #define I2C_DATA SSPSTAT_bits.I2C_DATA
893 #define NOT_A SSPSTAT_bits.NOT_A
894 #define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS
895 #define D_A SSPSTAT_bits.D_A
896 #define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS
897 #define CKE SSPSTAT_bits.CKE
898 #define SMP SSPSTAT_bits.SMP
899 #endif /* NO_BIT_DEFINES */
901 // ----- STATUS bits --------------------
907 unsigned char NOT_PD:1;
908 unsigned char NOT_TO:1;
914 extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits;
916 #ifndef NO_BIT_DEFINES
917 #define C STATUS_bits.C
918 #define DC STATUS_bits.DC
919 #define Z STATUS_bits.Z
920 #define NOT_PD STATUS_bits.NOT_PD
921 #define NOT_TO STATUS_bits.NOT_TO
922 #define RP0 STATUS_bits.RP0
923 #define RP1 STATUS_bits.RP1
924 #define IRP STATUS_bits.IRP
925 #endif /* NO_BIT_DEFINES */
927 // ----- T1CON bits --------------------
930 unsigned char TMR1ON:1;
931 unsigned char TMR1CS:1;
932 unsigned char NOT_T1SYNC:1;
933 unsigned char T1OSCEN:1;
934 unsigned char T1CKPS0:1;
935 unsigned char T1CKPS1:1;
942 unsigned char T1INSYNC:1;
952 unsigned char T1SYNC:1;
960 extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits;
962 #ifndef NO_BIT_DEFINES
963 #define TMR1ON T1CON_bits.TMR1ON
964 #define TMR1CS T1CON_bits.TMR1CS
965 #define NOT_T1SYNC T1CON_bits.NOT_T1SYNC
966 #define T1INSYNC T1CON_bits.T1INSYNC
967 #define T1SYNC T1CON_bits.T1SYNC
968 #define T1OSCEN T1CON_bits.T1OSCEN
969 #define T1CKPS0 T1CON_bits.T1CKPS0
970 #define T1CKPS1 T1CON_bits.T1CKPS1
971 #endif /* NO_BIT_DEFINES */
973 // ----- T2CON bits --------------------
976 unsigned char T2CKPS0:1;
977 unsigned char T2CKPS1:1;
978 unsigned char TMR2ON:1;
979 unsigned char TOUTPS0:1;
980 unsigned char TOUTPS1:1;
981 unsigned char TOUTPS2:1;
982 unsigned char TOUTPS3:1;
986 extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits;
988 #ifndef NO_BIT_DEFINES
989 #define T2CKPS0 T2CON_bits.T2CKPS0
990 #define T2CKPS1 T2CON_bits.T2CKPS1
991 #define TMR2ON T2CON_bits.TMR2ON
992 #define TOUTPS0 T2CON_bits.TOUTPS0
993 #define TOUTPS1 T2CON_bits.TOUTPS1
994 #define TOUTPS2 T2CON_bits.TOUTPS2
995 #define TOUTPS3 T2CON_bits.TOUTPS3
996 #endif /* NO_BIT_DEFINES */
998 // ----- TRISA bits --------------------
1001 unsigned char TRISA0:1;
1002 unsigned char TRISA1:1;
1003 unsigned char TRISA2:1;
1004 unsigned char TRISA3:1;
1005 unsigned char TRISA4:1;
1006 unsigned char TRISA5:1;
1011 extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits;
1013 #ifndef NO_BIT_DEFINES
1014 #define TRISA0 TRISA_bits.TRISA0
1015 #define TRISA1 TRISA_bits.TRISA1
1016 #define TRISA2 TRISA_bits.TRISA2
1017 #define TRISA3 TRISA_bits.TRISA3
1018 #define TRISA4 TRISA_bits.TRISA4
1019 #define TRISA5 TRISA_bits.TRISA5
1020 #endif /* NO_BIT_DEFINES */
1022 // ----- TRISB bits --------------------
1025 unsigned char TRISB0:1;
1026 unsigned char TRISB1:1;
1027 unsigned char TRISB2:1;
1028 unsigned char TRISB3:1;
1029 unsigned char TRISB4:1;
1030 unsigned char TRISB5:1;
1031 unsigned char TRISB6:1;
1032 unsigned char TRISB7:1;
1035 extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits;
1037 #ifndef NO_BIT_DEFINES
1038 #define TRISB0 TRISB_bits.TRISB0
1039 #define TRISB1 TRISB_bits.TRISB1
1040 #define TRISB2 TRISB_bits.TRISB2
1041 #define TRISB3 TRISB_bits.TRISB3
1042 #define TRISB4 TRISB_bits.TRISB4
1043 #define TRISB5 TRISB_bits.TRISB5
1044 #define TRISB6 TRISB_bits.TRISB6
1045 #define TRISB7 TRISB_bits.TRISB7
1046 #endif /* NO_BIT_DEFINES */
1048 // ----- TRISC bits --------------------
1051 unsigned char TRISC0:1;
1052 unsigned char TRISC1:1;
1053 unsigned char TRISC2:1;
1054 unsigned char TRISC3:1;
1055 unsigned char TRISC4:1;
1056 unsigned char TRISC5:1;
1057 unsigned char TRISC6:1;
1058 unsigned char TRISC7:1;
1061 extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits;
1063 #ifndef NO_BIT_DEFINES
1064 #define TRISC0 TRISC_bits.TRISC0
1065 #define TRISC1 TRISC_bits.TRISC1
1066 #define TRISC2 TRISC_bits.TRISC2
1067 #define TRISC3 TRISC_bits.TRISC3
1068 #define TRISC4 TRISC_bits.TRISC4
1069 #define TRISC5 TRISC_bits.TRISC5
1070 #define TRISC6 TRISC_bits.TRISC6
1071 #define TRISC7 TRISC_bits.TRISC7
1072 #endif /* NO_BIT_DEFINES */
1074 // ----- TXSTA bits --------------------
1077 unsigned char TX9D:1;
1078 unsigned char TRMT:1;
1079 unsigned char BRGH:1;
1081 unsigned char SYNC:1;
1082 unsigned char TXEN:1;
1083 unsigned char TX9:1;
1084 unsigned char CSRC:1;
1087 unsigned char TXD8:1;
1093 unsigned char NOT_TX8:1;
1103 unsigned char TX8_9:1;
1107 extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits;
1109 #ifndef NO_BIT_DEFINES
1110 #define TX9D TXSTA_bits.TX9D
1111 #define TXD8 TXSTA_bits.TXD8
1112 #define TRMT TXSTA_bits.TRMT
1113 #define BRGH TXSTA_bits.BRGH
1114 #define SYNC TXSTA_bits.SYNC
1115 #define TXEN TXSTA_bits.TXEN
1116 #define TX9 TXSTA_bits.TX9
1117 #define NOT_TX8 TXSTA_bits.NOT_TX8
1118 #define TX8_9 TXSTA_bits.TX8_9
1119 #define CSRC TXSTA_bits.CSRC
1120 #endif /* NO_BIT_DEFINES */