2 // Register Declarations for Microchip 16C773 Processor
5 // This header file was automatically generated by:
9 // Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved
11 // SDCC is licensed under the GNU Public license (GPL) v2. Note that
12 // this license covers the code to the compiler and other executables,
13 // but explicitly does not cover any code or objects generated by sdcc.
14 // We have not yet decided on a license for the run time libraries, but
15 // it will not put any requirements on code linked against it. See:
17 // http://www.gnu.org/copyleft/gpl/html
19 // See http://sdcc.sourceforge.net/ for the latest information on sdcc.
26 // Register addresses.
28 #define INDF_ADDR 0x0000
29 #define TMR0_ADDR 0x0001
30 #define PCL_ADDR 0x0002
31 #define STATUS_ADDR 0x0003
32 #define FSR_ADDR 0x0004
33 #define PORTA_ADDR 0x0005
34 #define PORTB_ADDR 0x0006
35 #define PORTC_ADDR 0x0007
36 #define PCLATH_ADDR 0x000A
37 #define INTCON_ADDR 0x000B
38 #define PIR1_ADDR 0x000C
39 #define PIR2_ADDR 0x000D
40 #define TMR1L_ADDR 0x000E
41 #define TMR1H_ADDR 0x000F
42 #define T1CON_ADDR 0x0010
43 #define TMR2_ADDR 0x0011
44 #define T2CON_ADDR 0x0012
45 #define SSPBUF_ADDR 0x0013
46 #define SSPCON_ADDR 0x0014
47 #define CCPR1L_ADDR 0x0015
48 #define CCPR1H_ADDR 0x0016
49 #define CCP1CON_ADDR 0x0017
50 #define RCSTA_ADDR 0x0018
51 #define TXREG_ADDR 0x0019
52 #define RCREG_ADDR 0x001A
53 #define CCPR2L_ADDR 0x001B
54 #define CCPR2H_ADDR 0x001C
55 #define CCP2CON_ADDR 0x001D
56 #define ADRESH_ADDR 0x001E
57 #define ADCON0_ADDR 0x001F
58 #define OPTION_REG_ADDR 0x0081
59 #define TRISA_ADDR 0x0085
60 #define TRISB_ADDR 0x0086
61 #define TRISC_ADDR 0x0087
62 #define PIE1_ADDR 0x008C
63 #define PIE2_ADDR 0x008D
64 #define PCON_ADDR 0x008E
65 #define SSPCON2_ADDR 0x0091
66 #define PR2_ADDR 0x0092
67 #define SSPADD_ADDR 0x0093
68 #define SSPSTAT_ADDR 0x0094
69 #define TXSTA_ADDR 0x0098
70 #define SPBRG_ADDR 0x0099
71 #define REFCON_ADDR 0x009B
72 #define LVDCON_ADDR 0x009C
73 #define ADRESL_ADDR 0x009E
74 #define ADCON1_ADDR 0x009F
77 // Memory organization.
83 // P16C773.INC Standard Header File, Version 1.01 Microchip Technology, Inc.
86 // This header file defines configurations, registers, and other useful bits of
87 // information for the PIC16C773 microcontroller. These names are taken to match
88 // the data sheets as closely as possible.
90 // Note that the processor must be selected before this file is
91 // included. The processor may be selected the following ways:
93 // 1. Command line switch:
94 // C:\ MPASM MYFILE.ASM /PIC16C773
95 // 2. LIST directive in the source file
97 // 3. Processor Type entry in the MPASM full-screen interface
99 //==========================================================================
103 //==========================================================================
107 //1.00 08/07/98 Initial Release
108 //1.01 25Jan99 Fixed LVVx bits
110 //==========================================================================
114 //==========================================================================
117 // MESSG "Processor-header file mismatch. Verify selected processor."
120 //==========================================================================
122 // Register Definitions
124 //==========================================================================
129 //----- Register Files------------------------------------------------------
131 extern __data __at (INDF_ADDR) volatile char INDF;
132 extern __sfr __at (TMR0_ADDR) TMR0;
133 extern __data __at (PCL_ADDR) volatile char PCL;
134 extern __sfr __at (STATUS_ADDR) STATUS;
135 extern __sfr __at (FSR_ADDR) FSR;
136 extern __sfr __at (PORTA_ADDR) PORTA;
137 extern __sfr __at (PORTB_ADDR) PORTB;
138 extern __sfr __at (PORTC_ADDR) PORTC;
139 extern __sfr __at (PCLATH_ADDR) PCLATH;
140 extern __sfr __at (INTCON_ADDR) INTCON;
141 extern __sfr __at (PIR1_ADDR) PIR1;
142 extern __sfr __at (PIR2_ADDR) PIR2;
143 extern __sfr __at (TMR1L_ADDR) TMR1L;
144 extern __sfr __at (TMR1H_ADDR) TMR1H;
145 extern __sfr __at (T1CON_ADDR) T1CON;
146 extern __sfr __at (TMR2_ADDR) TMR2;
147 extern __sfr __at (T2CON_ADDR) T2CON;
148 extern __sfr __at (SSPBUF_ADDR) SSPBUF;
149 extern __sfr __at (SSPCON_ADDR) SSPCON;
150 extern __sfr __at (CCPR1L_ADDR) CCPR1L;
151 extern __sfr __at (CCPR1H_ADDR) CCPR1H;
152 extern __sfr __at (CCP1CON_ADDR) CCP1CON;
153 extern __sfr __at (RCSTA_ADDR) RCSTA;
154 extern __sfr __at (TXREG_ADDR) TXREG;
155 extern __sfr __at (RCREG_ADDR) RCREG;
156 extern __sfr __at (CCPR2L_ADDR) CCPR2L;
157 extern __sfr __at (CCPR2H_ADDR) CCPR2H;
158 extern __sfr __at (CCP2CON_ADDR) CCP2CON;
159 extern __sfr __at (ADRESH_ADDR) ADRESH;
160 extern __sfr __at (ADCON0_ADDR) ADCON0;
162 extern __sfr __at (OPTION_REG_ADDR) OPTION_REG;
163 extern __sfr __at (TRISA_ADDR) TRISA;
164 extern __sfr __at (TRISB_ADDR) TRISB;
165 extern __sfr __at (TRISC_ADDR) TRISC;
166 extern __sfr __at (PIE1_ADDR) PIE1;
167 extern __sfr __at (PIE2_ADDR) PIE2;
168 extern __sfr __at (PCON_ADDR) PCON;
169 extern __sfr __at (SSPCON2_ADDR) SSPCON2;
170 extern __sfr __at (PR2_ADDR) PR2;
171 extern __sfr __at (SSPADD_ADDR) SSPADD;
172 extern __sfr __at (SSPSTAT_ADDR) SSPSTAT;
173 extern __sfr __at (TXSTA_ADDR) TXSTA;
174 extern __sfr __at (SPBRG_ADDR) SPBRG;
175 extern __sfr __at (REFCON_ADDR) REFCON;
176 extern __sfr __at (LVDCON_ADDR) LVDCON;
177 extern __sfr __at (ADRESL_ADDR) ADRESL;
178 extern __sfr __at (ADCON1_ADDR) ADCON1;
180 //----- STATUS Bits --------------------------------------------------------
183 //----- INTCON Bits --------------------------------------------------------
186 //----- PIR1 Bits ----------------------------------------------------------
189 //----- PIR2 Bits ----------------------------------------------------------
192 //----- T1CON Bits ---------------------------------------------------------
195 //----- T2CON Bits ---------------------------------------------------------
198 //----- SSPCON Bits --------------------------------------------------------
201 //----- CCP1CON Bits -------------------------------------------------------
204 //----- RCSTA Bits ---------------------------------------------------------
207 //----- CCP2CON Bits -------------------------------------------------------
210 //----- ADCON0 Bits --------------------------------------------------------
213 //----- OPTION Bits ----------------------------------------------------
216 //----- PIE1 Bits ----------------------------------------------------------
219 //----- PIE2 Bits ----------------------------------------------------------
222 //----- PCON Bits ----------------------------------------------------------
225 //----- SSPCON2 Bits --------------------------------------------------------
228 //----- SSPSTAT Bits -------------------------------------------------------
231 //----- TXSTA Bits ---------------------------------------------------------
234 //----- REFCON Bits --------------------------------------------------------
237 //----- LVDCON Bits --------------------------------------------------------
240 //----- ADCON1 Bits --------------------------------------------------------
243 //==========================================================================
247 //==========================================================================
250 // __BADRAM H'08'-H'09'
251 // __BADRAM H'88'-H'89', H'8F'-H'90', H'95'-H'97', H'9A', H'9D'
252 // __BADRAM H'105', H'107'-H'109', H'10C'-H'11F'
253 // __BADRAM H'185', H'187'-H'189', H'18C'-H'1EF'
255 //==========================================================================
257 // Configuration Bits
259 //==========================================================================
261 #define _BODEN_ON 0x3FFF
262 #define _BODEN_OFF 0x3FBF
263 #define _CP_ALL 0x0CCF
264 #define _CP_75 0x1DDF
265 #define _CP_50 0x2EEF
266 #define _CP_OFF 0x3FFF
267 #define _VBOR_25 0x3FFF
268 #define _VBOR_27 0x3BFF
269 #define _VBOR_42 0x37FF
270 #define _VBOR_45 0x33FF
271 #define _PWRTE_OFF 0x3FFF
272 #define _PWRTE_ON 0x3FF7
273 #define _WDT_ON 0x3FFF
274 #define _WDT_OFF 0x3FFB
275 #define _LP_OSC 0x3FFC
276 #define _XT_OSC 0x3FFD
277 #define _HS_OSC 0x3FFE
278 #define _RC_OSC 0x3FFF
282 // ----- ADCON0 bits --------------------
285 unsigned char ADON:1;
286 unsigned char CHS3:1;
288 unsigned char CHS0:1;
289 unsigned char CHS1:1;
290 unsigned char CHS2:1;
291 unsigned char ADCS0:1;
292 unsigned char ADCS1:1;
297 unsigned char NOT_DONE:1;
307 unsigned char GO_DONE:1;
315 extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits;
317 #define ADON ADCON0_bits.ADON
318 #define CHS3 ADCON0_bits.CHS3
319 #define GO ADCON0_bits.GO
320 #define NOT_DONE ADCON0_bits.NOT_DONE
321 #define GO_DONE ADCON0_bits.GO_DONE
322 #define CHS0 ADCON0_bits.CHS0
323 #define CHS1 ADCON0_bits.CHS1
324 #define CHS2 ADCON0_bits.CHS2
325 #define ADCS0 ADCON0_bits.ADCS0
326 #define ADCS1 ADCON0_bits.ADCS1
328 // ----- ADCON1 bits --------------------
331 unsigned char PCFG0:1;
332 unsigned char PCFG1:1;
333 unsigned char PCFG2:1;
334 unsigned char PCFG3:1;
335 unsigned char VCFG0:1;
336 unsigned char VCFG1:1;
337 unsigned char VCFG2:1;
338 unsigned char ADFM:1;
341 extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits;
343 #define PCFG0 ADCON1_bits.PCFG0
344 #define PCFG1 ADCON1_bits.PCFG1
345 #define PCFG2 ADCON1_bits.PCFG2
346 #define PCFG3 ADCON1_bits.PCFG3
347 #define VCFG0 ADCON1_bits.VCFG0
348 #define VCFG1 ADCON1_bits.VCFG1
349 #define VCFG2 ADCON1_bits.VCFG2
350 #define ADFM ADCON1_bits.ADFM
352 // ----- CCP1CON bits --------------------
355 unsigned char CCP1M0:1;
356 unsigned char CCP1M1:1;
357 unsigned char CCP1M2:1;
358 unsigned char CCP1M3:1;
359 unsigned char CCP1Y:1;
360 unsigned char CCP1X:1;
365 extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits;
367 #define CCP1M0 CCP1CON_bits.CCP1M0
368 #define CCP1M1 CCP1CON_bits.CCP1M1
369 #define CCP1M2 CCP1CON_bits.CCP1M2
370 #define CCP1M3 CCP1CON_bits.CCP1M3
371 #define CCP1Y CCP1CON_bits.CCP1Y
372 #define CCP1X CCP1CON_bits.CCP1X
374 // ----- CCP2CON bits --------------------
377 unsigned char CCP2M0:1;
378 unsigned char CCP2M1:1;
379 unsigned char CCP2M2:1;
380 unsigned char CCP2M3:1;
381 unsigned char CCP2Y:1;
382 unsigned char CCP2X:1;
387 extern volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits;
389 #define CCP2M0 CCP2CON_bits.CCP2M0
390 #define CCP2M1 CCP2CON_bits.CCP2M1
391 #define CCP2M2 CCP2CON_bits.CCP2M2
392 #define CCP2M3 CCP2CON_bits.CCP2M3
393 #define CCP2Y CCP2CON_bits.CCP2Y
394 #define CCP2X CCP2CON_bits.CCP2X
396 // ----- INTCON bits --------------------
399 unsigned char RBIF:1;
400 unsigned char INTF:1;
401 unsigned char T0IF:1;
402 unsigned char RBIE:1;
403 unsigned char INTE:1;
404 unsigned char T0IE:1;
405 unsigned char PEIE:1;
409 extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits;
411 #define RBIF INTCON_bits.RBIF
412 #define INTF INTCON_bits.INTF
413 #define T0IF INTCON_bits.T0IF
414 #define RBIE INTCON_bits.RBIE
415 #define INTE INTCON_bits.INTE
416 #define T0IE INTCON_bits.T0IE
417 #define PEIE INTCON_bits.PEIE
418 #define GIE INTCON_bits.GIE
420 // ----- LVDCON bits --------------------
427 unsigned char LVDEN:1;
428 unsigned char BGST:1;
433 extern volatile __LVDCON_bits_t __at(LVDCON_ADDR) LVDCON_bits;
435 #define LV0 LVDCON_bits.LV0
436 #define LV1 LVDCON_bits.LV1
437 #define LV2 LVDCON_bits.LV2
438 #define LV3 LVDCON_bits.LV3
439 #define LVDEN LVDCON_bits.LVDEN
440 #define BGST LVDCON_bits.BGST
442 // ----- OPTION_REG bits --------------------
449 unsigned char T0SE:1;
450 unsigned char T0CS:1;
451 unsigned char INTEDG:1;
452 unsigned char NOT_RBPU:1;
454 } __OPTION_REG_bits_t;
455 extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits;
457 #define PS0 OPTION_REG_bits.PS0
458 #define PS1 OPTION_REG_bits.PS1
459 #define PS2 OPTION_REG_bits.PS2
460 #define PSA OPTION_REG_bits.PSA
461 #define T0SE OPTION_REG_bits.T0SE
462 #define T0CS OPTION_REG_bits.T0CS
463 #define INTEDG OPTION_REG_bits.INTEDG
464 #define NOT_RBPU OPTION_REG_bits.NOT_RBPU
466 // ----- PCON bits --------------------
469 unsigned char NOT_BO:1;
470 unsigned char NOT_POR:1;
479 unsigned char NOT_BOR:1;
489 extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits;
491 #define NOT_BO PCON_bits.NOT_BO
492 #define NOT_BOR PCON_bits.NOT_BOR
493 #define NOT_POR PCON_bits.NOT_POR
495 // ----- PIE1 bits --------------------
498 unsigned char TMR1IE:1;
499 unsigned char TMR2IE:1;
500 unsigned char CCP1IE:1;
501 unsigned char SSPIE:1;
502 unsigned char TXIE:1;
503 unsigned char RCIE:1;
504 unsigned char ADIE:1;
508 extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits;
510 #define TMR1IE PIE1_bits.TMR1IE
511 #define TMR2IE PIE1_bits.TMR2IE
512 #define CCP1IE PIE1_bits.CCP1IE
513 #define SSPIE PIE1_bits.SSPIE
514 #define TXIE PIE1_bits.TXIE
515 #define RCIE PIE1_bits.RCIE
516 #define ADIE PIE1_bits.ADIE
518 // ----- PIE2 bits --------------------
521 unsigned char CCP2IE:1;
524 unsigned char BCLIE:1;
528 unsigned char LVDIE:1;
531 extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits;
533 #define CCP2IE PIE2_bits.CCP2IE
534 #define BCLIE PIE2_bits.BCLIE
535 #define LVDIE PIE2_bits.LVDIE
537 // ----- PIR1 bits --------------------
540 unsigned char TMR1IF:1;
541 unsigned char TMR2IF:1;
542 unsigned char CCP1IF:1;
543 unsigned char SSPIF:1;
544 unsigned char TXIF:1;
545 unsigned char RCIF:1;
546 unsigned char ADIF:1;
550 extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits;
552 #define TMR1IF PIR1_bits.TMR1IF
553 #define TMR2IF PIR1_bits.TMR2IF
554 #define CCP1IF PIR1_bits.CCP1IF
555 #define SSPIF PIR1_bits.SSPIF
556 #define TXIF PIR1_bits.TXIF
557 #define RCIF PIR1_bits.RCIF
558 #define ADIF PIR1_bits.ADIF
560 // ----- PIR2 bits --------------------
563 unsigned char CCP2IF:1;
566 unsigned char BCLIF:1;
570 unsigned char LVDIF:1;
573 extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits;
575 #define CCP2IF PIR2_bits.CCP2IF
576 #define BCLIF PIR2_bits.BCLIF
577 #define LVDIF PIR2_bits.LVDIF
579 // ----- RCSTA bits --------------------
582 unsigned char RX9D:1;
583 unsigned char OERR:1;
584 unsigned char FERR:1;
585 unsigned char ADDEN:1;
586 unsigned char CREN:1;
587 unsigned char SREN:1;
589 unsigned char SPEN:1;
592 unsigned char RCD8:1;
608 unsigned char NOT_RC8:1;
618 unsigned char RC8_9:1;
622 extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits;
624 #define RX9D RCSTA_bits.RX9D
625 #define RCD8 RCSTA_bits.RCD8
626 #define OERR RCSTA_bits.OERR
627 #define FERR RCSTA_bits.FERR
628 #define ADDEN RCSTA_bits.ADDEN
629 #define CREN RCSTA_bits.CREN
630 #define SREN RCSTA_bits.SREN
631 #define RX9 RCSTA_bits.RX9
632 #define RC9 RCSTA_bits.RC9
633 #define NOT_RC8 RCSTA_bits.NOT_RC8
634 #define RC8_9 RCSTA_bits.RC8_9
635 #define SPEN RCSTA_bits.SPEN
637 // ----- REFCON bits --------------------
644 unsigned char VRLOEN:1;
645 unsigned char VRHOEN:1;
646 unsigned char VRLEN:1;
647 unsigned char VRHEN:1;
650 extern volatile __REFCON_bits_t __at(REFCON_ADDR) REFCON_bits;
652 #define VRLOEN REFCON_bits.VRLOEN
653 #define VRHOEN REFCON_bits.VRHOEN
654 #define VRLEN REFCON_bits.VRLEN
655 #define VRHEN REFCON_bits.VRHEN
657 // ----- SSPCON bits --------------------
660 unsigned char SSPM0:1;
661 unsigned char SSPM1:1;
662 unsigned char SSPM2:1;
663 unsigned char SSPM3:1;
665 unsigned char SSPEN:1;
666 unsigned char SSPOV:1;
667 unsigned char WCOL:1;
670 extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits;
672 #define SSPM0 SSPCON_bits.SSPM0
673 #define SSPM1 SSPCON_bits.SSPM1
674 #define SSPM2 SSPCON_bits.SSPM2
675 #define SSPM3 SSPCON_bits.SSPM3
676 #define CKP SSPCON_bits.CKP
677 #define SSPEN SSPCON_bits.SSPEN
678 #define SSPOV SSPCON_bits.SSPOV
679 #define WCOL SSPCON_bits.WCOL
681 // ----- SSPCON2 bits --------------------
685 unsigned char RSEN:1;
687 unsigned char RCEN:1;
688 unsigned char ACKEN:1;
689 unsigned char ACKDT:1;
690 unsigned char ACKSTAT:1;
691 unsigned char GCEN:1;
694 extern volatile __SSPCON2_bits_t __at(SSPCON2_ADDR) SSPCON2_bits;
696 #define SEN SSPCON2_bits.SEN
697 #define RSEN SSPCON2_bits.RSEN
698 #define PEN SSPCON2_bits.PEN
699 #define RCEN SSPCON2_bits.RCEN
700 #define ACKEN SSPCON2_bits.ACKEN
701 #define ACKDT SSPCON2_bits.ACKDT
702 #define ACKSTAT SSPCON2_bits.ACKSTAT
703 #define GCEN SSPCON2_bits.GCEN
705 // ----- SSPSTAT bits --------------------
720 unsigned char I2C_READ:1;
721 unsigned char I2C_START:1;
722 unsigned char I2C_STOP:1;
723 unsigned char I2C_DATA:1;
730 unsigned char NOT_W:1;
733 unsigned char NOT_A:1;
740 unsigned char NOT_WRITE:1;
743 unsigned char NOT_ADDRESS:1;
760 unsigned char READ_WRITE:1;
763 unsigned char DATA_ADDRESS:1;
768 extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits;
770 #define BF SSPSTAT_bits.BF
771 #define UA SSPSTAT_bits.UA
772 #define R SSPSTAT_bits.R
773 #define I2C_READ SSPSTAT_bits.I2C_READ
774 #define NOT_W SSPSTAT_bits.NOT_W
775 #define NOT_WRITE SSPSTAT_bits.NOT_WRITE
776 #define R_W SSPSTAT_bits.R_W
777 #define READ_WRITE SSPSTAT_bits.READ_WRITE
778 #define S SSPSTAT_bits.S
779 #define I2C_START SSPSTAT_bits.I2C_START
780 #define P SSPSTAT_bits.P
781 #define I2C_STOP SSPSTAT_bits.I2C_STOP
782 #define D SSPSTAT_bits.D
783 #define I2C_DATA SSPSTAT_bits.I2C_DATA
784 #define NOT_A SSPSTAT_bits.NOT_A
785 #define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS
786 #define D_A SSPSTAT_bits.D_A
787 #define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS
788 #define CKE SSPSTAT_bits.CKE
789 #define SMP SSPSTAT_bits.SMP
791 // ----- STATUS bits --------------------
797 unsigned char NOT_PD:1;
798 unsigned char NOT_TO:1;
804 extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits;
806 #define C STATUS_bits.C
807 #define DC STATUS_bits.DC
808 #define Z STATUS_bits.Z
809 #define NOT_PD STATUS_bits.NOT_PD
810 #define NOT_TO STATUS_bits.NOT_TO
811 #define RP0 STATUS_bits.RP0
812 #define RP1 STATUS_bits.RP1
813 #define IRP STATUS_bits.IRP
815 // ----- T1CON bits --------------------
818 unsigned char TMR1ON:1;
819 unsigned char TMR1CS:1;
820 unsigned char NOT_T1SYNC:1;
821 unsigned char T1OSCEN:1;
822 unsigned char T1CKPS0:1;
823 unsigned char T1CKPS1:1;
830 unsigned char T1INSYNC:1;
840 unsigned char T1SYNC:1;
848 extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits;
850 #define TMR1ON T1CON_bits.TMR1ON
851 #define TMR1CS T1CON_bits.TMR1CS
852 #define NOT_T1SYNC T1CON_bits.NOT_T1SYNC
853 #define T1INSYNC T1CON_bits.T1INSYNC
854 #define T1SYNC T1CON_bits.T1SYNC
855 #define T1OSCEN T1CON_bits.T1OSCEN
856 #define T1CKPS0 T1CON_bits.T1CKPS0
857 #define T1CKPS1 T1CON_bits.T1CKPS1
859 // ----- T2CON bits --------------------
862 unsigned char T2CKPS0:1;
863 unsigned char T2CKPS1:1;
864 unsigned char TMR2ON:1;
865 unsigned char TOUTPS0:1;
866 unsigned char TOUTPS1:1;
867 unsigned char TOUTPS2:1;
868 unsigned char TOUTPS3:1;
872 extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits;
874 #define T2CKPS0 T2CON_bits.T2CKPS0
875 #define T2CKPS1 T2CON_bits.T2CKPS1
876 #define TMR2ON T2CON_bits.TMR2ON
877 #define TOUTPS0 T2CON_bits.TOUTPS0
878 #define TOUTPS1 T2CON_bits.TOUTPS1
879 #define TOUTPS2 T2CON_bits.TOUTPS2
880 #define TOUTPS3 T2CON_bits.TOUTPS3
882 // ----- TXSTA bits --------------------
885 unsigned char TX9D:1;
886 unsigned char TRMT:1;
887 unsigned char BRGH:1;
889 unsigned char SYNC:1;
890 unsigned char TXEN:1;
892 unsigned char CSRC:1;
895 unsigned char TXD8:1;
901 unsigned char NOT_TX8:1;
911 unsigned char TX8_9:1;
915 extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits;
917 #define TX9D TXSTA_bits.TX9D
918 #define TXD8 TXSTA_bits.TXD8
919 #define TRMT TXSTA_bits.TRMT
920 #define BRGH TXSTA_bits.BRGH
921 #define SYNC TXSTA_bits.SYNC
922 #define TXEN TXSTA_bits.TXEN
923 #define TX9 TXSTA_bits.TX9
924 #define NOT_TX8 TXSTA_bits.NOT_TX8
925 #define TX8_9 TXSTA_bits.TX8_9
926 #define CSRC TXSTA_bits.CSRC