2 // Register Declarations for Microchip 16C765 Processor
5 // This header file was automatically generated by:
9 // Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved
11 // SDCC is licensed under the GNU Public license (GPL) v2. Note that
12 // this license covers the code to the compiler and other executables,
13 // but explicitly does not cover any code or objects generated by sdcc.
14 // We have not yet decided on a license for the run time libraries, but
15 // it will not put any requirements on code linked against it. See:
17 // http://www.gnu.org/copyleft/gpl/html
19 // See http://sdcc.sourceforge.net/ for the latest information on sdcc.
26 // Register addresses.
28 #define INDF_ADDR 0x0000
29 #define TMR0_ADDR 0x0001
30 #define PCL_ADDR 0x0002
31 #define STATUS_ADDR 0x0003
32 #define FSR_ADDR 0x0004
33 #define PORTA_ADDR 0x0005
34 #define PORTB_ADDR 0x0006
35 #define PORTC_ADDR 0x0007
36 #define PORTD_ADDR 0x0008
37 #define PORTE_ADDR 0x0009
38 #define PCLATH_ADDR 0x000A
39 #define INTCON_ADDR 0x000B
40 #define PIR1_ADDR 0x000C
41 #define PIR2_ADDR 0x000D
42 #define TMR1L_ADDR 0x000E
43 #define TMR1H_ADDR 0x000F
44 #define T1CON_ADDR 0x0010
45 #define TMR2_ADDR 0x0011
46 #define T2CON_ADDR 0x0012
47 #define CCPR1L_ADDR 0x0015
48 #define CCPR1H_ADDR 0x0016
49 #define CCP1CON_ADDR 0x0017
50 #define RCSTA_ADDR 0x0018
51 #define TXREG_ADDR 0x0019
52 #define RCREG_ADDR 0x001A
53 #define CCPR2L_ADDR 0x001B
54 #define CCPR2H_ADDR 0x001C
55 #define CCP2CON_ADDR 0x001D
56 #define ADRES_ADDR 0x001E
57 #define ADCON0_ADDR 0x001F
58 #define OPTION_REG_ADDR 0x0081
59 #define TRISA_ADDR 0x0085
60 #define TRISB_ADDR 0x0086
61 #define TRISC_ADDR 0x0087
62 #define TRISD_ADDR 0x0088
63 #define TRISE_ADDR 0x0089
64 #define PIE1_ADDR 0x008C
65 #define PIE2_ADDR 0x008D
66 #define PCON_ADDR 0x008E
67 #define PR2_ADDR 0x0092
68 #define TXSTA_ADDR 0x0098
69 #define SPBRG_ADDR 0x0099
70 #define ADCON1_ADDR 0x009F
71 #define UIR_ADDR 0x0190
72 #define UIE_ADDR 0x0191
73 #define UEIR_ADDR 0x0192
74 #define UEIE_ADDR 0x0193
75 #define USTAT_ADDR 0x0194
76 #define UCTRL_ADDR 0x0195
77 #define UADDR_ADDR 0x0196
78 #define USWSTAT_ADDR 0x0197
79 #define UEP0_ADDR 0x0198
80 #define UEP1_ADDR 0x0199
81 #define UEP2_ADDR 0x019A
82 #define BD0OST_ADDR 0x01A0
83 #define BD0OBC_ADDR 0x01A1
84 #define BD0OAL_ADDR 0x01A2
85 #define BD0IST_ADDR 0x01A4
86 #define BD0IBC_ADDR 0x01A5
87 #define BD0IAL_ADDR 0x01A6
88 #define BD1OST_ADDR 0x01A8
89 #define BD1OBC_ADDR 0x01A9
90 #define BD1OAL_ADDR 0x01AA
91 #define BD1IST_ADDR 0x01AC
92 #define BD1IBC_ADDR 0x01AD
93 #define BD1IAL_ADDR 0x01AE
94 #define BD2OST_ADDR 0x01B0
95 #define BD2OBC_ADDR 0x01B1
96 #define BD2OAL_ADDR 0x01B2
97 #define BD2IST_ADDR 0x01B4
98 #define BD2IBC_ADDR 0x01B5
99 #define BD2IAL_ADDR 0x01B6
102 // Memory organization.
108 // P16C765.INC Standard Header File, Version 1.00 Microchip Technology, Inc.
111 // This header file defines configurations, registers, and other useful bits of
112 // information for the PIC16C765 microcontroller. These names are taken to match
113 // the data sheets as closely as possible.
115 // Note that the processor must be selected before this file is
116 // included. The processor may be selected the following ways:
118 // 1. Command line switch:
119 // C:\ MPASM MYFILE.ASM /PIC16C765
120 // 2. LIST directive in the source file
122 // 3. Processor Type entry in the MPASM full-screen interface
124 //==========================================================================
128 //==========================================================================
132 //1.00 28 Sep 99 Initial Release
134 //==========================================================================
138 //==========================================================================
141 // MESSG "Processor-header file mismatch. Verify selected processor."
144 //==========================================================================
146 // Register Definitions
148 //==========================================================================
153 //----- Register Files------------------------------------------------------
155 extern __sfr __at (INDF_ADDR) INDF;
156 extern __sfr __at (TMR0_ADDR) TMR0;
157 extern __sfr __at (PCL_ADDR) PCL;
158 extern __sfr __at (STATUS_ADDR) STATUS;
159 extern __sfr __at (FSR_ADDR) FSR;
160 extern __sfr __at (PORTA_ADDR) PORTA;
161 extern __sfr __at (PORTB_ADDR) PORTB;
162 extern __sfr __at (PORTC_ADDR) PORTC;
163 extern __sfr __at (PORTD_ADDR) PORTD;
164 extern __sfr __at (PORTE_ADDR) PORTE;
165 extern __sfr __at (PCLATH_ADDR) PCLATH;
166 extern __sfr __at (INTCON_ADDR) INTCON;
167 extern __sfr __at (PIR1_ADDR) PIR1;
168 extern __sfr __at (PIR2_ADDR) PIR2;
169 extern __sfr __at (TMR1L_ADDR) TMR1L;
170 extern __sfr __at (TMR1H_ADDR) TMR1H;
171 extern __sfr __at (T1CON_ADDR) T1CON;
172 extern __sfr __at (TMR2_ADDR) TMR2;
173 extern __sfr __at (T2CON_ADDR) T2CON;
174 extern __sfr __at (CCPR1L_ADDR) CCPR1L;
175 extern __sfr __at (CCPR1H_ADDR) CCPR1H;
176 extern __sfr __at (CCP1CON_ADDR) CCP1CON;
177 extern __sfr __at (RCSTA_ADDR) RCSTA;
178 extern __sfr __at (TXREG_ADDR) TXREG;
179 extern __sfr __at (RCREG_ADDR) RCREG;
180 extern __sfr __at (CCPR2L_ADDR) CCPR2L;
181 extern __sfr __at (CCPR2H_ADDR) CCPR2H;
182 extern __sfr __at (CCP2CON_ADDR) CCP2CON;
183 extern __sfr __at (ADRES_ADDR) ADRES;
184 extern __sfr __at (ADCON0_ADDR) ADCON0;
186 extern __sfr __at (OPTION_REG_ADDR) OPTION_REG;
187 extern __sfr __at (TRISA_ADDR) TRISA;
188 extern __sfr __at (TRISB_ADDR) TRISB;
189 extern __sfr __at (TRISC_ADDR) TRISC;
190 extern __sfr __at (TRISD_ADDR) TRISD;
191 extern __sfr __at (TRISE_ADDR) TRISE;
192 extern __sfr __at (PIE1_ADDR) PIE1;
193 extern __sfr __at (PIE2_ADDR) PIE2;
194 extern __sfr __at (PCON_ADDR) PCON;
195 extern __sfr __at (PR2_ADDR) PR2;
196 extern __sfr __at (TXSTA_ADDR) TXSTA;
197 extern __sfr __at (SPBRG_ADDR) SPBRG;
198 extern __sfr __at (ADCON1_ADDR) ADCON1;
199 extern __sfr __at (UIR_ADDR) UIR;
200 extern __sfr __at (UIE_ADDR) UIE;
201 extern __sfr __at (UEIR_ADDR) UEIR;
202 extern __sfr __at (UEIE_ADDR) UEIE;
203 extern __sfr __at (USTAT_ADDR) USTAT;
204 extern __sfr __at (UCTRL_ADDR) UCTRL;
205 extern __sfr __at (UADDR_ADDR) UADDR;
206 extern __sfr __at (USWSTAT_ADDR) USWSTAT;
207 extern __sfr __at (UEP0_ADDR) UEP0;
208 extern __sfr __at (UEP1_ADDR) UEP1;
209 extern __sfr __at (UEP2_ADDR) UEP2;
211 extern __sfr __at (BD0OST_ADDR) BD0OST;
212 extern __sfr __at (BD0OBC_ADDR) BD0OBC;
213 extern __sfr __at (BD0OAL_ADDR) BD0OAL;
214 extern __sfr __at (BD0IST_ADDR) BD0IST;
215 extern __sfr __at (BD0IBC_ADDR) BD0IBC;
216 extern __sfr __at (BD0IAL_ADDR) BD0IAL;
218 extern __sfr __at (BD1OST_ADDR) BD1OST;
219 extern __sfr __at (BD1OBC_ADDR) BD1OBC;
220 extern __sfr __at (BD1OAL_ADDR) BD1OAL;
221 extern __sfr __at (BD1IST_ADDR) BD1IST;
222 extern __sfr __at (BD1IBC_ADDR) BD1IBC;
223 extern __sfr __at (BD1IAL_ADDR) BD1IAL;
225 extern __sfr __at (BD2OST_ADDR) BD2OST;
226 extern __sfr __at (BD2OBC_ADDR) BD2OBC;
227 extern __sfr __at (BD2OAL_ADDR) BD2OAL;
228 extern __sfr __at (BD2IST_ADDR) BD2IST;
229 extern __sfr __at (BD2IBC_ADDR) BD2IBC;
230 extern __sfr __at (BD2IAL_ADDR) BD2IAL;
233 //----- STATUS Bits --------------------------------------------------------
236 //----- INTCON Bits --------------------------------------------------------
239 //----- PIR1 Bits ----------------------------------------------------------
242 //----- PIR2 Bits ----------------------------------------------------------
245 //----- T1CON Bits ---------------------------------------------------------
248 //----- T2CON Bits ---------------------------------------------------------
251 //----- CCP1CON Bits -------------------------------------------------------
254 //----- RCSTA Bits ---------------------------------------------------------
257 //----- CCP2CON Bits -------------------------------------------------------
260 //----- ADCON0 Bits --------------------------------------------------------
263 //----- OPTION Bits --------------------------------------------------------
266 //----- TRISE Bits ---------------------------------------------------------
269 //----- PIE1 Bits ----------------------------------------------------------
272 //----- PIE2 Bits ----------------------------------------------------------
275 //----- PCON Bits ----------------------------------------------------------
278 //----- TXSTA Bits ---------------------------------------------------------
281 //----- ADCON1 Bits --------------------------------------------------------
284 //----- UIR/UIE Bits -----------------------------------------------------
287 //----- UEIR/UEIE Bits -----------------------------------------------------
290 //----- USTAT Bits ---------------------------------------------------------
293 //----- UCTRL Bits ---------------------------------------------------------
295 //----- UEPn Bits ---------------------------------------------------------
298 //----- Buffer descriptor Bits ---------------------------------------------
300 //==========================================================================
304 //==========================================================================
307 // __BADRAM H'13', H'14', H'8F'-H'91'
308 // __BADRAM H'93'-H'97', H'9A'-H'9E'
309 // __BADRAM H'105', H'107'-H'109', H'10C'-H'11F'
310 // __BADRAM H'185', H'187'-H'189', H'18C'-H'18F', H'19B'-H'19F'
311 // __BADRAM H'1E0'-H'1EF'
312 //==========================================================================
314 // Configuration Bits
316 //==========================================================================
318 #define _CP_ALL 0x00CF
319 #define _CP_75 0x15DF
320 #define _CP_50 0x2AEF
321 #define _CP_OFF 0x3FFF
322 #define _PWRTE_OFF 0x3FFF
323 #define _PWRTE_ON 0x3FF7
324 #define _WDT_ON 0x3FFF
325 #define _WDT_OFF 0x3FFB
326 #define _HS_OSC 0x3FFC
327 #define _EC_OSC 0x3FFD
328 #define _H4_OSC 0x3FFE
329 #define _E4_OSC 0x3FFF
333 // ----- ADCON0 bits --------------------
336 unsigned char ADON:1;
339 unsigned char CHS0:1;
340 unsigned char CHS1:1;
341 unsigned char CHS2:1;
342 unsigned char ADCS0:1;
343 unsigned char ADCS1:1;
348 unsigned char NOT_DONE:1;
358 unsigned char GO_DONE:1;
366 extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits;
368 #ifndef NO_BIT_DEFINES
369 #define ADON ADCON0_bits.ADON
370 #define GO ADCON0_bits.GO
371 #define NOT_DONE ADCON0_bits.NOT_DONE
372 #define GO_DONE ADCON0_bits.GO_DONE
373 #define CHS0 ADCON0_bits.CHS0
374 #define CHS1 ADCON0_bits.CHS1
375 #define CHS2 ADCON0_bits.CHS2
376 #define ADCS0 ADCON0_bits.ADCS0
377 #define ADCS1 ADCON0_bits.ADCS1
378 #endif /* NO_BIT_DEFINES */
380 // ----- ADCON1 bits --------------------
383 unsigned char PCFG0:1;
384 unsigned char PCFG1:1;
385 unsigned char PCFG2:1;
393 extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits;
395 #ifndef NO_BIT_DEFINES
396 #define PCFG0 ADCON1_bits.PCFG0
397 #define PCFG1 ADCON1_bits.PCFG1
398 #define PCFG2 ADCON1_bits.PCFG2
399 #endif /* NO_BIT_DEFINES */
401 // ----- CCP1CON bits --------------------
404 unsigned char CCP1M0:1;
405 unsigned char CCP1M1:1;
406 unsigned char CCP1M2:1;
407 unsigned char CCP1M3:1;
408 unsigned char DC1B0:1;
409 unsigned char DC1B1:1;
414 extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits;
416 #ifndef NO_BIT_DEFINES
417 #define CCP1M0 CCP1CON_bits.CCP1M0
418 #define CCP1M1 CCP1CON_bits.CCP1M1
419 #define CCP1M2 CCP1CON_bits.CCP1M2
420 #define CCP1M3 CCP1CON_bits.CCP1M3
421 #define DC1B0 CCP1CON_bits.DC1B0
422 #define DC1B1 CCP1CON_bits.DC1B1
423 #endif /* NO_BIT_DEFINES */
425 // ----- CCP2CON bits --------------------
428 unsigned char CCP2M0:1;
429 unsigned char CCP2M1:1;
430 unsigned char CCP2M2:1;
431 unsigned char CCP2M3:1;
432 unsigned char DC2B0:1;
433 unsigned char DC2B1:1;
438 extern volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits;
440 #ifndef NO_BIT_DEFINES
441 #define CCP2M0 CCP2CON_bits.CCP2M0
442 #define CCP2M1 CCP2CON_bits.CCP2M1
443 #define CCP2M2 CCP2CON_bits.CCP2M2
444 #define CCP2M3 CCP2CON_bits.CCP2M3
445 #define DC2B0 CCP2CON_bits.DC2B0
446 #define DC2B1 CCP2CON_bits.DC2B1
447 #endif /* NO_BIT_DEFINES */
449 // ----- INTCON bits --------------------
452 unsigned char RBIF:1;
453 unsigned char INTF:1;
454 unsigned char T0IF:1;
455 unsigned char RBIE:1;
456 unsigned char INTE:1;
457 unsigned char T0IE:1;
458 unsigned char PEIE:1;
462 extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits;
464 #ifndef NO_BIT_DEFINES
465 #define RBIF INTCON_bits.RBIF
466 #define INTF INTCON_bits.INTF
467 #define T0IF INTCON_bits.T0IF
468 #define RBIE INTCON_bits.RBIE
469 #define INTE INTCON_bits.INTE
470 #define T0IE INTCON_bits.T0IE
471 #define PEIE INTCON_bits.PEIE
472 #define GIE INTCON_bits.GIE
473 #endif /* NO_BIT_DEFINES */
475 // ----- OPTION_REG bits --------------------
482 unsigned char T0SE:1;
483 unsigned char T0CS:1;
484 unsigned char INTEDG:1;
485 unsigned char NOT_RBPU:1;
487 } __OPTION_REG_bits_t;
488 extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits;
490 #ifndef NO_BIT_DEFINES
491 #define PS0 OPTION_REG_bits.PS0
492 #define PS1 OPTION_REG_bits.PS1
493 #define PS2 OPTION_REG_bits.PS2
494 #define PSA OPTION_REG_bits.PSA
495 #define T0SE OPTION_REG_bits.T0SE
496 #define T0CS OPTION_REG_bits.T0CS
497 #define INTEDG OPTION_REG_bits.INTEDG
498 #define NOT_RBPU OPTION_REG_bits.NOT_RBPU
499 #endif /* NO_BIT_DEFINES */
501 // ----- PCON bits --------------------
504 unsigned char NOT_BO:1;
505 unsigned char NOT_POR:1;
514 unsigned char NOT_BOR:1;
524 extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits;
526 #ifndef NO_BIT_DEFINES
527 #define NOT_BO PCON_bits.NOT_BO
528 #define NOT_BOR PCON_bits.NOT_BOR
529 #define NOT_POR PCON_bits.NOT_POR
530 #endif /* NO_BIT_DEFINES */
532 // ----- PIE1 bits --------------------
535 unsigned char TMR1IE:1;
536 unsigned char TMR2IE:1;
537 unsigned char CCP1IE:1;
538 unsigned char USBIE:1;
539 unsigned char TXIE:1;
540 unsigned char RCIE:1;
541 unsigned char ADIE:1;
542 unsigned char PSPIE:1;
545 extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits;
547 #ifndef NO_BIT_DEFINES
548 #define TMR1IE PIE1_bits.TMR1IE
549 #define TMR2IE PIE1_bits.TMR2IE
550 #define CCP1IE PIE1_bits.CCP1IE
551 #define USBIE PIE1_bits.USBIE
552 #define TXIE PIE1_bits.TXIE
553 #define RCIE PIE1_bits.RCIE
554 #define ADIE PIE1_bits.ADIE
555 #define PSPIE PIE1_bits.PSPIE
556 #endif /* NO_BIT_DEFINES */
558 // ----- PIE2 bits --------------------
561 unsigned char CCP2IE:1;
571 extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits;
573 #ifndef NO_BIT_DEFINES
574 #define CCP2IE PIE2_bits.CCP2IE
575 #endif /* NO_BIT_DEFINES */
577 // ----- PIR1 bits --------------------
580 unsigned char TMR1IF:1;
581 unsigned char TMR2IF:1;
582 unsigned char CCP1IF:1;
583 unsigned char USBIF:1;
584 unsigned char TXIF:1;
585 unsigned char RCIF:1;
586 unsigned char ADIF:1;
587 unsigned char PSPIF:1;
590 extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits;
592 #ifndef NO_BIT_DEFINES
593 #define TMR1IF PIR1_bits.TMR1IF
594 #define TMR2IF PIR1_bits.TMR2IF
595 #define CCP1IF PIR1_bits.CCP1IF
596 #define USBIF PIR1_bits.USBIF
597 #define TXIF PIR1_bits.TXIF
598 #define RCIF PIR1_bits.RCIF
599 #define ADIF PIR1_bits.ADIF
600 #define PSPIF PIR1_bits.PSPIF
601 #endif /* NO_BIT_DEFINES */
603 // ----- PIR2 bits --------------------
606 unsigned char CCP2IF:1;
616 extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits;
618 #ifndef NO_BIT_DEFINES
619 #define CCP2IF PIR2_bits.CCP2IF
620 #endif /* NO_BIT_DEFINES */
622 // ----- PORTA bits --------------------
635 extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits;
637 #ifndef NO_BIT_DEFINES
638 #define RA0 PORTA_bits.RA0
639 #define RA1 PORTA_bits.RA1
640 #define RA2 PORTA_bits.RA2
641 #define RA3 PORTA_bits.RA3
642 #define RA4 PORTA_bits.RA4
643 #define RA5 PORTA_bits.RA5
644 #endif /* NO_BIT_DEFINES */
646 // ----- PORTB bits --------------------
659 extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits;
661 #ifndef NO_BIT_DEFINES
662 #define RB0 PORTB_bits.RB0
663 #define RB1 PORTB_bits.RB1
664 #define RB2 PORTB_bits.RB2
665 #define RB3 PORTB_bits.RB3
666 #define RB4 PORTB_bits.RB4
667 #define RB5 PORTB_bits.RB5
668 #define RB6 PORTB_bits.RB6
669 #define RB7 PORTB_bits.RB7
670 #endif /* NO_BIT_DEFINES */
672 // ----- PORTC bits --------------------
685 extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits;
687 #ifndef NO_BIT_DEFINES
688 #define RC0 PORTC_bits.RC0
689 #define RC1 PORTC_bits.RC1
690 #define RC2 PORTC_bits.RC2
691 #define RC3 PORTC_bits.RC3
692 #define RC4 PORTC_bits.RC4
693 #define RC5 PORTC_bits.RC5
694 #define RC6 PORTC_bits.RC6
695 #define RC7 PORTC_bits.RC7
696 #endif /* NO_BIT_DEFINES */
698 // ----- PORTD bits --------------------
711 extern volatile __PORTD_bits_t __at(PORTD_ADDR) PORTD_bits;
713 #ifndef NO_BIT_DEFINES
714 #define RD0 PORTD_bits.RD0
715 #define RD1 PORTD_bits.RD1
716 #define RD2 PORTD_bits.RD2
717 #define RD3 PORTD_bits.RD3
718 #define RD4 PORTD_bits.RD4
719 #define RD5 PORTD_bits.RD5
720 #define RD6 PORTD_bits.RD6
721 #define RD7 PORTD_bits.RD7
722 #endif /* NO_BIT_DEFINES */
724 // ----- PORTE bits --------------------
737 extern volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits;
739 #ifndef NO_BIT_DEFINES
740 #define RE0 PORTE_bits.RE0
741 #define RE1 PORTE_bits.RE1
742 #define RE2 PORTE_bits.RE2
743 #endif /* NO_BIT_DEFINES */
745 // ----- RCSTA bits --------------------
748 unsigned char RX9D:1;
749 unsigned char OERR:1;
750 unsigned char FERR:1;
752 unsigned char CREN:1;
753 unsigned char SREN:1;
755 unsigned char SPEN:1;
758 unsigned char RCD8:1;
774 unsigned char NOT_RC8:1;
784 unsigned char RC8_9:1;
788 extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits;
790 #ifndef NO_BIT_DEFINES
791 #define RX9D RCSTA_bits.RX9D
792 #define RCD8 RCSTA_bits.RCD8
793 #define OERR RCSTA_bits.OERR
794 #define FERR RCSTA_bits.FERR
795 #define CREN RCSTA_bits.CREN
796 #define SREN RCSTA_bits.SREN
797 #define RX9 RCSTA_bits.RX9
798 #define RC9 RCSTA_bits.RC9
799 #define NOT_RC8 RCSTA_bits.NOT_RC8
800 #define RC8_9 RCSTA_bits.RC8_9
801 #define SPEN RCSTA_bits.SPEN
802 #endif /* NO_BIT_DEFINES */
804 // ----- STATUS bits --------------------
810 unsigned char NOT_PD:1;
811 unsigned char NOT_TO:1;
817 extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits;
819 #ifndef NO_BIT_DEFINES
820 #define C STATUS_bits.C
821 #define DC STATUS_bits.DC
822 #define Z STATUS_bits.Z
823 #define NOT_PD STATUS_bits.NOT_PD
824 #define NOT_TO STATUS_bits.NOT_TO
825 #define RP0 STATUS_bits.RP0
826 #define RP1 STATUS_bits.RP1
827 #define IRP STATUS_bits.IRP
828 #endif /* NO_BIT_DEFINES */
830 // ----- T1CON bits --------------------
833 unsigned char TMR1ON:1;
834 unsigned char TMR1CS:1;
835 unsigned char NOT_T1SYNC:1;
836 unsigned char T1OSCEN:1;
837 unsigned char T1CKPS0:1;
838 unsigned char T1CKPS1:1;
845 unsigned char T1INSYNC:1;
853 extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits;
855 #ifndef NO_BIT_DEFINES
856 #define TMR1ON T1CON_bits.TMR1ON
857 #define TMR1CS T1CON_bits.TMR1CS
858 #define NOT_T1SYNC T1CON_bits.NOT_T1SYNC
859 #define T1INSYNC T1CON_bits.T1INSYNC
860 #define T1OSCEN T1CON_bits.T1OSCEN
861 #define T1CKPS0 T1CON_bits.T1CKPS0
862 #define T1CKPS1 T1CON_bits.T1CKPS1
863 #endif /* NO_BIT_DEFINES */
865 // ----- T2CON bits --------------------
868 unsigned char T2CKPS0:1;
869 unsigned char T2CKPS1:1;
870 unsigned char TMR2ON:1;
871 unsigned char TOUTPS0:1;
872 unsigned char TOUTPS1:1;
873 unsigned char TOUTPS2:1;
874 unsigned char TOUTPS3:1;
878 extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits;
880 #ifndef NO_BIT_DEFINES
881 #define T2CKPS0 T2CON_bits.T2CKPS0
882 #define T2CKPS1 T2CON_bits.T2CKPS1
883 #define TMR2ON T2CON_bits.TMR2ON
884 #define TOUTPS0 T2CON_bits.TOUTPS0
885 #define TOUTPS1 T2CON_bits.TOUTPS1
886 #define TOUTPS2 T2CON_bits.TOUTPS2
887 #define TOUTPS3 T2CON_bits.TOUTPS3
888 #endif /* NO_BIT_DEFINES */
890 // ----- TRISA bits --------------------
893 unsigned char TRISA0:1;
894 unsigned char TRISA1:1;
895 unsigned char TRISA2:1;
896 unsigned char TRISA3:1;
897 unsigned char TRISA4:1;
898 unsigned char TRISA5:1;
903 extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits;
905 #ifndef NO_BIT_DEFINES
906 #define TRISA0 TRISA_bits.TRISA0
907 #define TRISA1 TRISA_bits.TRISA1
908 #define TRISA2 TRISA_bits.TRISA2
909 #define TRISA3 TRISA_bits.TRISA3
910 #define TRISA4 TRISA_bits.TRISA4
911 #define TRISA5 TRISA_bits.TRISA5
912 #endif /* NO_BIT_DEFINES */
914 // ----- TRISB bits --------------------
917 unsigned char TRISB0:1;
918 unsigned char TRISB1:1;
919 unsigned char TRISB2:1;
920 unsigned char TRISB3:1;
921 unsigned char TRISB4:1;
922 unsigned char TRISB5:1;
923 unsigned char TRISB6:1;
924 unsigned char TRISB7:1;
927 extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits;
929 #ifndef NO_BIT_DEFINES
930 #define TRISB0 TRISB_bits.TRISB0
931 #define TRISB1 TRISB_bits.TRISB1
932 #define TRISB2 TRISB_bits.TRISB2
933 #define TRISB3 TRISB_bits.TRISB3
934 #define TRISB4 TRISB_bits.TRISB4
935 #define TRISB5 TRISB_bits.TRISB5
936 #define TRISB6 TRISB_bits.TRISB6
937 #define TRISB7 TRISB_bits.TRISB7
938 #endif /* NO_BIT_DEFINES */
940 // ----- TRISC bits --------------------
943 unsigned char TRISC0:1;
944 unsigned char TRISC1:1;
945 unsigned char TRISC2:1;
946 unsigned char TRISC3:1;
947 unsigned char TRISC4:1;
948 unsigned char TRISC5:1;
949 unsigned char TRISC6:1;
950 unsigned char TRISC7:1;
953 extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits;
955 #ifndef NO_BIT_DEFINES
956 #define TRISC0 TRISC_bits.TRISC0
957 #define TRISC1 TRISC_bits.TRISC1
958 #define TRISC2 TRISC_bits.TRISC2
959 #define TRISC3 TRISC_bits.TRISC3
960 #define TRISC4 TRISC_bits.TRISC4
961 #define TRISC5 TRISC_bits.TRISC5
962 #define TRISC6 TRISC_bits.TRISC6
963 #define TRISC7 TRISC_bits.TRISC7
964 #endif /* NO_BIT_DEFINES */
966 // ----- TRISD bits --------------------
969 unsigned char TRISD0:1;
970 unsigned char TRISD1:1;
971 unsigned char TRISD2:1;
972 unsigned char TRISD3:1;
973 unsigned char TRISD4:1;
974 unsigned char TRISD5:1;
975 unsigned char TRISD6:1;
976 unsigned char TRISD7:1;
979 extern volatile __TRISD_bits_t __at(TRISD_ADDR) TRISD_bits;
981 #ifndef NO_BIT_DEFINES
982 #define TRISD0 TRISD_bits.TRISD0
983 #define TRISD1 TRISD_bits.TRISD1
984 #define TRISD2 TRISD_bits.TRISD2
985 #define TRISD3 TRISD_bits.TRISD3
986 #define TRISD4 TRISD_bits.TRISD4
987 #define TRISD5 TRISD_bits.TRISD5
988 #define TRISD6 TRISD_bits.TRISD6
989 #define TRISD7 TRISD_bits.TRISD7
990 #endif /* NO_BIT_DEFINES */
992 // ----- TRISE bits --------------------
995 unsigned char TRISE0:1;
996 unsigned char TRISE1:1;
997 unsigned char TRISE2:1;
999 unsigned char PSPMODE:1;
1000 unsigned char IBOV:1;
1001 unsigned char OBF:1;
1002 unsigned char IBF:1;
1005 extern volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits;
1007 #ifndef NO_BIT_DEFINES
1008 #define TRISE0 TRISE_bits.TRISE0
1009 #define TRISE1 TRISE_bits.TRISE1
1010 #define TRISE2 TRISE_bits.TRISE2
1011 #define PSPMODE TRISE_bits.PSPMODE
1012 #define IBOV TRISE_bits.IBOV
1013 #define OBF TRISE_bits.OBF
1014 #define IBF TRISE_bits.IBF
1015 #endif /* NO_BIT_DEFINES */
1017 // ----- TXSTA bits --------------------
1020 unsigned char TX9D:1;
1021 unsigned char TRMT:1;
1022 unsigned char BRGH:1;
1024 unsigned char SYNC:1;
1025 unsigned char TXEN:1;
1026 unsigned char TX9:1;
1027 unsigned char CSRC:1;
1030 unsigned char TXD8:1;
1036 unsigned char NOT_TX8:1;
1046 unsigned char TX8_9:1;
1050 extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits;
1052 #ifndef NO_BIT_DEFINES
1053 #define TX9D TXSTA_bits.TX9D
1054 #define TXD8 TXSTA_bits.TXD8
1055 #define TRMT TXSTA_bits.TRMT
1056 #define BRGH TXSTA_bits.BRGH
1057 #define SYNC TXSTA_bits.SYNC
1058 #define TXEN TXSTA_bits.TXEN
1059 #define TX9 TXSTA_bits.TX9
1060 #define NOT_TX8 TXSTA_bits.NOT_TX8
1061 #define TX8_9 TXSTA_bits.TX8_9
1062 #define CSRC TXSTA_bits.CSRC
1063 #endif /* NO_BIT_DEFINES */
1065 // ----- UCTRL bits --------------------
1069 unsigned char SUSPND:1;
1070 unsigned char RESUME:1;
1071 unsigned char DEV_ATT:1;
1072 unsigned char PKT_DIS:1;
1073 unsigned char SE0:1;
1078 extern volatile __UCTRL_bits_t __at(UCTRL_ADDR) UCTRL_bits;
1080 #ifndef NO_BIT_DEFINES
1081 #define SUSPND UCTRL_bits.SUSPND
1082 #define RESUME UCTRL_bits.RESUME
1083 #define DEV_ATT UCTRL_bits.DEV_ATT
1084 #define PKT_DIS UCTRL_bits.PKT_DIS
1085 #define SE0 UCTRL_bits.SE0
1086 #endif /* NO_BIT_DEFINES */
1088 // ----- UEIE bits --------------------
1091 unsigned char PID_ERR:1;
1092 unsigned char CRC5:1;
1093 unsigned char CRC16:1;
1094 unsigned char DFN8:1;
1095 unsigned char BTO_ERR:1;
1096 unsigned char WRT_ERR:1;
1097 unsigned char OWN_ERR:1;
1098 unsigned char BTS_ERR:1;
1101 extern volatile __UEIE_bits_t __at(UEIE_ADDR) UEIE_bits;
1103 #ifndef NO_BIT_DEFINES
1104 #define PID_ERR UEIE_bits.PID_ERR
1105 #define CRC5 UEIE_bits.CRC5
1106 #define CRC16 UEIE_bits.CRC16
1107 #define DFN8 UEIE_bits.DFN8
1108 #define BTO_ERR UEIE_bits.BTO_ERR
1109 #define WRT_ERR UEIE_bits.WRT_ERR
1110 #define OWN_ERR UEIE_bits.OWN_ERR
1111 #define BTS_ERR UEIE_bits.BTS_ERR
1112 #endif /* NO_BIT_DEFINES */
1114 // ----- UEP0 bits --------------------
1117 unsigned char EP_STALL:1;
1118 unsigned char EP_IN_EN:1;
1119 unsigned char EP_OUT_EN:1;
1120 unsigned char EP_CTL_DIS:1;
1121 unsigned char PID2:1;
1122 unsigned char PID3:1;
1123 unsigned char DATA01:1;
1124 unsigned char UOWN:1;
1129 unsigned char BSTALL:1;
1130 unsigned char DTS:1;
1134 unsigned char OWN:1;
1139 unsigned char PID0:1;
1140 unsigned char PID1:1;
1147 extern volatile __UEP0_bits_t __at(UEP0_ADDR) UEP0_bits;
1149 #ifndef NO_BIT_DEFINES
1150 #define EP_STALL UEP0_bits.EP_STALL
1151 #define EP_IN_EN UEP0_bits.EP_IN_EN
1152 #define EP_OUT_EN UEP0_bits.EP_OUT_EN
1153 #define BSTALL UEP0_bits.BSTALL
1154 #define PID0 UEP0_bits.PID0
1155 #define EP_CTL_DIS UEP0_bits.EP_CTL_DIS
1156 #define DTS UEP0_bits.DTS
1157 #define PID1 UEP0_bits.PID1
1158 #define PID2 UEP0_bits.PID2
1159 #define PID3 UEP0_bits.PID3
1160 #define DATA01 UEP0_bits.DATA01
1161 #define UOWN UEP0_bits.UOWN
1162 #define OWN UEP0_bits.OWN
1163 #endif /* NO_BIT_DEFINES */
1165 // ----- UIE bits --------------------
1168 unsigned char USB_RST:1;
1169 unsigned char UERR:1;
1170 unsigned char ACTIVITY:1;
1171 unsigned char TOK_DNE:1;
1172 unsigned char UIDLE:1;
1173 unsigned char STALL:1;
1178 extern volatile __UIE_bits_t __at(UIE_ADDR) UIE_bits;
1180 #ifndef NO_BIT_DEFINES
1181 #define USB_RST UIE_bits.USB_RST
1182 #define UERR UIE_bits.UERR
1183 #define ACTIVITY UIE_bits.ACTIVITY
1184 #define TOK_DNE UIE_bits.TOK_DNE
1185 #define UIDLE UIE_bits.UIDLE
1186 #define STALL UIE_bits.STALL
1187 #endif /* NO_BIT_DEFINES */
1189 // ----- USTAT bits --------------------
1195 unsigned char ENDP0:1;
1196 unsigned char ENDP1:1;
1202 extern volatile __USTAT_bits_t __at(USTAT_ADDR) USTAT_bits;
1204 #ifndef NO_BIT_DEFINES
1205 #define IN USTAT_bits.IN
1206 #define ENDP0 USTAT_bits.ENDP0
1207 #define ENDP1 USTAT_bits.ENDP1
1208 #endif /* NO_BIT_DEFINES */