2 // Register Declarations for Microchip 16C74B Processor
5 // This header file was automatically generated by:
9 // Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved
11 // SDCC is licensed under the GNU Public license (GPL) v2. Note that
12 // this license covers the code to the compiler and other executables,
13 // but explicitly does not cover any code or objects generated by sdcc.
14 // We have not yet decided on a license for the run time libraries, but
15 // it will not put any requirements on code linked against it. See:
17 // http://www.gnu.org/copyleft/gpl/html
19 // See http://sdcc.sourceforge.net/ for the latest information on sdcc.
26 // Register addresses.
28 #define INDF_ADDR 0x0000
29 #define TMR0_ADDR 0x0001
30 #define PCL_ADDR 0x0002
31 #define STATUS_ADDR 0x0003
32 #define FSR_ADDR 0x0004
33 #define PORTA_ADDR 0x0005
34 #define PORTB_ADDR 0x0006
35 #define PORTC_ADDR 0x0007
36 #define PORTD_ADDR 0x0008
37 #define PORTE_ADDR 0x0009
38 #define PCLATH_ADDR 0x000A
39 #define INTCON_ADDR 0x000B
40 #define PIR1_ADDR 0x000C
41 #define PIR2_ADDR 0x000D
42 #define TMR1L_ADDR 0x000E
43 #define TMR1H_ADDR 0x000F
44 #define T1CON_ADDR 0x0010
45 #define TMR2_ADDR 0x0011
46 #define T2CON_ADDR 0x0012
47 #define SSPBUF_ADDR 0x0013
48 #define SSPCON_ADDR 0x0014
49 #define CCPR1L_ADDR 0x0015
50 #define CCPR1H_ADDR 0x0016
51 #define CCP1CON_ADDR 0x0017
52 #define RCSTA_ADDR 0x0018
53 #define TXREG_ADDR 0x0019
54 #define RCREG_ADDR 0x001A
55 #define CCPR2L_ADDR 0x001B
56 #define CCPR2H_ADDR 0x001C
57 #define CCP2CON_ADDR 0x001D
58 #define ADRES_ADDR 0x001E
59 #define ADCON0_ADDR 0x001F
60 #define OPTION_REG_ADDR 0x0081
61 #define TRISA_ADDR 0x0085
62 #define TRISB_ADDR 0x0086
63 #define TRISC_ADDR 0x0087
64 #define TRISD_ADDR 0x0088
65 #define TRISE_ADDR 0x0089
66 #define PIE1_ADDR 0x008C
67 #define PIE2_ADDR 0x008D
68 #define PCON_ADDR 0x008E
69 #define PR2_ADDR 0x0092
70 #define SSPADD_ADDR 0x0093
71 #define SSPSTAT_ADDR 0x0094
72 #define TXSTA_ADDR 0x0098
73 #define SPBRG_ADDR 0x0099
74 #define ADCON1_ADDR 0x009F
77 // Memory organization.
83 // P16C74B.INC Standard Header File, Version 1.00 Microchip Technology, Inc.
86 // This header file defines configurations, registers, and other useful bits of
87 // information for the PIC16C74B microcontroller. These names are taken to match
88 // the data sheets as closely as possible.
90 // Note that the processor must be selected before this file is
91 // included. The processor may be selected the following ways:
93 // 1. Command line switch:
94 // C:\ MPASM MYFILE.ASM /PIC16C74B
95 // 2. LIST directive in the source file
97 // 3. Processor Type entry in the MPASM full-screen interface
99 //==========================================================================
103 //==========================================================================
107 //1.00 12/17/97 Initial Release
109 //==========================================================================
113 //==========================================================================
116 // MESSG "Processor-header file mismatch. Verify selected processor."
119 //==========================================================================
121 // Register Definitions
123 //==========================================================================
128 //----- Register Files------------------------------------------------------
130 extern __sfr __at (INDF_ADDR) INDF;
131 extern __sfr __at (TMR0_ADDR) TMR0;
132 extern __sfr __at (PCL_ADDR) PCL;
133 extern __sfr __at (STATUS_ADDR) STATUS;
134 extern __sfr __at (FSR_ADDR) FSR;
135 extern __sfr __at (PORTA_ADDR) PORTA;
136 extern __sfr __at (PORTB_ADDR) PORTB;
137 extern __sfr __at (PORTC_ADDR) PORTC;
138 extern __sfr __at (PORTD_ADDR) PORTD;
139 extern __sfr __at (PORTE_ADDR) PORTE;
140 extern __sfr __at (PCLATH_ADDR) PCLATH;
141 extern __sfr __at (INTCON_ADDR) INTCON;
142 extern __sfr __at (PIR1_ADDR) PIR1;
143 extern __sfr __at (PIR2_ADDR) PIR2;
144 extern __sfr __at (TMR1L_ADDR) TMR1L;
145 extern __sfr __at (TMR1H_ADDR) TMR1H;
146 extern __sfr __at (T1CON_ADDR) T1CON;
147 extern __sfr __at (TMR2_ADDR) TMR2;
148 extern __sfr __at (T2CON_ADDR) T2CON;
149 extern __sfr __at (SSPBUF_ADDR) SSPBUF;
150 extern __sfr __at (SSPCON_ADDR) SSPCON;
151 extern __sfr __at (CCPR1L_ADDR) CCPR1L;
152 extern __sfr __at (CCPR1H_ADDR) CCPR1H;
153 extern __sfr __at (CCP1CON_ADDR) CCP1CON;
154 extern __sfr __at (RCSTA_ADDR) RCSTA;
155 extern __sfr __at (TXREG_ADDR) TXREG;
156 extern __sfr __at (RCREG_ADDR) RCREG;
157 extern __sfr __at (CCPR2L_ADDR) CCPR2L;
158 extern __sfr __at (CCPR2H_ADDR) CCPR2H;
159 extern __sfr __at (CCP2CON_ADDR) CCP2CON;
160 extern __sfr __at (ADRES_ADDR) ADRES;
161 extern __sfr __at (ADCON0_ADDR) ADCON0;
163 extern __sfr __at (OPTION_REG_ADDR) OPTION_REG;
164 extern __sfr __at (TRISA_ADDR) TRISA;
165 extern __sfr __at (TRISB_ADDR) TRISB;
166 extern __sfr __at (TRISC_ADDR) TRISC;
167 extern __sfr __at (TRISD_ADDR) TRISD;
168 extern __sfr __at (TRISE_ADDR) TRISE;
169 extern __sfr __at (PIE1_ADDR) PIE1;
170 extern __sfr __at (PIE2_ADDR) PIE2;
171 extern __sfr __at (PCON_ADDR) PCON;
172 extern __sfr __at (PR2_ADDR) PR2;
173 extern __sfr __at (SSPADD_ADDR) SSPADD;
174 extern __sfr __at (SSPSTAT_ADDR) SSPSTAT;
175 extern __sfr __at (TXSTA_ADDR) TXSTA;
176 extern __sfr __at (SPBRG_ADDR) SPBRG;
177 extern __sfr __at (ADCON1_ADDR) ADCON1;
179 //----- STATUS Bits --------------------------------------------------------
182 //----- INTCON Bits --------------------------------------------------------
185 //----- PIR1 Bits ----------------------------------------------------------
188 //----- PIR2 Bits ----------------------------------------------------------
191 //----- T1CON Bits ---------------------------------------------------------
194 //----- T2CON Bits ---------------------------------------------------------
197 //----- SSPCON Bits --------------------------------------------------------
200 //----- CCP1CON Bits -------------------------------------------------------
203 //----- RCSTA Bits ---------------------------------------------------------
206 //----- CCP2CON Bits -------------------------------------------------------
209 //----- ADCON0 Bits --------------------------------------------------------
212 //----- OPTION Bits --------------------------------------------------------
215 //----- TRISE Bits ---------------------------------------------------------
218 //----- PIE1 Bits ----------------------------------------------------------
221 //----- PIE2 Bits ----------------------------------------------------------
224 //----- PCON Bits ----------------------------------------------------------
227 //----- SSPSTAT Bits -------------------------------------------------------
230 //----- TXSTA Bits ---------------------------------------------------------
233 //----- ADCON1 Bits --------------------------------------------------------
236 //==========================================================================
240 //==========================================================================
243 // __BADRAM H'8F'-H'91', H'95'-H'97', H'9A'-H'9E'
245 //==========================================================================
247 // Configuration Bits
249 //==========================================================================
251 #define _BODEN_ON 0x3FFF
252 #define _BODEN_OFF 0x3FBF
253 #define _CP_ALL 0x00CF
254 #define _CP_75 0x15DF
255 #define _CP_50 0x2AEF
256 #define _CP_OFF 0x3FFF
257 #define _PWRTE_OFF 0x3FFF
258 #define _PWRTE_ON 0x3FF7
259 #define _WDT_ON 0x3FFF
260 #define _WDT_OFF 0x3FFB
261 #define _LP_OSC 0x3FFC
262 #define _XT_OSC 0x3FFD
263 #define _HS_OSC 0x3FFE
264 #define _RC_OSC 0x3FFF
268 // ----- ADCON0 bits --------------------
271 unsigned char ADON:1;
274 unsigned char CHS0:1;
275 unsigned char CHS1:1;
276 unsigned char CHS2:1;
277 unsigned char ADCS0:1;
278 unsigned char ADCS1:1;
283 unsigned char NOT_DONE:1;
293 unsigned char GO_DONE:1;
301 extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits;
303 #ifndef NO_BIT_DEFINES
304 #define ADON ADCON0_bits.ADON
305 #define GO ADCON0_bits.GO
306 #define NOT_DONE ADCON0_bits.NOT_DONE
307 #define GO_DONE ADCON0_bits.GO_DONE
308 #define CHS0 ADCON0_bits.CHS0
309 #define CHS1 ADCON0_bits.CHS1
310 #define CHS2 ADCON0_bits.CHS2
311 #define ADCS0 ADCON0_bits.ADCS0
312 #define ADCS1 ADCON0_bits.ADCS1
313 #endif /* NO_BIT_DEFINES */
315 // ----- ADCON1 bits --------------------
318 unsigned char PCFG0:1;
319 unsigned char PCFG1:1;
320 unsigned char PCFG2:1;
328 extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits;
330 #ifndef NO_BIT_DEFINES
331 #define PCFG0 ADCON1_bits.PCFG0
332 #define PCFG1 ADCON1_bits.PCFG1
333 #define PCFG2 ADCON1_bits.PCFG2
334 #endif /* NO_BIT_DEFINES */
336 // ----- CCP1CON bits --------------------
339 unsigned char CCP1M0:1;
340 unsigned char CCP1M1:1;
341 unsigned char CCP1M2:1;
342 unsigned char CCP1M3:1;
343 unsigned char CCP1Y:1;
344 unsigned char CCP1X:1;
349 extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits;
351 #ifndef NO_BIT_DEFINES
352 #define CCP1M0 CCP1CON_bits.CCP1M0
353 #define CCP1M1 CCP1CON_bits.CCP1M1
354 #define CCP1M2 CCP1CON_bits.CCP1M2
355 #define CCP1M3 CCP1CON_bits.CCP1M3
356 #define CCP1Y CCP1CON_bits.CCP1Y
357 #define CCP1X CCP1CON_bits.CCP1X
358 #endif /* NO_BIT_DEFINES */
360 // ----- CCP2CON bits --------------------
363 unsigned char CCP2M0:1;
364 unsigned char CCP2M1:1;
365 unsigned char CCP2M2:1;
366 unsigned char CCP2M3:1;
367 unsigned char CCP2Y:1;
368 unsigned char CCP2X:1;
373 extern volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits;
375 #ifndef NO_BIT_DEFINES
376 #define CCP2M0 CCP2CON_bits.CCP2M0
377 #define CCP2M1 CCP2CON_bits.CCP2M1
378 #define CCP2M2 CCP2CON_bits.CCP2M2
379 #define CCP2M3 CCP2CON_bits.CCP2M3
380 #define CCP2Y CCP2CON_bits.CCP2Y
381 #define CCP2X CCP2CON_bits.CCP2X
382 #endif /* NO_BIT_DEFINES */
384 // ----- INTCON bits --------------------
387 unsigned char RBIF:1;
388 unsigned char INTF:1;
389 unsigned char T0IF:1;
390 unsigned char RBIE:1;
391 unsigned char INTE:1;
392 unsigned char T0IE:1;
393 unsigned char PEIE:1;
397 extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits;
399 #ifndef NO_BIT_DEFINES
400 #define RBIF INTCON_bits.RBIF
401 #define INTF INTCON_bits.INTF
402 #define T0IF INTCON_bits.T0IF
403 #define RBIE INTCON_bits.RBIE
404 #define INTE INTCON_bits.INTE
405 #define T0IE INTCON_bits.T0IE
406 #define PEIE INTCON_bits.PEIE
407 #define GIE INTCON_bits.GIE
408 #endif /* NO_BIT_DEFINES */
410 // ----- OPTION_REG bits --------------------
417 unsigned char T0SE:1;
418 unsigned char T0CS:1;
419 unsigned char INTEDG:1;
420 unsigned char NOT_RBPU:1;
422 } __OPTION_REG_bits_t;
423 extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits;
425 #ifndef NO_BIT_DEFINES
426 #define PS0 OPTION_REG_bits.PS0
427 #define PS1 OPTION_REG_bits.PS1
428 #define PS2 OPTION_REG_bits.PS2
429 #define PSA OPTION_REG_bits.PSA
430 #define T0SE OPTION_REG_bits.T0SE
431 #define T0CS OPTION_REG_bits.T0CS
432 #define INTEDG OPTION_REG_bits.INTEDG
433 #define NOT_RBPU OPTION_REG_bits.NOT_RBPU
434 #endif /* NO_BIT_DEFINES */
436 // ----- PCON bits --------------------
439 unsigned char NOT_BO:1;
440 unsigned char NOT_POR:1;
449 unsigned char NOT_BOR:1;
459 extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits;
461 #ifndef NO_BIT_DEFINES
462 #define NOT_BO PCON_bits.NOT_BO
463 #define NOT_BOR PCON_bits.NOT_BOR
464 #define NOT_POR PCON_bits.NOT_POR
465 #endif /* NO_BIT_DEFINES */
467 // ----- PIE1 bits --------------------
470 unsigned char TMR1IE:1;
471 unsigned char TMR2IE:1;
472 unsigned char CCP1IE:1;
473 unsigned char SSPIE:1;
474 unsigned char TXIE:1;
475 unsigned char RCIE:1;
476 unsigned char ADIE:1;
477 unsigned char PSPIE:1;
480 extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits;
482 #ifndef NO_BIT_DEFINES
483 #define TMR1IE PIE1_bits.TMR1IE
484 #define TMR2IE PIE1_bits.TMR2IE
485 #define CCP1IE PIE1_bits.CCP1IE
486 #define SSPIE PIE1_bits.SSPIE
487 #define TXIE PIE1_bits.TXIE
488 #define RCIE PIE1_bits.RCIE
489 #define ADIE PIE1_bits.ADIE
490 #define PSPIE PIE1_bits.PSPIE
491 #endif /* NO_BIT_DEFINES */
493 // ----- PIE2 bits --------------------
496 unsigned char CCP2IE:1;
506 extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits;
508 #ifndef NO_BIT_DEFINES
509 #define CCP2IE PIE2_bits.CCP2IE
510 #endif /* NO_BIT_DEFINES */
512 // ----- PIR1 bits --------------------
515 unsigned char TMR1IF:1;
516 unsigned char TMR2IF:1;
517 unsigned char CCP1IF:1;
518 unsigned char SSPIF:1;
519 unsigned char TXIF:1;
520 unsigned char RCIF:1;
521 unsigned char ADIF:1;
522 unsigned char PSPIF:1;
525 extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits;
527 #ifndef NO_BIT_DEFINES
528 #define TMR1IF PIR1_bits.TMR1IF
529 #define TMR2IF PIR1_bits.TMR2IF
530 #define CCP1IF PIR1_bits.CCP1IF
531 #define SSPIF PIR1_bits.SSPIF
532 #define TXIF PIR1_bits.TXIF
533 #define RCIF PIR1_bits.RCIF
534 #define ADIF PIR1_bits.ADIF
535 #define PSPIF PIR1_bits.PSPIF
536 #endif /* NO_BIT_DEFINES */
538 // ----- PIR2 bits --------------------
541 unsigned char CCP2IF:1;
551 extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits;
553 #ifndef NO_BIT_DEFINES
554 #define CCP2IF PIR2_bits.CCP2IF
555 #endif /* NO_BIT_DEFINES */
557 // ----- PORTA bits --------------------
570 extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits;
572 #ifndef NO_BIT_DEFINES
573 #define RA0 PORTA_bits.RA0
574 #define RA1 PORTA_bits.RA1
575 #define RA2 PORTA_bits.RA2
576 #define RA3 PORTA_bits.RA3
577 #define RA4 PORTA_bits.RA4
578 #define RA5 PORTA_bits.RA5
579 #endif /* NO_BIT_DEFINES */
581 // ----- PORTB bits --------------------
594 extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits;
596 #ifndef NO_BIT_DEFINES
597 #define RB0 PORTB_bits.RB0
598 #define RB1 PORTB_bits.RB1
599 #define RB2 PORTB_bits.RB2
600 #define RB3 PORTB_bits.RB3
601 #define RB4 PORTB_bits.RB4
602 #define RB5 PORTB_bits.RB5
603 #define RB6 PORTB_bits.RB6
604 #define RB7 PORTB_bits.RB7
605 #endif /* NO_BIT_DEFINES */
607 // ----- PORTC bits --------------------
620 extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits;
622 #ifndef NO_BIT_DEFINES
623 #define RC0 PORTC_bits.RC0
624 #define RC1 PORTC_bits.RC1
625 #define RC2 PORTC_bits.RC2
626 #define RC3 PORTC_bits.RC3
627 #define RC4 PORTC_bits.RC4
628 #define RC5 PORTC_bits.RC5
629 #define RC6 PORTC_bits.RC6
630 #define RC7 PORTC_bits.RC7
631 #endif /* NO_BIT_DEFINES */
633 // ----- PORTD bits --------------------
646 extern volatile __PORTD_bits_t __at(PORTD_ADDR) PORTD_bits;
648 #ifndef NO_BIT_DEFINES
649 #define RD0 PORTD_bits.RD0
650 #define RD1 PORTD_bits.RD1
651 #define RD2 PORTD_bits.RD2
652 #define RD3 PORTD_bits.RD3
653 #define RD4 PORTD_bits.RD4
654 #define RD5 PORTD_bits.RD5
655 #define RD6 PORTD_bits.RD6
656 #define RD7 PORTD_bits.RD7
657 #endif /* NO_BIT_DEFINES */
659 // ----- PORTE bits --------------------
672 extern volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits;
674 #ifndef NO_BIT_DEFINES
675 #define RE0 PORTE_bits.RE0
676 #define RE1 PORTE_bits.RE1
677 #define RE2 PORTE_bits.RE2
678 #endif /* NO_BIT_DEFINES */
680 // ----- RCSTA bits --------------------
683 unsigned char RX9D:1;
684 unsigned char OERR:1;
685 unsigned char FERR:1;
687 unsigned char CREN:1;
688 unsigned char SREN:1;
690 unsigned char SPEN:1;
693 unsigned char RCD8:1;
709 unsigned char NOT_RC8:1;
719 unsigned char RC8_9:1;
723 extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits;
725 #ifndef NO_BIT_DEFINES
726 #define RX9D RCSTA_bits.RX9D
727 #define RCD8 RCSTA_bits.RCD8
728 #define OERR RCSTA_bits.OERR
729 #define FERR RCSTA_bits.FERR
730 #define CREN RCSTA_bits.CREN
731 #define SREN RCSTA_bits.SREN
732 #define RX9 RCSTA_bits.RX9
733 #define RC9 RCSTA_bits.RC9
734 #define NOT_RC8 RCSTA_bits.NOT_RC8
735 #define RC8_9 RCSTA_bits.RC8_9
736 #define SPEN RCSTA_bits.SPEN
737 #endif /* NO_BIT_DEFINES */
739 // ----- SSPCON bits --------------------
742 unsigned char SSPM0:1;
743 unsigned char SSPM1:1;
744 unsigned char SSPM2:1;
745 unsigned char SSPM3:1;
747 unsigned char SSPEN:1;
748 unsigned char SSPOV:1;
749 unsigned char WCOL:1;
752 extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits;
754 #ifndef NO_BIT_DEFINES
755 #define SSPM0 SSPCON_bits.SSPM0
756 #define SSPM1 SSPCON_bits.SSPM1
757 #define SSPM2 SSPCON_bits.SSPM2
758 #define SSPM3 SSPCON_bits.SSPM3
759 #define CKP SSPCON_bits.CKP
760 #define SSPEN SSPCON_bits.SSPEN
761 #define SSPOV SSPCON_bits.SSPOV
762 #define WCOL SSPCON_bits.WCOL
763 #endif /* NO_BIT_DEFINES */
765 // ----- SSPSTAT bits --------------------
780 unsigned char I2C_READ:1;
781 unsigned char I2C_START:1;
782 unsigned char I2C_STOP:1;
783 unsigned char I2C_DATA:1;
790 unsigned char NOT_W:1;
793 unsigned char NOT_A:1;
800 unsigned char NOT_WRITE:1;
803 unsigned char NOT_ADDRESS:1;
820 unsigned char READ_WRITE:1;
823 unsigned char DATA_ADDRESS:1;
828 extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits;
830 #ifndef NO_BIT_DEFINES
831 #define BF SSPSTAT_bits.BF
832 #define UA SSPSTAT_bits.UA
833 #define R SSPSTAT_bits.R
834 #define I2C_READ SSPSTAT_bits.I2C_READ
835 #define NOT_W SSPSTAT_bits.NOT_W
836 #define NOT_WRITE SSPSTAT_bits.NOT_WRITE
837 #define R_W SSPSTAT_bits.R_W
838 #define READ_WRITE SSPSTAT_bits.READ_WRITE
839 #define S SSPSTAT_bits.S
840 #define I2C_START SSPSTAT_bits.I2C_START
841 #define P SSPSTAT_bits.P
842 #define I2C_STOP SSPSTAT_bits.I2C_STOP
843 #define D SSPSTAT_bits.D
844 #define I2C_DATA SSPSTAT_bits.I2C_DATA
845 #define NOT_A SSPSTAT_bits.NOT_A
846 #define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS
847 #define D_A SSPSTAT_bits.D_A
848 #define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS
849 #define CKE SSPSTAT_bits.CKE
850 #define SMP SSPSTAT_bits.SMP
851 #endif /* NO_BIT_DEFINES */
853 // ----- STATUS bits --------------------
859 unsigned char NOT_PD:1;
860 unsigned char NOT_TO:1;
866 extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits;
868 #ifndef NO_BIT_DEFINES
869 #define C STATUS_bits.C
870 #define DC STATUS_bits.DC
871 #define Z STATUS_bits.Z
872 #define NOT_PD STATUS_bits.NOT_PD
873 #define NOT_TO STATUS_bits.NOT_TO
874 #define RP0 STATUS_bits.RP0
875 #define RP1 STATUS_bits.RP1
876 #define IRP STATUS_bits.IRP
877 #endif /* NO_BIT_DEFINES */
879 // ----- T1CON bits --------------------
882 unsigned char TMR1ON:1;
883 unsigned char TMR1CS:1;
884 unsigned char NOT_T1SYNC:1;
885 unsigned char T1OSCEN:1;
886 unsigned char T1CKPS0:1;
887 unsigned char T1CKPS1:1;
894 unsigned char T1INSYNC:1;
902 extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits;
904 #ifndef NO_BIT_DEFINES
905 #define TMR1ON T1CON_bits.TMR1ON
906 #define TMR1CS T1CON_bits.TMR1CS
907 #define NOT_T1SYNC T1CON_bits.NOT_T1SYNC
908 #define T1INSYNC T1CON_bits.T1INSYNC
909 #define T1OSCEN T1CON_bits.T1OSCEN
910 #define T1CKPS0 T1CON_bits.T1CKPS0
911 #define T1CKPS1 T1CON_bits.T1CKPS1
912 #endif /* NO_BIT_DEFINES */
914 // ----- T2CON bits --------------------
917 unsigned char T2CKPS0:1;
918 unsigned char T2CKPS1:1;
919 unsigned char TMR2ON:1;
920 unsigned char TOUTPS0:1;
921 unsigned char TOUTPS1:1;
922 unsigned char TOUTPS2:1;
923 unsigned char TOUTPS3:1;
927 extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits;
929 #ifndef NO_BIT_DEFINES
930 #define T2CKPS0 T2CON_bits.T2CKPS0
931 #define T2CKPS1 T2CON_bits.T2CKPS1
932 #define TMR2ON T2CON_bits.TMR2ON
933 #define TOUTPS0 T2CON_bits.TOUTPS0
934 #define TOUTPS1 T2CON_bits.TOUTPS1
935 #define TOUTPS2 T2CON_bits.TOUTPS2
936 #define TOUTPS3 T2CON_bits.TOUTPS3
937 #endif /* NO_BIT_DEFINES */
939 // ----- TRISA bits --------------------
942 unsigned char TRISA0:1;
943 unsigned char TRISA1:1;
944 unsigned char TRISA2:1;
945 unsigned char TRISA3:1;
946 unsigned char TRISA4:1;
947 unsigned char TRISA5:1;
952 extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits;
954 #ifndef NO_BIT_DEFINES
955 #define TRISA0 TRISA_bits.TRISA0
956 #define TRISA1 TRISA_bits.TRISA1
957 #define TRISA2 TRISA_bits.TRISA2
958 #define TRISA3 TRISA_bits.TRISA3
959 #define TRISA4 TRISA_bits.TRISA4
960 #define TRISA5 TRISA_bits.TRISA5
961 #endif /* NO_BIT_DEFINES */
963 // ----- TRISB bits --------------------
966 unsigned char TRISB0:1;
967 unsigned char TRISB1:1;
968 unsigned char TRISB2:1;
969 unsigned char TRISB3:1;
970 unsigned char TRISB4:1;
971 unsigned char TRISB5:1;
972 unsigned char TRISB6:1;
973 unsigned char TRISB7:1;
976 extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits;
978 #ifndef NO_BIT_DEFINES
979 #define TRISB0 TRISB_bits.TRISB0
980 #define TRISB1 TRISB_bits.TRISB1
981 #define TRISB2 TRISB_bits.TRISB2
982 #define TRISB3 TRISB_bits.TRISB3
983 #define TRISB4 TRISB_bits.TRISB4
984 #define TRISB5 TRISB_bits.TRISB5
985 #define TRISB6 TRISB_bits.TRISB6
986 #define TRISB7 TRISB_bits.TRISB7
987 #endif /* NO_BIT_DEFINES */
989 // ----- TRISC bits --------------------
992 unsigned char TRISC0:1;
993 unsigned char TRISC1:1;
994 unsigned char TRISC2:1;
995 unsigned char TRISC3:1;
996 unsigned char TRISC4:1;
997 unsigned char TRISC5:1;
998 unsigned char TRISC6:1;
999 unsigned char TRISC7:1;
1002 extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits;
1004 #ifndef NO_BIT_DEFINES
1005 #define TRISC0 TRISC_bits.TRISC0
1006 #define TRISC1 TRISC_bits.TRISC1
1007 #define TRISC2 TRISC_bits.TRISC2
1008 #define TRISC3 TRISC_bits.TRISC3
1009 #define TRISC4 TRISC_bits.TRISC4
1010 #define TRISC5 TRISC_bits.TRISC5
1011 #define TRISC6 TRISC_bits.TRISC6
1012 #define TRISC7 TRISC_bits.TRISC7
1013 #endif /* NO_BIT_DEFINES */
1015 // ----- TRISD bits --------------------
1018 unsigned char TRISD0:1;
1019 unsigned char TRISD1:1;
1020 unsigned char TRISD2:1;
1021 unsigned char TRISD3:1;
1022 unsigned char TRISD4:1;
1023 unsigned char TRISD5:1;
1024 unsigned char TRISD6:1;
1025 unsigned char TRISD7:1;
1028 extern volatile __TRISD_bits_t __at(TRISD_ADDR) TRISD_bits;
1030 #ifndef NO_BIT_DEFINES
1031 #define TRISD0 TRISD_bits.TRISD0
1032 #define TRISD1 TRISD_bits.TRISD1
1033 #define TRISD2 TRISD_bits.TRISD2
1034 #define TRISD3 TRISD_bits.TRISD3
1035 #define TRISD4 TRISD_bits.TRISD4
1036 #define TRISD5 TRISD_bits.TRISD5
1037 #define TRISD6 TRISD_bits.TRISD6
1038 #define TRISD7 TRISD_bits.TRISD7
1039 #endif /* NO_BIT_DEFINES */
1041 // ----- TRISE bits --------------------
1044 unsigned char TRISE0:1;
1045 unsigned char TRISE1:1;
1046 unsigned char TRISE2:1;
1048 unsigned char PSPMODE:1;
1049 unsigned char IBOV:1;
1050 unsigned char OBF:1;
1051 unsigned char IBF:1;
1054 extern volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits;
1056 #ifndef NO_BIT_DEFINES
1057 #define TRISE0 TRISE_bits.TRISE0
1058 #define TRISE1 TRISE_bits.TRISE1
1059 #define TRISE2 TRISE_bits.TRISE2
1060 #define PSPMODE TRISE_bits.PSPMODE
1061 #define IBOV TRISE_bits.IBOV
1062 #define OBF TRISE_bits.OBF
1063 #define IBF TRISE_bits.IBF
1064 #endif /* NO_BIT_DEFINES */
1066 // ----- TXSTA bits --------------------
1069 unsigned char TX9D:1;
1070 unsigned char TRMT:1;
1071 unsigned char BRGH:1;
1073 unsigned char SYNC:1;
1074 unsigned char TXEN:1;
1075 unsigned char TX9:1;
1076 unsigned char CSRC:1;
1079 unsigned char TXD8:1;
1085 unsigned char NOT_TX8:1;
1095 unsigned char TX8_9:1;
1099 extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits;
1101 #ifndef NO_BIT_DEFINES
1102 #define TX9D TXSTA_bits.TX9D
1103 #define TXD8 TXSTA_bits.TXD8
1104 #define TRMT TXSTA_bits.TRMT
1105 #define BRGH TXSTA_bits.BRGH
1106 #define SYNC TXSTA_bits.SYNC
1107 #define TXEN TXSTA_bits.TXEN
1108 #define TX9 TXSTA_bits.TX9
1109 #define NOT_TX8 TXSTA_bits.NOT_TX8
1110 #define TX8_9 TXSTA_bits.TX8_9
1111 #define CSRC TXSTA_bits.CSRC
1112 #endif /* NO_BIT_DEFINES */