2 // Register Declarations for Microchip 16C73B Processor
5 // This header file was automatically generated by:
9 // Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved
11 // SDCC is licensed under the GNU Public license (GPL) v2. Note that
12 // this license covers the code to the compiler and other executables,
13 // but explicitly does not cover any code or objects generated by sdcc.
14 // We have not yet decided on a license for the run time libraries, but
15 // it will not put any requirements on code linked against it. See:
17 // http://www.gnu.org/copyleft/gpl/html
19 // See http://sdcc.sourceforge.net/ for the latest information on sdcc.
26 // Register addresses.
28 #define INDF_ADDR 0x0000
29 #define TMR0_ADDR 0x0001
30 #define PCL_ADDR 0x0002
31 #define STATUS_ADDR 0x0003
32 #define FSR_ADDR 0x0004
33 #define PORTA_ADDR 0x0005
34 #define PORTB_ADDR 0x0006
35 #define PORTC_ADDR 0x0007
36 #define PCLATH_ADDR 0x000A
37 #define INTCON_ADDR 0x000B
38 #define PIR1_ADDR 0x000C
39 #define PIR2_ADDR 0x000D
40 #define TMR1L_ADDR 0x000E
41 #define TMR1H_ADDR 0x000F
42 #define T1CON_ADDR 0x0010
43 #define TMR2_ADDR 0x0011
44 #define T2CON_ADDR 0x0012
45 #define SSPBUF_ADDR 0x0013
46 #define SSPCON_ADDR 0x0014
47 #define CCPR1L_ADDR 0x0015
48 #define CCPR1H_ADDR 0x0016
49 #define CCP1CON_ADDR 0x0017
50 #define RCSTA_ADDR 0x0018
51 #define TXREG_ADDR 0x0019
52 #define RCREG_ADDR 0x001A
53 #define CCPR2L_ADDR 0x001B
54 #define CCPR2H_ADDR 0x001C
55 #define CCP2CON_ADDR 0x001D
56 #define ADRES_ADDR 0x001E
57 #define ADCON0_ADDR 0x001F
58 #define OPTION_REG_ADDR 0x0081
59 #define TRISA_ADDR 0x0085
60 #define TRISB_ADDR 0x0086
61 #define TRISC_ADDR 0x0087
62 #define PIE1_ADDR 0x008C
63 #define PIE2_ADDR 0x008D
64 #define PCON_ADDR 0x008E
65 #define PR2_ADDR 0x0092
66 #define SSPADD_ADDR 0x0093
67 #define SSPSTAT_ADDR 0x0094
68 #define TXSTA_ADDR 0x0098
69 #define SPBRG_ADDR 0x0099
70 #define ADCON1_ADDR 0x009F
73 // Memory organization.
79 // P16C73B.INC Standard Header File, Version 1.00 Microchip Technology, Inc.
82 // This header file defines configurations, registers, and other useful bits of
83 // information for the PIC16C73B microcontroller. These names are taken to match
84 // the data sheets as closely as possible.
86 // Note that the processor must be selected before this file is
87 // included. The processor may be selected the following ways:
89 // 1. Command line switch:
90 // C:\ MPASM MYFILE.ASM /PIC16C73B
91 // 2. LIST directive in the source file
93 // 3. Processor Type entry in the MPASM full-screen interface
95 //==========================================================================
99 //==========================================================================
103 //1.00 17/12/97 Initial Release
105 //==========================================================================
109 //==========================================================================
112 // MESSG "Processor-header file mismatch. Verify selected processor."
115 //==========================================================================
117 // Register Definitions
119 //==========================================================================
124 //----- Register Files------------------------------------------------------
126 extern __sfr __at (INDF_ADDR) INDF;
127 extern __sfr __at (TMR0_ADDR) TMR0;
128 extern __sfr __at (PCL_ADDR) PCL;
129 extern __sfr __at (STATUS_ADDR) STATUS;
130 extern __sfr __at (FSR_ADDR) FSR;
131 extern __sfr __at (PORTA_ADDR) PORTA;
132 extern __sfr __at (PORTB_ADDR) PORTB;
133 extern __sfr __at (PORTC_ADDR) PORTC;
134 extern __sfr __at (PCLATH_ADDR) PCLATH;
135 extern __sfr __at (INTCON_ADDR) INTCON;
136 extern __sfr __at (PIR1_ADDR) PIR1;
137 extern __sfr __at (PIR2_ADDR) PIR2;
138 extern __sfr __at (TMR1L_ADDR) TMR1L;
139 extern __sfr __at (TMR1H_ADDR) TMR1H;
140 extern __sfr __at (T1CON_ADDR) T1CON;
141 extern __sfr __at (TMR2_ADDR) TMR2;
142 extern __sfr __at (T2CON_ADDR) T2CON;
143 extern __sfr __at (SSPBUF_ADDR) SSPBUF;
144 extern __sfr __at (SSPCON_ADDR) SSPCON;
145 extern __sfr __at (CCPR1L_ADDR) CCPR1L;
146 extern __sfr __at (CCPR1H_ADDR) CCPR1H;
147 extern __sfr __at (CCP1CON_ADDR) CCP1CON;
148 extern __sfr __at (RCSTA_ADDR) RCSTA;
149 extern __sfr __at (TXREG_ADDR) TXREG;
150 extern __sfr __at (RCREG_ADDR) RCREG;
151 extern __sfr __at (CCPR2L_ADDR) CCPR2L;
152 extern __sfr __at (CCPR2H_ADDR) CCPR2H;
153 extern __sfr __at (CCP2CON_ADDR) CCP2CON;
154 extern __sfr __at (ADRES_ADDR) ADRES;
155 extern __sfr __at (ADCON0_ADDR) ADCON0;
157 extern __sfr __at (OPTION_REG_ADDR) OPTION_REG;
158 extern __sfr __at (TRISA_ADDR) TRISA;
159 extern __sfr __at (TRISB_ADDR) TRISB;
160 extern __sfr __at (TRISC_ADDR) TRISC;
161 extern __sfr __at (PIE1_ADDR) PIE1;
162 extern __sfr __at (PIE2_ADDR) PIE2;
163 extern __sfr __at (PCON_ADDR) PCON;
164 extern __sfr __at (PR2_ADDR) PR2;
165 extern __sfr __at (SSPADD_ADDR) SSPADD;
166 extern __sfr __at (SSPSTAT_ADDR) SSPSTAT;
167 extern __sfr __at (TXSTA_ADDR) TXSTA;
168 extern __sfr __at (SPBRG_ADDR) SPBRG;
169 extern __sfr __at (ADCON1_ADDR) ADCON1;
171 //----- STATUS Bits --------------------------------------------------------
174 //----- INTCON Bits --------------------------------------------------------
177 //----- PIR1 Bits ----------------------------------------------------------
180 //----- PIR2 Bits ----------------------------------------------------------
183 //----- T1CON Bits ---------------------------------------------------------
186 //----- T2CON Bits ---------------------------------------------------------
189 //----- SSPCON Bits --------------------------------------------------------
192 //----- CCP1CON Bits -------------------------------------------------------
195 //----- RCSTA Bits ---------------------------------------------------------
198 //----- CCP2CON Bits -------------------------------------------------------
201 //----- ADCON0 Bits --------------------------------------------------------
204 //----- OPTION Bits --------------------------------------------------------
207 //----- PIE1 Bits ----------------------------------------------------------
210 //----- PIE2 Bits ----------------------------------------------------------
213 //----- PCON Bits ----------------------------------------------------------
216 //----- SSPSTAT Bits -------------------------------------------------------
219 //----- TXSTA Bits ---------------------------------------------------------
222 //----- ADCON1 Bits --------------------------------------------------------
225 //==========================================================================
229 //==========================================================================
232 // __BADRAM H'08'-H'09'
233 // __BADRAM H'88'-H'89', H'8F'-H'91', H'95'-H'97', H'9A'-H'9E'
235 //==========================================================================
237 // Configuration Bits
239 //==========================================================================
241 #define _BODEN_ON 0x3FFF
242 #define _BODEN_OFF 0x3FBF
243 #define _CP_ALL 0x00CF
244 #define _CP_75 0x15DF
245 #define _CP_50 0x2AEF
246 #define _CP_OFF 0x3FFF
247 #define _PWRTE_OFF 0x3FFF
248 #define _PWRTE_ON 0x3FF7
249 #define _WDT_ON 0x3FFF
250 #define _WDT_OFF 0x3FFB
251 #define _LP_OSC 0x3FFC
252 #define _XT_OSC 0x3FFD
253 #define _HS_OSC 0x3FFE
254 #define _RC_OSC 0x3FFF
258 // ----- ADCON0 bits --------------------
261 unsigned char ADON:1;
264 unsigned char CHS0:1;
265 unsigned char CHS1:1;
266 unsigned char CHS2:1;
267 unsigned char ADCS0:1;
268 unsigned char ADCS1:1;
273 unsigned char NOT_DONE:1;
283 unsigned char GO_DONE:1;
291 extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits;
293 #ifndef NO_BIT_DEFINES
294 #define ADON ADCON0_bits.ADON
295 #define GO ADCON0_bits.GO
296 #define NOT_DONE ADCON0_bits.NOT_DONE
297 #define GO_DONE ADCON0_bits.GO_DONE
298 #define CHS0 ADCON0_bits.CHS0
299 #define CHS1 ADCON0_bits.CHS1
300 #define CHS2 ADCON0_bits.CHS2
301 #define ADCS0 ADCON0_bits.ADCS0
302 #define ADCS1 ADCON0_bits.ADCS1
303 #endif /* NO_BIT_DEFINES */
305 // ----- ADCON1 bits --------------------
308 unsigned char PCFG0:1;
309 unsigned char PCFG1:1;
310 unsigned char PCFG2:1;
318 extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits;
320 #ifndef NO_BIT_DEFINES
321 #define PCFG0 ADCON1_bits.PCFG0
322 #define PCFG1 ADCON1_bits.PCFG1
323 #define PCFG2 ADCON1_bits.PCFG2
324 #endif /* NO_BIT_DEFINES */
326 // ----- CCP1CON bits --------------------
329 unsigned char CCP1M0:1;
330 unsigned char CCP1M1:1;
331 unsigned char CCP1M2:1;
332 unsigned char CCP1M3:1;
333 unsigned char CCP1Y:1;
334 unsigned char CCP1X:1;
339 extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits;
341 #ifndef NO_BIT_DEFINES
342 #define CCP1M0 CCP1CON_bits.CCP1M0
343 #define CCP1M1 CCP1CON_bits.CCP1M1
344 #define CCP1M2 CCP1CON_bits.CCP1M2
345 #define CCP1M3 CCP1CON_bits.CCP1M3
346 #define CCP1Y CCP1CON_bits.CCP1Y
347 #define CCP1X CCP1CON_bits.CCP1X
348 #endif /* NO_BIT_DEFINES */
350 // ----- CCP2CON bits --------------------
353 unsigned char CCP2M0:1;
354 unsigned char CCP2M1:1;
355 unsigned char CCP2M2:1;
356 unsigned char CCP2M3:1;
357 unsigned char CCP2Y:1;
358 unsigned char CCP2X:1;
363 extern volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits;
365 #ifndef NO_BIT_DEFINES
366 #define CCP2M0 CCP2CON_bits.CCP2M0
367 #define CCP2M1 CCP2CON_bits.CCP2M1
368 #define CCP2M2 CCP2CON_bits.CCP2M2
369 #define CCP2M3 CCP2CON_bits.CCP2M3
370 #define CCP2Y CCP2CON_bits.CCP2Y
371 #define CCP2X CCP2CON_bits.CCP2X
372 #endif /* NO_BIT_DEFINES */
374 // ----- INTCON bits --------------------
377 unsigned char RBIF:1;
378 unsigned char INTF:1;
379 unsigned char T0IF:1;
380 unsigned char RBIE:1;
381 unsigned char INTE:1;
382 unsigned char T0IE:1;
383 unsigned char PEIE:1;
387 extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits;
389 #ifndef NO_BIT_DEFINES
390 #define RBIF INTCON_bits.RBIF
391 #define INTF INTCON_bits.INTF
392 #define T0IF INTCON_bits.T0IF
393 #define RBIE INTCON_bits.RBIE
394 #define INTE INTCON_bits.INTE
395 #define T0IE INTCON_bits.T0IE
396 #define PEIE INTCON_bits.PEIE
397 #define GIE INTCON_bits.GIE
398 #endif /* NO_BIT_DEFINES */
400 // ----- OPTION_REG bits --------------------
407 unsigned char T0SE:1;
408 unsigned char T0CS:1;
409 unsigned char INTEDG:1;
410 unsigned char NOT_RBPU:1;
412 } __OPTION_REG_bits_t;
413 extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits;
415 #ifndef NO_BIT_DEFINES
416 #define PS0 OPTION_REG_bits.PS0
417 #define PS1 OPTION_REG_bits.PS1
418 #define PS2 OPTION_REG_bits.PS2
419 #define PSA OPTION_REG_bits.PSA
420 #define T0SE OPTION_REG_bits.T0SE
421 #define T0CS OPTION_REG_bits.T0CS
422 #define INTEDG OPTION_REG_bits.INTEDG
423 #define NOT_RBPU OPTION_REG_bits.NOT_RBPU
424 #endif /* NO_BIT_DEFINES */
426 // ----- PCON bits --------------------
429 unsigned char NOT_BO:1;
430 unsigned char NOT_POR:1;
439 unsigned char NOT_BOR:1;
449 extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits;
451 #ifndef NO_BIT_DEFINES
452 #define NOT_BO PCON_bits.NOT_BO
453 #define NOT_BOR PCON_bits.NOT_BOR
454 #define NOT_POR PCON_bits.NOT_POR
455 #endif /* NO_BIT_DEFINES */
457 // ----- PIE1 bits --------------------
460 unsigned char TMR1IE:1;
461 unsigned char TMR2IE:1;
462 unsigned char CCP1IE:1;
463 unsigned char SSPIE:1;
464 unsigned char TXIE:1;
465 unsigned char RCIE:1;
466 unsigned char ADIE:1;
470 extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits;
472 #ifndef NO_BIT_DEFINES
473 #define TMR1IE PIE1_bits.TMR1IE
474 #define TMR2IE PIE1_bits.TMR2IE
475 #define CCP1IE PIE1_bits.CCP1IE
476 #define SSPIE PIE1_bits.SSPIE
477 #define TXIE PIE1_bits.TXIE
478 #define RCIE PIE1_bits.RCIE
479 #define ADIE PIE1_bits.ADIE
480 #endif /* NO_BIT_DEFINES */
482 // ----- PIE2 bits --------------------
485 unsigned char CCP2IE:1;
495 extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits;
497 #ifndef NO_BIT_DEFINES
498 #define CCP2IE PIE2_bits.CCP2IE
499 #endif /* NO_BIT_DEFINES */
501 // ----- PIR1 bits --------------------
504 unsigned char TMR1IF:1;
505 unsigned char TMR2IF:1;
506 unsigned char CCP1IF:1;
507 unsigned char SSPIF:1;
508 unsigned char TXIF:1;
509 unsigned char RCIF:1;
510 unsigned char ADIF:1;
514 extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits;
516 #ifndef NO_BIT_DEFINES
517 #define TMR1IF PIR1_bits.TMR1IF
518 #define TMR2IF PIR1_bits.TMR2IF
519 #define CCP1IF PIR1_bits.CCP1IF
520 #define SSPIF PIR1_bits.SSPIF
521 #define TXIF PIR1_bits.TXIF
522 #define RCIF PIR1_bits.RCIF
523 #define ADIF PIR1_bits.ADIF
524 #endif /* NO_BIT_DEFINES */
526 // ----- PIR2 bits --------------------
529 unsigned char CCP2IF:1;
539 extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits;
541 #ifndef NO_BIT_DEFINES
542 #define CCP2IF PIR2_bits.CCP2IF
543 #endif /* NO_BIT_DEFINES */
545 // ----- PORTA bits --------------------
558 extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits;
560 #ifndef NO_BIT_DEFINES
561 #define RA0 PORTA_bits.RA0
562 #define RA1 PORTA_bits.RA1
563 #define RA2 PORTA_bits.RA2
564 #define RA3 PORTA_bits.RA3
565 #define RA4 PORTA_bits.RA4
566 #define RA5 PORTA_bits.RA5
567 #endif /* NO_BIT_DEFINES */
569 // ----- PORTB bits --------------------
582 extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits;
584 #ifndef NO_BIT_DEFINES
585 #define RB0 PORTB_bits.RB0
586 #define RB1 PORTB_bits.RB1
587 #define RB2 PORTB_bits.RB2
588 #define RB3 PORTB_bits.RB3
589 #define RB4 PORTB_bits.RB4
590 #define RB5 PORTB_bits.RB5
591 #define RB6 PORTB_bits.RB6
592 #define RB7 PORTB_bits.RB7
593 #endif /* NO_BIT_DEFINES */
595 // ----- PORTC bits --------------------
608 extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits;
610 #ifndef NO_BIT_DEFINES
611 #define RC0 PORTC_bits.RC0
612 #define RC1 PORTC_bits.RC1
613 #define RC2 PORTC_bits.RC2
614 #define RC3 PORTC_bits.RC3
615 #define RC4 PORTC_bits.RC4
616 #define RC5 PORTC_bits.RC5
617 #define RC6 PORTC_bits.RC6
618 #define RC7 PORTC_bits.RC7
619 #endif /* NO_BIT_DEFINES */
621 // ----- RCSTA bits --------------------
624 unsigned char RX9D:1;
625 unsigned char OERR:1;
626 unsigned char FERR:1;
628 unsigned char CREN:1;
629 unsigned char SREN:1;
631 unsigned char SPEN:1;
634 unsigned char RCD8:1;
650 unsigned char NOT_RC8:1;
660 unsigned char RC8_9:1;
664 extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits;
666 #ifndef NO_BIT_DEFINES
667 #define RX9D RCSTA_bits.RX9D
668 #define RCD8 RCSTA_bits.RCD8
669 #define OERR RCSTA_bits.OERR
670 #define FERR RCSTA_bits.FERR
671 #define CREN RCSTA_bits.CREN
672 #define SREN RCSTA_bits.SREN
673 #define RX9 RCSTA_bits.RX9
674 #define RC9 RCSTA_bits.RC9
675 #define NOT_RC8 RCSTA_bits.NOT_RC8
676 #define RC8_9 RCSTA_bits.RC8_9
677 #define SPEN RCSTA_bits.SPEN
678 #endif /* NO_BIT_DEFINES */
680 // ----- SSPCON bits --------------------
683 unsigned char SSPM0:1;
684 unsigned char SSPM1:1;
685 unsigned char SSPM2:1;
686 unsigned char SSPM3:1;
688 unsigned char SSPEN:1;
689 unsigned char SSPOV:1;
690 unsigned char WCOL:1;
693 extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits;
695 #ifndef NO_BIT_DEFINES
696 #define SSPM0 SSPCON_bits.SSPM0
697 #define SSPM1 SSPCON_bits.SSPM1
698 #define SSPM2 SSPCON_bits.SSPM2
699 #define SSPM3 SSPCON_bits.SSPM3
700 #define CKP SSPCON_bits.CKP
701 #define SSPEN SSPCON_bits.SSPEN
702 #define SSPOV SSPCON_bits.SSPOV
703 #define WCOL SSPCON_bits.WCOL
704 #endif /* NO_BIT_DEFINES */
706 // ----- SSPSTAT bits --------------------
721 unsigned char I2C_READ:1;
722 unsigned char I2C_START:1;
723 unsigned char I2C_STOP:1;
724 unsigned char I2C_DATA:1;
731 unsigned char NOT_W:1;
734 unsigned char NOT_A:1;
741 unsigned char NOT_WRITE:1;
744 unsigned char NOT_ADDRESS:1;
761 unsigned char READ_WRITE:1;
764 unsigned char DATA_ADDRESS:1;
769 extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits;
771 #ifndef NO_BIT_DEFINES
772 #define BF SSPSTAT_bits.BF
773 #define UA SSPSTAT_bits.UA
774 #define R SSPSTAT_bits.R
775 #define I2C_READ SSPSTAT_bits.I2C_READ
776 #define NOT_W SSPSTAT_bits.NOT_W
777 #define NOT_WRITE SSPSTAT_bits.NOT_WRITE
778 #define R_W SSPSTAT_bits.R_W
779 #define READ_WRITE SSPSTAT_bits.READ_WRITE
780 #define S SSPSTAT_bits.S
781 #define I2C_START SSPSTAT_bits.I2C_START
782 #define P SSPSTAT_bits.P
783 #define I2C_STOP SSPSTAT_bits.I2C_STOP
784 #define D SSPSTAT_bits.D
785 #define I2C_DATA SSPSTAT_bits.I2C_DATA
786 #define NOT_A SSPSTAT_bits.NOT_A
787 #define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS
788 #define D_A SSPSTAT_bits.D_A
789 #define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS
790 #define CKE SSPSTAT_bits.CKE
791 #define SMP SSPSTAT_bits.SMP
792 #endif /* NO_BIT_DEFINES */
794 // ----- STATUS bits --------------------
800 unsigned char NOT_PD:1;
801 unsigned char NOT_TO:1;
807 extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits;
809 #ifndef NO_BIT_DEFINES
810 #define C STATUS_bits.C
811 #define DC STATUS_bits.DC
812 #define Z STATUS_bits.Z
813 #define NOT_PD STATUS_bits.NOT_PD
814 #define NOT_TO STATUS_bits.NOT_TO
815 #define RP0 STATUS_bits.RP0
816 #define RP1 STATUS_bits.RP1
817 #define IRP STATUS_bits.IRP
818 #endif /* NO_BIT_DEFINES */
820 // ----- T1CON bits --------------------
823 unsigned char TMR1ON:1;
824 unsigned char TMR1CS:1;
825 unsigned char NOT_T1SYNC:1;
826 unsigned char T1OSCEN:1;
827 unsigned char T1CKPS0:1;
828 unsigned char T1CKPS1:1;
835 unsigned char T1INSYNC:1;
843 extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits;
845 #ifndef NO_BIT_DEFINES
846 #define TMR1ON T1CON_bits.TMR1ON
847 #define TMR1CS T1CON_bits.TMR1CS
848 #define NOT_T1SYNC T1CON_bits.NOT_T1SYNC
849 #define T1INSYNC T1CON_bits.T1INSYNC
850 #define T1OSCEN T1CON_bits.T1OSCEN
851 #define T1CKPS0 T1CON_bits.T1CKPS0
852 #define T1CKPS1 T1CON_bits.T1CKPS1
853 #endif /* NO_BIT_DEFINES */
855 // ----- T2CON bits --------------------
858 unsigned char T2CKPS0:1;
859 unsigned char T2CKPS1:1;
860 unsigned char TMR2ON:1;
861 unsigned char TOUTPS0:1;
862 unsigned char TOUTPS1:1;
863 unsigned char TOUTPS2:1;
864 unsigned char TOUTPS3:1;
868 extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits;
870 #ifndef NO_BIT_DEFINES
871 #define T2CKPS0 T2CON_bits.T2CKPS0
872 #define T2CKPS1 T2CON_bits.T2CKPS1
873 #define TMR2ON T2CON_bits.TMR2ON
874 #define TOUTPS0 T2CON_bits.TOUTPS0
875 #define TOUTPS1 T2CON_bits.TOUTPS1
876 #define TOUTPS2 T2CON_bits.TOUTPS2
877 #define TOUTPS3 T2CON_bits.TOUTPS3
878 #endif /* NO_BIT_DEFINES */
880 // ----- TRISA bits --------------------
883 unsigned char TRISA0:1;
884 unsigned char TRISA1:1;
885 unsigned char TRISA2:1;
886 unsigned char TRISA3:1;
887 unsigned char TRISA4:1;
888 unsigned char TRISA5:1;
893 extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits;
895 #ifndef NO_BIT_DEFINES
896 #define TRISA0 TRISA_bits.TRISA0
897 #define TRISA1 TRISA_bits.TRISA1
898 #define TRISA2 TRISA_bits.TRISA2
899 #define TRISA3 TRISA_bits.TRISA3
900 #define TRISA4 TRISA_bits.TRISA4
901 #define TRISA5 TRISA_bits.TRISA5
902 #endif /* NO_BIT_DEFINES */
904 // ----- TRISB bits --------------------
907 unsigned char TRISB0:1;
908 unsigned char TRISB1:1;
909 unsigned char TRISB2:1;
910 unsigned char TRISB3:1;
911 unsigned char TRISB4:1;
912 unsigned char TRISB5:1;
913 unsigned char TRISB6:1;
914 unsigned char TRISB7:1;
917 extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits;
919 #ifndef NO_BIT_DEFINES
920 #define TRISB0 TRISB_bits.TRISB0
921 #define TRISB1 TRISB_bits.TRISB1
922 #define TRISB2 TRISB_bits.TRISB2
923 #define TRISB3 TRISB_bits.TRISB3
924 #define TRISB4 TRISB_bits.TRISB4
925 #define TRISB5 TRISB_bits.TRISB5
926 #define TRISB6 TRISB_bits.TRISB6
927 #define TRISB7 TRISB_bits.TRISB7
928 #endif /* NO_BIT_DEFINES */
930 // ----- TRISC bits --------------------
933 unsigned char TRISC0:1;
934 unsigned char TRISC1:1;
935 unsigned char TRISC2:1;
936 unsigned char TRISC3:1;
937 unsigned char TRISC4:1;
938 unsigned char TRISC5:1;
939 unsigned char TRISC6:1;
940 unsigned char TRISC7:1;
943 extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits;
945 #ifndef NO_BIT_DEFINES
946 #define TRISC0 TRISC_bits.TRISC0
947 #define TRISC1 TRISC_bits.TRISC1
948 #define TRISC2 TRISC_bits.TRISC2
949 #define TRISC3 TRISC_bits.TRISC3
950 #define TRISC4 TRISC_bits.TRISC4
951 #define TRISC5 TRISC_bits.TRISC5
952 #define TRISC6 TRISC_bits.TRISC6
953 #define TRISC7 TRISC_bits.TRISC7
954 #endif /* NO_BIT_DEFINES */
956 // ----- TXSTA bits --------------------
959 unsigned char TX9D:1;
960 unsigned char TRMT:1;
961 unsigned char BRGH:1;
963 unsigned char SYNC:1;
964 unsigned char TXEN:1;
966 unsigned char CSRC:1;
969 unsigned char TXD8:1;
975 unsigned char NOT_TX8:1;
985 unsigned char TX8_9:1;
989 extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits;
991 #ifndef NO_BIT_DEFINES
992 #define TX9D TXSTA_bits.TX9D
993 #define TXD8 TXSTA_bits.TXD8
994 #define TRMT TXSTA_bits.TRMT
995 #define BRGH TXSTA_bits.BRGH
996 #define SYNC TXSTA_bits.SYNC
997 #define TXEN TXSTA_bits.TXEN
998 #define TX9 TXSTA_bits.TX9
999 #define NOT_TX8 TXSTA_bits.NOT_TX8
1000 #define TX8_9 TXSTA_bits.TX8_9
1001 #define CSRC TXSTA_bits.CSRC
1002 #endif /* NO_BIT_DEFINES */