2 // Register Declarations for Microchip 16C715 Processor
5 // This header file was automatically generated by:
9 // Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved
11 // SDCC is licensed under the GNU Public license (GPL) v2. Note that
12 // this license covers the code to the compiler and other executables,
13 // but explicitly does not cover any code or objects generated by sdcc.
14 // We have not yet decided on a license for the run time libraries, but
15 // it will not put any requirements on code linked against it. See:
17 // http://www.gnu.org/copyleft/gpl/html
19 // See http://sdcc.sourceforge.net/ for the latest information on sdcc.
26 // Register addresses.
28 #define INDF_ADDR 0x0000
29 #define TMR0_ADDR 0x0001
30 #define PCL_ADDR 0x0002
31 #define STATUS_ADDR 0x0003
32 #define FSR_ADDR 0x0004
33 #define PORTA_ADDR 0x0005
34 #define PORTB_ADDR 0x0006
35 #define PCLATH_ADDR 0x000A
36 #define INTCON_ADDR 0x000B
37 #define PIR1_ADDR 0x000C
38 #define ADRES_ADDR 0x001E
39 #define ADCON0_ADDR 0x001F
40 #define OPTION_REG_ADDR 0x0081
41 #define TRISA_ADDR 0x0085
42 #define TRISB_ADDR 0x0086
43 #define PIE1_ADDR 0x008C
44 #define PCON_ADDR 0x008E
45 #define ADCON1_ADDR 0x009F
48 // Memory organization.
54 // P16C715.INC Standard Header File, Version 1.01 Microchip Technology, Inc.
57 // This header file defines configurations, registers, and other useful bits of
58 // information for the PIC16C715 microcontroller. These names are taken to match
59 // the data sheets as closely as possible.
61 // Note that the processor must be selected before this file is
62 // included. The processor may be selected the following ways:
64 // 1. Command line switch:
65 // C:\ MPASM MYFILE.ASM /PIC16C715
66 // 2. LIST directive in the source file
68 // 3. Processor Type entry in the MPASM full-screen interface
70 //==========================================================================
74 //==========================================================================
78 //1.01 05/12/97 Added values for Parity Enable configuration bits
79 //1.00 04/11/96 Initial Release
81 //==========================================================================
85 //==========================================================================
88 // MESSG "Processor-header file mismatch. Verify selected processor."
91 //==========================================================================
93 // Register Definitions
95 //==========================================================================
100 //----- Register Files------------------------------------------------------
102 extern __sfr __at (INDF_ADDR) INDF;
103 extern __sfr __at (TMR0_ADDR) TMR0;
104 extern __sfr __at (PCL_ADDR) PCL;
105 extern __sfr __at (STATUS_ADDR) STATUS;
106 extern __sfr __at (FSR_ADDR) FSR;
107 extern __sfr __at (PORTA_ADDR) PORTA;
108 extern __sfr __at (PORTB_ADDR) PORTB;
109 extern __sfr __at (PCLATH_ADDR) PCLATH;
110 extern __sfr __at (INTCON_ADDR) INTCON;
111 extern __sfr __at (PIR1_ADDR) PIR1;
112 extern __sfr __at (ADRES_ADDR) ADRES;
113 extern __sfr __at (ADCON0_ADDR) ADCON0;
115 extern __sfr __at (OPTION_REG_ADDR) OPTION_REG;
116 extern __sfr __at (TRISA_ADDR) TRISA;
117 extern __sfr __at (TRISB_ADDR) TRISB;
118 extern __sfr __at (PIE1_ADDR) PIE1;
119 extern __sfr __at (PCON_ADDR) PCON;
120 extern __sfr __at (ADCON1_ADDR) ADCON1;
122 //----- STATUS Bits --------------------------------------------------------
125 //----- INTCON Bits --------------------------------------------------------
128 //----- PIR1 Bits ----------------------------------------------------------
131 //----- ADCON0 Bits --------------------------------------------------------
134 //----- OPTION Bits --------------------------------------------------------
137 //----- PIE1 Bits ----------------------------------------------------------
140 //----- PCON Bits ----------------------------------------------------------
143 //----- ADCON1 Bits --------------------------------------------------------
146 //==========================================================================
150 //==========================================================================
153 // __BADRAM H'07'-H'09', H'0D'-H'1D'
154 // __BADRAM H'87'-H'89', H'8D', H'8F'-H'9E', H'C0'-H'EF'
156 //==========================================================================
158 // Configuration Bits
160 //==========================================================================
162 #define _MPEEN_ON 0x3FFF
163 #define _MPEEN_OFF 0x3F7F
164 #define _BODEN_ON 0x3FFF
165 #define _BODEN_OFF 0x3FBF
166 #define _CP_ALL 0x00CF
167 #define _CP_50 0x15DF
168 #define _CP_OFF 0x3FFF
169 #define _PWRTE_OFF 0x3FFF
170 #define _PWRTE_ON 0x3FF7
171 #define _WDT_ON 0x3FFF
172 #define _WDT_OFF 0x3FFB
173 #define _LP_OSC 0x3FFC
174 #define _XT_OSC 0x3FFD
175 #define _HS_OSC 0x3FFE
176 #define _RC_OSC 0x3FFF
180 // ----- ADCON0 bits --------------------
183 unsigned char ADON:1;
186 unsigned char CHS0:1;
187 unsigned char CHS1:1;
188 unsigned char CHS2:1;
189 unsigned char ADCS0:1;
190 unsigned char ADCS1:1;
195 unsigned char NOT_DONE:1;
205 unsigned char GO_DONE:1;
213 extern volatile __ADCON0_bits_t __at(ADCON0_ADDR) ADCON0_bits;
215 #ifndef NO_BIT_DEFINES
216 #define ADON ADCON0_bits.ADON
217 #define GO ADCON0_bits.GO
218 #define NOT_DONE ADCON0_bits.NOT_DONE
219 #define GO_DONE ADCON0_bits.GO_DONE
220 #define CHS0 ADCON0_bits.CHS0
221 #define CHS1 ADCON0_bits.CHS1
222 #define CHS2 ADCON0_bits.CHS2
223 #define ADCS0 ADCON0_bits.ADCS0
224 #define ADCS1 ADCON0_bits.ADCS1
225 #endif /* NO_BIT_DEFINES */
227 // ----- ADCON1 bits --------------------
230 unsigned char PCFG0:1;
231 unsigned char PCFG1:1;
240 extern volatile __ADCON1_bits_t __at(ADCON1_ADDR) ADCON1_bits;
242 #ifndef NO_BIT_DEFINES
243 #define PCFG0 ADCON1_bits.PCFG0
244 #define PCFG1 ADCON1_bits.PCFG1
245 #endif /* NO_BIT_DEFINES */
247 // ----- INTCON bits --------------------
250 unsigned char RBIF:1;
251 unsigned char INTF:1;
252 unsigned char T0IF:1;
253 unsigned char RBIE:1;
254 unsigned char INTE:1;
255 unsigned char T0IE:1;
256 unsigned char PEIE:1;
260 extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits;
262 #ifndef NO_BIT_DEFINES
263 #define RBIF INTCON_bits.RBIF
264 #define INTF INTCON_bits.INTF
265 #define T0IF INTCON_bits.T0IF
266 #define RBIE INTCON_bits.RBIE
267 #define INTE INTCON_bits.INTE
268 #define T0IE INTCON_bits.T0IE
269 #define PEIE INTCON_bits.PEIE
270 #define GIE INTCON_bits.GIE
271 #endif /* NO_BIT_DEFINES */
273 // ----- OPTION_REG bits --------------------
280 unsigned char T0SE:1;
281 unsigned char T0CS:1;
282 unsigned char INTEDG:1;
283 unsigned char NOT_RBPU:1;
285 } __OPTION_REG_bits_t;
286 extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits;
288 #ifndef NO_BIT_DEFINES
289 #define PS0 OPTION_REG_bits.PS0
290 #define PS1 OPTION_REG_bits.PS1
291 #define PS2 OPTION_REG_bits.PS2
292 #define PSA OPTION_REG_bits.PSA
293 #define T0SE OPTION_REG_bits.T0SE
294 #define T0CS OPTION_REG_bits.T0CS
295 #define INTEDG OPTION_REG_bits.INTEDG
296 #define NOT_RBPU OPTION_REG_bits.NOT_RBPU
297 #endif /* NO_BIT_DEFINES */
299 // ----- PCON bits --------------------
302 unsigned char NOT_BO:1;
303 unsigned char NOT_POR:1;
304 unsigned char NOT_MPE:1;
312 unsigned char NOT_BOR:1;
322 extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits;
324 #ifndef NO_BIT_DEFINES
325 #define NOT_BO PCON_bits.NOT_BO
326 #define NOT_BOR PCON_bits.NOT_BOR
327 #define NOT_POR PCON_bits.NOT_POR
328 #define NOT_MPE PCON_bits.NOT_MPE
329 #endif /* NO_BIT_DEFINES */
331 // ----- PIE1 bits --------------------
340 unsigned char ADIE:1;
344 extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits;
346 #ifndef NO_BIT_DEFINES
347 #define ADIE PIE1_bits.ADIE
348 #endif /* NO_BIT_DEFINES */
350 // ----- PIR1 bits --------------------
359 unsigned char ADIF:1;
363 extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits;
365 #ifndef NO_BIT_DEFINES
366 #define ADIF PIR1_bits.ADIF
367 #endif /* NO_BIT_DEFINES */
369 // ----- PORTA bits --------------------
382 extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits;
384 #ifndef NO_BIT_DEFINES
385 #define RA0 PORTA_bits.RA0
386 #define RA1 PORTA_bits.RA1
387 #define RA2 PORTA_bits.RA2
388 #define RA3 PORTA_bits.RA3
389 #define RA4 PORTA_bits.RA4
390 #define RA5 PORTA_bits.RA5
391 #endif /* NO_BIT_DEFINES */
393 // ----- PORTB bits --------------------
406 extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits;
408 #ifndef NO_BIT_DEFINES
409 #define RB0 PORTB_bits.RB0
410 #define RB1 PORTB_bits.RB1
411 #define RB2 PORTB_bits.RB2
412 #define RB3 PORTB_bits.RB3
413 #define RB4 PORTB_bits.RB4
414 #define RB5 PORTB_bits.RB5
415 #define RB6 PORTB_bits.RB6
416 #define RB7 PORTB_bits.RB7
417 #endif /* NO_BIT_DEFINES */
419 // ----- STATUS bits --------------------
425 unsigned char NOT_PD:1;
426 unsigned char NOT_TO:1;
432 extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits;
434 #ifndef NO_BIT_DEFINES
435 #define C STATUS_bits.C
436 #define DC STATUS_bits.DC
437 #define Z STATUS_bits.Z
438 #define NOT_PD STATUS_bits.NOT_PD
439 #define NOT_TO STATUS_bits.NOT_TO
440 #define RP0 STATUS_bits.RP0
441 #define RP1 STATUS_bits.RP1
442 #define IRP STATUS_bits.IRP
443 #endif /* NO_BIT_DEFINES */
445 // ----- TRISA bits --------------------
448 unsigned char TRISA0:1;
449 unsigned char TRISA1:1;
450 unsigned char TRISA2:1;
451 unsigned char TRISA3:1;
452 unsigned char TRISA4:1;
453 unsigned char TRISA5:1;
458 extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits;
460 #ifndef NO_BIT_DEFINES
461 #define TRISA0 TRISA_bits.TRISA0
462 #define TRISA1 TRISA_bits.TRISA1
463 #define TRISA2 TRISA_bits.TRISA2
464 #define TRISA3 TRISA_bits.TRISA3
465 #define TRISA4 TRISA_bits.TRISA4
466 #define TRISA5 TRISA_bits.TRISA5
467 #endif /* NO_BIT_DEFINES */
469 // ----- TRISB bits --------------------
472 unsigned char TRISB0:1;
473 unsigned char TRISB1:1;
474 unsigned char TRISB2:1;
475 unsigned char TRISB3:1;
476 unsigned char TRISB4:1;
477 unsigned char TRISB5:1;
478 unsigned char TRISB6:1;
479 unsigned char TRISB7:1;
482 extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits;
484 #ifndef NO_BIT_DEFINES
485 #define TRISB0 TRISB_bits.TRISB0
486 #define TRISB1 TRISB_bits.TRISB1
487 #define TRISB2 TRISB_bits.TRISB2
488 #define TRISB3 TRISB_bits.TRISB3
489 #define TRISB4 TRISB_bits.TRISB4
490 #define TRISB5 TRISB_bits.TRISB5
491 #define TRISB6 TRISB_bits.TRISB6
492 #define TRISB7 TRISB_bits.TRISB7
493 #endif /* NO_BIT_DEFINES */