2 // Register Declarations for Microchip 16C65B Processor
5 // This header file was automatically generated by:
9 // Copyright (c) 2002, Kevin L. Pauba, All Rights Reserved
11 // SDCC is licensed under the GNU Public license (GPL) v2. Note that
12 // this license covers the code to the compiler and other executables,
13 // but explicitly does not cover any code or objects generated by sdcc.
14 // We have not yet decided on a license for the run time libraries, but
15 // it will not put any requirements on code linked against it. See:
17 // http://www.gnu.org/copyleft/gpl/html
19 // See http://sdcc.sourceforge.net/ for the latest information on sdcc.
26 // Register addresses.
28 #define INDF_ADDR 0x0000
29 #define TMR0_ADDR 0x0001
30 #define PCL_ADDR 0x0002
31 #define STATUS_ADDR 0x0003
32 #define FSR_ADDR 0x0004
33 #define PORTA_ADDR 0x0005
34 #define PORTB_ADDR 0x0006
35 #define PORTC_ADDR 0x0007
36 #define PORTD_ADDR 0x0008
37 #define PORTE_ADDR 0x0009
38 #define PCLATH_ADDR 0x000A
39 #define INTCON_ADDR 0x000B
40 #define PIR1_ADDR 0x000C
41 #define PIR2_ADDR 0x000D
42 #define TMR1L_ADDR 0x000E
43 #define TMR1H_ADDR 0x000F
44 #define T1CON_ADDR 0x0010
45 #define TMR2_ADDR 0x0011
46 #define T2CON_ADDR 0x0012
47 #define SSPBUF_ADDR 0x0013
48 #define SSPCON_ADDR 0x0014
49 #define CCPR1L_ADDR 0x0015
50 #define CCPR1H_ADDR 0x0016
51 #define CCP1CON_ADDR 0x0017
52 #define RCSTA_ADDR 0x0018
53 #define TXREG_ADDR 0x0019
54 #define RCREG_ADDR 0x001A
55 #define CCPR2L_ADDR 0x001B
56 #define CCPR2H_ADDR 0x001C
57 #define CCP2CON_ADDR 0x001D
58 #define OPTION_REG_ADDR 0x0081
59 #define TRISA_ADDR 0x0085
60 #define TRISB_ADDR 0x0086
61 #define TRISC_ADDR 0x0087
62 #define TRISD_ADDR 0x0088
63 #define TRISE_ADDR 0x0089
64 #define PIE1_ADDR 0x008C
65 #define PIE2_ADDR 0x008D
66 #define PCON_ADDR 0x008E
67 #define PR2_ADDR 0x0092
68 #define SSPADD_ADDR 0x0093
69 #define SSPSTAT_ADDR 0x0094
70 #define TXSTA_ADDR 0x0098
71 #define SPBRG_ADDR 0x0099
74 // Memory organization.
80 // P16C65B.INC Standard Header File, Version 1.00 Microchip Technology, Inc.
83 // This header file defines configurations, registers, and other useful bits of
84 // information for the PIC16C65B microcontroller. These names are taken to match
85 // the data sheets as closely as possible.
87 // Note that the processor must be selected before this file is
88 // included. The processor may be selected the following ways:
90 // 1. Command line switch:
91 // C:\ MPASM MYFILE.ASM /PIC16C65B
92 // 2. LIST directive in the source file
94 // 3. Processor Type entry in the MPASM full-screen interface
96 //==========================================================================
100 //==========================================================================
104 //1.00 12/17/97 Initial Release
106 //==========================================================================
110 //==========================================================================
113 // MESSG "Processor-header file mismatch. Verify selected processor."
116 //==========================================================================
118 // Register Definitions
120 //==========================================================================
125 //----- Register Files------------------------------------------------------
127 extern __sfr __at (INDF_ADDR) INDF;
128 extern __sfr __at (TMR0_ADDR) TMR0;
129 extern __sfr __at (PCL_ADDR) PCL;
130 extern __sfr __at (STATUS_ADDR) STATUS;
131 extern __sfr __at (FSR_ADDR) FSR;
132 extern __sfr __at (PORTA_ADDR) PORTA;
133 extern __sfr __at (PORTB_ADDR) PORTB;
134 extern __sfr __at (PORTC_ADDR) PORTC;
135 extern __sfr __at (PORTD_ADDR) PORTD;
136 extern __sfr __at (PORTE_ADDR) PORTE;
137 extern __sfr __at (PCLATH_ADDR) PCLATH;
138 extern __sfr __at (INTCON_ADDR) INTCON;
139 extern __sfr __at (PIR1_ADDR) PIR1;
140 extern __sfr __at (PIR2_ADDR) PIR2;
141 extern __sfr __at (TMR1L_ADDR) TMR1L;
142 extern __sfr __at (TMR1H_ADDR) TMR1H;
143 extern __sfr __at (T1CON_ADDR) T1CON;
144 extern __sfr __at (TMR2_ADDR) TMR2;
145 extern __sfr __at (T2CON_ADDR) T2CON;
146 extern __sfr __at (SSPBUF_ADDR) SSPBUF;
147 extern __sfr __at (SSPCON_ADDR) SSPCON;
148 extern __sfr __at (CCPR1L_ADDR) CCPR1L;
149 extern __sfr __at (CCPR1H_ADDR) CCPR1H;
150 extern __sfr __at (CCP1CON_ADDR) CCP1CON;
151 extern __sfr __at (RCSTA_ADDR) RCSTA;
152 extern __sfr __at (TXREG_ADDR) TXREG;
153 extern __sfr __at (RCREG_ADDR) RCREG;
154 extern __sfr __at (CCPR2L_ADDR) CCPR2L;
155 extern __sfr __at (CCPR2H_ADDR) CCPR2H;
156 extern __sfr __at (CCP2CON_ADDR) CCP2CON;
158 extern __sfr __at (OPTION_REG_ADDR) OPTION_REG;
159 extern __sfr __at (TRISA_ADDR) TRISA;
160 extern __sfr __at (TRISB_ADDR) TRISB;
161 extern __sfr __at (TRISC_ADDR) TRISC;
162 extern __sfr __at (TRISD_ADDR) TRISD;
163 extern __sfr __at (TRISE_ADDR) TRISE;
164 extern __sfr __at (PIE1_ADDR) PIE1;
165 extern __sfr __at (PIE2_ADDR) PIE2;
166 extern __sfr __at (PCON_ADDR) PCON;
167 extern __sfr __at (PR2_ADDR) PR2;
168 extern __sfr __at (SSPADD_ADDR) SSPADD;
169 extern __sfr __at (SSPSTAT_ADDR) SSPSTAT;
170 extern __sfr __at (TXSTA_ADDR) TXSTA;
171 extern __sfr __at (SPBRG_ADDR) SPBRG;
173 //----- STATUS Bits --------------------------------------------------------
176 //----- INTCON Bits --------------------------------------------------------
179 //----- PIR1 Bits ----------------------------------------------------------
182 //----- PIR2 Bits ----------------------------------------------------------
185 //----- T1CON Bits ---------------------------------------------------------
188 //----- T2CON Bits ---------------------------------------------------------
191 //----- SSPCON Bits --------------------------------------------------------
194 //----- CCP1CON Bits -------------------------------------------------------
197 //----- RCSTA Bits ---------------------------------------------------------
200 //----- CCP2CON Bits -------------------------------------------------------
203 //----- OPTION Bits --------------------------------------------------------
206 //----- TRISE Bits ---------------------------------------------------------
209 //----- PIE1 Bits ----------------------------------------------------------
212 //----- PIE2 Bits ----------------------------------------------------------
215 //----- PCON Bits ----------------------------------------------------------
218 //----- SSPSTAT Bits -------------------------------------------------------
221 //----- TXSTA Bits ---------------------------------------------------------
224 //==========================================================================
228 //==========================================================================
231 // __BADRAM H'1E'-H'1F',H'8F'-H'91', H'95'-H'97', H'9A'-H'9F'
233 //==========================================================================
235 // Configuration Bits
237 //==========================================================================
239 #define _BODEN_ON 0x3FFF
240 #define _BODEN_OFF 0x3FBF
241 #define _CP_ALL 0x00CF
242 #define _CP_75 0x15DF
243 #define _CP_50 0x2AEF
244 #define _CP_OFF 0x3FFF
245 #define _PWRTE_OFF 0x3FFF
246 #define _PWRTE_ON 0x3FF7
247 #define _WDT_ON 0x3FFF
248 #define _WDT_OFF 0x3FFB
249 #define _LP_OSC 0x3FFC
250 #define _XT_OSC 0x3FFD
251 #define _HS_OSC 0x3FFE
252 #define _RC_OSC 0x3FFF
256 // ----- CCP1CON bits --------------------
259 unsigned char CCP1M0:1;
260 unsigned char CCP1M1:1;
261 unsigned char CCP1M2:1;
262 unsigned char CCP1M3:1;
263 unsigned char CCP1Y:1;
264 unsigned char CCP1X:1;
269 extern volatile __CCP1CON_bits_t __at(CCP1CON_ADDR) CCP1CON_bits;
271 #ifndef NO_BIT_DEFINES
272 #define CCP1M0 CCP1CON_bits.CCP1M0
273 #define CCP1M1 CCP1CON_bits.CCP1M1
274 #define CCP1M2 CCP1CON_bits.CCP1M2
275 #define CCP1M3 CCP1CON_bits.CCP1M3
276 #define CCP1Y CCP1CON_bits.CCP1Y
277 #define CCP1X CCP1CON_bits.CCP1X
278 #endif /* NO_BIT_DEFINES */
280 // ----- CCP2CON bits --------------------
283 unsigned char CCP2M0:1;
284 unsigned char CCP2M1:1;
285 unsigned char CCP2M2:1;
286 unsigned char CCP2M3:1;
287 unsigned char CCP2Y:1;
288 unsigned char CCP2X:1;
293 extern volatile __CCP2CON_bits_t __at(CCP2CON_ADDR) CCP2CON_bits;
295 #ifndef NO_BIT_DEFINES
296 #define CCP2M0 CCP2CON_bits.CCP2M0
297 #define CCP2M1 CCP2CON_bits.CCP2M1
298 #define CCP2M2 CCP2CON_bits.CCP2M2
299 #define CCP2M3 CCP2CON_bits.CCP2M3
300 #define CCP2Y CCP2CON_bits.CCP2Y
301 #define CCP2X CCP2CON_bits.CCP2X
302 #endif /* NO_BIT_DEFINES */
304 // ----- INTCON bits --------------------
307 unsigned char RBIF:1;
308 unsigned char INTF:1;
309 unsigned char T0IF:1;
310 unsigned char RBIE:1;
311 unsigned char INTE:1;
312 unsigned char T0IE:1;
313 unsigned char PEIE:1;
317 extern volatile __INTCON_bits_t __at(INTCON_ADDR) INTCON_bits;
319 #ifndef NO_BIT_DEFINES
320 #define RBIF INTCON_bits.RBIF
321 #define INTF INTCON_bits.INTF
322 #define T0IF INTCON_bits.T0IF
323 #define RBIE INTCON_bits.RBIE
324 #define INTE INTCON_bits.INTE
325 #define T0IE INTCON_bits.T0IE
326 #define PEIE INTCON_bits.PEIE
327 #define GIE INTCON_bits.GIE
328 #endif /* NO_BIT_DEFINES */
330 // ----- OPTION_REG bits --------------------
337 unsigned char T0SE:1;
338 unsigned char T0CS:1;
339 unsigned char INTEDG:1;
340 unsigned char NOT_RBPU:1;
342 } __OPTION_REG_bits_t;
343 extern volatile __OPTION_REG_bits_t __at(OPTION_REG_ADDR) OPTION_REG_bits;
345 #ifndef NO_BIT_DEFINES
346 #define PS0 OPTION_REG_bits.PS0
347 #define PS1 OPTION_REG_bits.PS1
348 #define PS2 OPTION_REG_bits.PS2
349 #define PSA OPTION_REG_bits.PSA
350 #define T0SE OPTION_REG_bits.T0SE
351 #define T0CS OPTION_REG_bits.T0CS
352 #define INTEDG OPTION_REG_bits.INTEDG
353 #define NOT_RBPU OPTION_REG_bits.NOT_RBPU
354 #endif /* NO_BIT_DEFINES */
356 // ----- PCON bits --------------------
359 unsigned char NOT_BO:1;
360 unsigned char NOT_POR:1;
369 unsigned char NOT_BOR:1;
379 extern volatile __PCON_bits_t __at(PCON_ADDR) PCON_bits;
381 #ifndef NO_BIT_DEFINES
382 #define NOT_BO PCON_bits.NOT_BO
383 #define NOT_BOR PCON_bits.NOT_BOR
384 #define NOT_POR PCON_bits.NOT_POR
385 #endif /* NO_BIT_DEFINES */
387 // ----- PIE1 bits --------------------
390 unsigned char TMR1IE:1;
391 unsigned char TMR2IE:1;
392 unsigned char CCP1IE:1;
393 unsigned char SSPIE:1;
394 unsigned char TXIE:1;
395 unsigned char RCIE:1;
397 unsigned char PSPIE:1;
400 extern volatile __PIE1_bits_t __at(PIE1_ADDR) PIE1_bits;
402 #ifndef NO_BIT_DEFINES
403 #define TMR1IE PIE1_bits.TMR1IE
404 #define TMR2IE PIE1_bits.TMR2IE
405 #define CCP1IE PIE1_bits.CCP1IE
406 #define SSPIE PIE1_bits.SSPIE
407 #define TXIE PIE1_bits.TXIE
408 #define RCIE PIE1_bits.RCIE
409 #define PSPIE PIE1_bits.PSPIE
410 #endif /* NO_BIT_DEFINES */
412 // ----- PIE2 bits --------------------
415 unsigned char CCP2IE:1;
425 extern volatile __PIE2_bits_t __at(PIE2_ADDR) PIE2_bits;
427 #ifndef NO_BIT_DEFINES
428 #define CCP2IE PIE2_bits.CCP2IE
429 #endif /* NO_BIT_DEFINES */
431 // ----- PIR1 bits --------------------
434 unsigned char TMR1IF:1;
435 unsigned char TMR2IF:1;
436 unsigned char CCP1IF:1;
437 unsigned char SSPIF:1;
438 unsigned char TXIF:1;
439 unsigned char RCIF:1;
441 unsigned char PSPIF:1;
444 extern volatile __PIR1_bits_t __at(PIR1_ADDR) PIR1_bits;
446 #ifndef NO_BIT_DEFINES
447 #define TMR1IF PIR1_bits.TMR1IF
448 #define TMR2IF PIR1_bits.TMR2IF
449 #define CCP1IF PIR1_bits.CCP1IF
450 #define SSPIF PIR1_bits.SSPIF
451 #define TXIF PIR1_bits.TXIF
452 #define RCIF PIR1_bits.RCIF
453 #define PSPIF PIR1_bits.PSPIF
454 #endif /* NO_BIT_DEFINES */
456 // ----- PIR2 bits --------------------
459 unsigned char CCP2IF:1;
469 extern volatile __PIR2_bits_t __at(PIR2_ADDR) PIR2_bits;
471 #ifndef NO_BIT_DEFINES
472 #define CCP2IF PIR2_bits.CCP2IF
473 #endif /* NO_BIT_DEFINES */
475 // ----- PORTA bits --------------------
488 extern volatile __PORTA_bits_t __at(PORTA_ADDR) PORTA_bits;
490 #ifndef NO_BIT_DEFINES
491 #define RA0 PORTA_bits.RA0
492 #define RA1 PORTA_bits.RA1
493 #define RA2 PORTA_bits.RA2
494 #define RA3 PORTA_bits.RA3
495 #define RA4 PORTA_bits.RA4
496 #define RA5 PORTA_bits.RA5
497 #endif /* NO_BIT_DEFINES */
499 // ----- PORTB bits --------------------
512 extern volatile __PORTB_bits_t __at(PORTB_ADDR) PORTB_bits;
514 #ifndef NO_BIT_DEFINES
515 #define RB0 PORTB_bits.RB0
516 #define RB1 PORTB_bits.RB1
517 #define RB2 PORTB_bits.RB2
518 #define RB3 PORTB_bits.RB3
519 #define RB4 PORTB_bits.RB4
520 #define RB5 PORTB_bits.RB5
521 #define RB6 PORTB_bits.RB6
522 #define RB7 PORTB_bits.RB7
523 #endif /* NO_BIT_DEFINES */
525 // ----- PORTC bits --------------------
538 extern volatile __PORTC_bits_t __at(PORTC_ADDR) PORTC_bits;
540 #ifndef NO_BIT_DEFINES
541 #define RC0 PORTC_bits.RC0
542 #define RC1 PORTC_bits.RC1
543 #define RC2 PORTC_bits.RC2
544 #define RC3 PORTC_bits.RC3
545 #define RC4 PORTC_bits.RC4
546 #define RC5 PORTC_bits.RC5
547 #define RC6 PORTC_bits.RC6
548 #define RC7 PORTC_bits.RC7
549 #endif /* NO_BIT_DEFINES */
551 // ----- PORTD bits --------------------
564 extern volatile __PORTD_bits_t __at(PORTD_ADDR) PORTD_bits;
566 #ifndef NO_BIT_DEFINES
567 #define RD0 PORTD_bits.RD0
568 #define RD1 PORTD_bits.RD1
569 #define RD2 PORTD_bits.RD2
570 #define RD3 PORTD_bits.RD3
571 #define RD4 PORTD_bits.RD4
572 #define RD5 PORTD_bits.RD5
573 #define RD6 PORTD_bits.RD6
574 #define RD7 PORTD_bits.RD7
575 #endif /* NO_BIT_DEFINES */
577 // ----- PORTE bits --------------------
590 extern volatile __PORTE_bits_t __at(PORTE_ADDR) PORTE_bits;
592 #ifndef NO_BIT_DEFINES
593 #define RE0 PORTE_bits.RE0
594 #define RE1 PORTE_bits.RE1
595 #define RE2 PORTE_bits.RE2
596 #endif /* NO_BIT_DEFINES */
598 // ----- RCSTA bits --------------------
601 unsigned char RX9D:1;
602 unsigned char OERR:1;
603 unsigned char FERR:1;
605 unsigned char CREN:1;
606 unsigned char SREN:1;
608 unsigned char SPEN:1;
611 unsigned char RCD8:1;
627 unsigned char NOT_RC8:1;
637 unsigned char RC8_9:1;
641 extern volatile __RCSTA_bits_t __at(RCSTA_ADDR) RCSTA_bits;
643 #ifndef NO_BIT_DEFINES
644 #define RX9D RCSTA_bits.RX9D
645 #define RCD8 RCSTA_bits.RCD8
646 #define OERR RCSTA_bits.OERR
647 #define FERR RCSTA_bits.FERR
648 #define CREN RCSTA_bits.CREN
649 #define SREN RCSTA_bits.SREN
650 #define RX9 RCSTA_bits.RX9
651 #define RC9 RCSTA_bits.RC9
652 #define NOT_RC8 RCSTA_bits.NOT_RC8
653 #define RC8_9 RCSTA_bits.RC8_9
654 #define SPEN RCSTA_bits.SPEN
655 #endif /* NO_BIT_DEFINES */
657 // ----- SSPCON bits --------------------
660 unsigned char SSPM0:1;
661 unsigned char SSPM1:1;
662 unsigned char SSPM2:1;
663 unsigned char SSPM3:1;
665 unsigned char SSPEN:1;
666 unsigned char SSPOV:1;
667 unsigned char WCOL:1;
670 extern volatile __SSPCON_bits_t __at(SSPCON_ADDR) SSPCON_bits;
672 #ifndef NO_BIT_DEFINES
673 #define SSPM0 SSPCON_bits.SSPM0
674 #define SSPM1 SSPCON_bits.SSPM1
675 #define SSPM2 SSPCON_bits.SSPM2
676 #define SSPM3 SSPCON_bits.SSPM3
677 #define CKP SSPCON_bits.CKP
678 #define SSPEN SSPCON_bits.SSPEN
679 #define SSPOV SSPCON_bits.SSPOV
680 #define WCOL SSPCON_bits.WCOL
681 #endif /* NO_BIT_DEFINES */
683 // ----- SSPSTAT bits --------------------
698 unsigned char I2C_READ:1;
699 unsigned char I2C_START:1;
700 unsigned char I2C_STOP:1;
701 unsigned char I2C_DATA:1;
708 unsigned char NOT_W:1;
711 unsigned char NOT_A:1;
718 unsigned char NOT_WRITE:1;
721 unsigned char NOT_ADDRESS:1;
738 unsigned char READ_WRITE:1;
741 unsigned char DATA_ADDRESS:1;
746 extern volatile __SSPSTAT_bits_t __at(SSPSTAT_ADDR) SSPSTAT_bits;
748 #ifndef NO_BIT_DEFINES
749 #define BF SSPSTAT_bits.BF
750 #define UA SSPSTAT_bits.UA
751 #define R SSPSTAT_bits.R
752 #define I2C_READ SSPSTAT_bits.I2C_READ
753 #define NOT_W SSPSTAT_bits.NOT_W
754 #define NOT_WRITE SSPSTAT_bits.NOT_WRITE
755 #define R_W SSPSTAT_bits.R_W
756 #define READ_WRITE SSPSTAT_bits.READ_WRITE
757 #define S SSPSTAT_bits.S
758 #define I2C_START SSPSTAT_bits.I2C_START
759 #define P SSPSTAT_bits.P
760 #define I2C_STOP SSPSTAT_bits.I2C_STOP
761 #define D SSPSTAT_bits.D
762 #define I2C_DATA SSPSTAT_bits.I2C_DATA
763 #define NOT_A SSPSTAT_bits.NOT_A
764 #define NOT_ADDRESS SSPSTAT_bits.NOT_ADDRESS
765 #define D_A SSPSTAT_bits.D_A
766 #define DATA_ADDRESS SSPSTAT_bits.DATA_ADDRESS
767 #define CKE SSPSTAT_bits.CKE
768 #define SMP SSPSTAT_bits.SMP
769 #endif /* NO_BIT_DEFINES */
771 // ----- STATUS bits --------------------
777 unsigned char NOT_PD:1;
778 unsigned char NOT_TO:1;
784 extern volatile __STATUS_bits_t __at(STATUS_ADDR) STATUS_bits;
786 #ifndef NO_BIT_DEFINES
787 #define C STATUS_bits.C
788 #define DC STATUS_bits.DC
789 #define Z STATUS_bits.Z
790 #define NOT_PD STATUS_bits.NOT_PD
791 #define NOT_TO STATUS_bits.NOT_TO
792 #define RP0 STATUS_bits.RP0
793 #define RP1 STATUS_bits.RP1
794 #define IRP STATUS_bits.IRP
795 #endif /* NO_BIT_DEFINES */
797 // ----- T1CON bits --------------------
800 unsigned char TMR1ON:1;
801 unsigned char TMR1CS:1;
802 unsigned char NOT_T1SYNC:1;
803 unsigned char T1OSCEN:1;
804 unsigned char T1CKPS0:1;
805 unsigned char T1CKPS1:1;
812 unsigned char T1INSYNC:1;
820 extern volatile __T1CON_bits_t __at(T1CON_ADDR) T1CON_bits;
822 #ifndef NO_BIT_DEFINES
823 #define TMR1ON T1CON_bits.TMR1ON
824 #define TMR1CS T1CON_bits.TMR1CS
825 #define NOT_T1SYNC T1CON_bits.NOT_T1SYNC
826 #define T1INSYNC T1CON_bits.T1INSYNC
827 #define T1OSCEN T1CON_bits.T1OSCEN
828 #define T1CKPS0 T1CON_bits.T1CKPS0
829 #define T1CKPS1 T1CON_bits.T1CKPS1
830 #endif /* NO_BIT_DEFINES */
832 // ----- T2CON bits --------------------
835 unsigned char T2CKPS0:1;
836 unsigned char T2CKPS1:1;
837 unsigned char TMR2ON:1;
838 unsigned char TOUTPS0:1;
839 unsigned char TOUTPS1:1;
840 unsigned char TOUTPS2:1;
841 unsigned char TOUTPS3:1;
845 extern volatile __T2CON_bits_t __at(T2CON_ADDR) T2CON_bits;
847 #ifndef NO_BIT_DEFINES
848 #define T2CKPS0 T2CON_bits.T2CKPS0
849 #define T2CKPS1 T2CON_bits.T2CKPS1
850 #define TMR2ON T2CON_bits.TMR2ON
851 #define TOUTPS0 T2CON_bits.TOUTPS0
852 #define TOUTPS1 T2CON_bits.TOUTPS1
853 #define TOUTPS2 T2CON_bits.TOUTPS2
854 #define TOUTPS3 T2CON_bits.TOUTPS3
855 #endif /* NO_BIT_DEFINES */
857 // ----- TRISA bits --------------------
860 unsigned char TRISA0:1;
861 unsigned char TRISA1:1;
862 unsigned char TRISA2:1;
863 unsigned char TRISA3:1;
864 unsigned char TRISA4:1;
865 unsigned char TRISA5:1;
870 extern volatile __TRISA_bits_t __at(TRISA_ADDR) TRISA_bits;
872 #ifndef NO_BIT_DEFINES
873 #define TRISA0 TRISA_bits.TRISA0
874 #define TRISA1 TRISA_bits.TRISA1
875 #define TRISA2 TRISA_bits.TRISA2
876 #define TRISA3 TRISA_bits.TRISA3
877 #define TRISA4 TRISA_bits.TRISA4
878 #define TRISA5 TRISA_bits.TRISA5
879 #endif /* NO_BIT_DEFINES */
881 // ----- TRISB bits --------------------
884 unsigned char TRISB0:1;
885 unsigned char TRISB1:1;
886 unsigned char TRISB2:1;
887 unsigned char TRISB3:1;
888 unsigned char TRISB4:1;
889 unsigned char TRISB5:1;
890 unsigned char TRISB6:1;
891 unsigned char TRISB7:1;
894 extern volatile __TRISB_bits_t __at(TRISB_ADDR) TRISB_bits;
896 #ifndef NO_BIT_DEFINES
897 #define TRISB0 TRISB_bits.TRISB0
898 #define TRISB1 TRISB_bits.TRISB1
899 #define TRISB2 TRISB_bits.TRISB2
900 #define TRISB3 TRISB_bits.TRISB3
901 #define TRISB4 TRISB_bits.TRISB4
902 #define TRISB5 TRISB_bits.TRISB5
903 #define TRISB6 TRISB_bits.TRISB6
904 #define TRISB7 TRISB_bits.TRISB7
905 #endif /* NO_BIT_DEFINES */
907 // ----- TRISC bits --------------------
910 unsigned char TRISC0:1;
911 unsigned char TRISC1:1;
912 unsigned char TRISC2:1;
913 unsigned char TRISC3:1;
914 unsigned char TRISC4:1;
915 unsigned char TRISC5:1;
916 unsigned char TRISC6:1;
917 unsigned char TRISC7:1;
920 extern volatile __TRISC_bits_t __at(TRISC_ADDR) TRISC_bits;
922 #ifndef NO_BIT_DEFINES
923 #define TRISC0 TRISC_bits.TRISC0
924 #define TRISC1 TRISC_bits.TRISC1
925 #define TRISC2 TRISC_bits.TRISC2
926 #define TRISC3 TRISC_bits.TRISC3
927 #define TRISC4 TRISC_bits.TRISC4
928 #define TRISC5 TRISC_bits.TRISC5
929 #define TRISC6 TRISC_bits.TRISC6
930 #define TRISC7 TRISC_bits.TRISC7
931 #endif /* NO_BIT_DEFINES */
933 // ----- TRISD bits --------------------
936 unsigned char TRISD0:1;
937 unsigned char TRISD1:1;
938 unsigned char TRISD2:1;
939 unsigned char TRISD3:1;
940 unsigned char TRISD4:1;
941 unsigned char TRISD5:1;
942 unsigned char TRISD6:1;
943 unsigned char TRISD7:1;
946 extern volatile __TRISD_bits_t __at(TRISD_ADDR) TRISD_bits;
948 #ifndef NO_BIT_DEFINES
949 #define TRISD0 TRISD_bits.TRISD0
950 #define TRISD1 TRISD_bits.TRISD1
951 #define TRISD2 TRISD_bits.TRISD2
952 #define TRISD3 TRISD_bits.TRISD3
953 #define TRISD4 TRISD_bits.TRISD4
954 #define TRISD5 TRISD_bits.TRISD5
955 #define TRISD6 TRISD_bits.TRISD6
956 #define TRISD7 TRISD_bits.TRISD7
957 #endif /* NO_BIT_DEFINES */
959 // ----- TRISE bits --------------------
962 unsigned char TRISE0:1;
963 unsigned char TRISE1:1;
964 unsigned char TRISE2:1;
966 unsigned char PSPMODE:1;
967 unsigned char IBOV:1;
972 extern volatile __TRISE_bits_t __at(TRISE_ADDR) TRISE_bits;
974 #ifndef NO_BIT_DEFINES
975 #define TRISE0 TRISE_bits.TRISE0
976 #define TRISE1 TRISE_bits.TRISE1
977 #define TRISE2 TRISE_bits.TRISE2
978 #define PSPMODE TRISE_bits.PSPMODE
979 #define IBOV TRISE_bits.IBOV
980 #define OBF TRISE_bits.OBF
981 #define IBF TRISE_bits.IBF
982 #endif /* NO_BIT_DEFINES */
984 // ----- TXSTA bits --------------------
987 unsigned char TX9D:1;
988 unsigned char TRMT:1;
989 unsigned char BRGH:1;
991 unsigned char SYNC:1;
992 unsigned char TXEN:1;
994 unsigned char CSRC:1;
997 unsigned char TXD8:1;
1003 unsigned char NOT_TX8:1;
1013 unsigned char TX8_9:1;
1017 extern volatile __TXSTA_bits_t __at(TXSTA_ADDR) TXSTA_bits;
1019 #ifndef NO_BIT_DEFINES
1020 #define TX9D TXSTA_bits.TX9D
1021 #define TXD8 TXSTA_bits.TXD8
1022 #define TRMT TXSTA_bits.TRMT
1023 #define BRGH TXSTA_bits.BRGH
1024 #define SYNC TXSTA_bits.SYNC
1025 #define TXEN TXSTA_bits.TXEN
1026 #define TX9 TXSTA_bits.TX9
1027 #define NOT_TX8 TXSTA_bits.NOT_TX8
1028 #define TX8_9 TXSTA_bits.TX8_9
1029 #define CSRC TXSTA_bits.CSRC
1030 #endif /* NO_BIT_DEFINES */