1 /*-------------------------------------------------------------------------
2 Register Declarations for the mcs51 compatible microcontrollers
4 Written By - Bela Torok / bela.torok@kssg.ch (November 2000)
6 This program is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by the
8 Free Software Foundation; either version 2, or (at your option) any
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
20 In other words, you are welcome to use, share and improve this program.
21 You are forbidden to forbid anyone else to use, share and improve
22 what you give them. Help stamp out software-hoarding!
27 Version 1.0 Nov 2, 2000 - B. Torok / bela.torok@kssg.ch
28 Initial release, supported microcontrollers:
29 8051, 8052, Atmel AT89C1051, AT89C2051, AT89C4051,
30 Infineon / Siemens SAB80515, SAB80535, SAB80515A
32 Version 1.0.1 (Nov 3, 2000)
33 SAB80515A definitions revised by Michael Schmitt / michael.schmitt@t-online.de
35 Version 1.0.2 (Nov 6, 2000)
36 T2CON bug corrected 8052 and SABX microcontrollers have different T2CONs
37 Support for for the Atmel AT89C52, AT80LV52, AT89C55, AT80LV55
38 Support for the Dallas DS80C320 and DS80C323 microcontrollers
39 microcontrollers - B. Torok / bela.torok@kssg.ch
41 Version 1.0.3 (Nov 7, 2000)
42 SAB80517 definitions added by Michael Schmitt / michael.schmitt@t-online.de
43 Dallas AT89S53 definitions added by B. Torok / bela.torok@kssg.ch
44 Dallas DS87C520 and DS83C520 definitions added by B. Torok / bela.torok@kssg.ch
46 Adding support for additional microcontrollers:
47 -----------------------------------------------
49 1. Make an entry with the inventory of the register set of
50 the microcontroller in the "Describe microcontrollers" section.
52 2. If necessary add/modify entry(s) in the "Register definitions" section
54 3. If necessary add/modify entry(s) in the "Interrupt vectors" section
56 4. Make a step-by-step protocol of your modifications
58 5. Send the protocol and the modified file to me ( bela.torok@kssg.ch ).
59 I'm going to compile/verify changes made by different authors.
62 Microcontroller support:
64 Use one of the following options:
66 1. use #include <mcs51reg.h> in your program & define REG_XXXXXX in your makefile.
68 2. use following definitions prior the
69 #include <mcs51reg.h> line in your program:
71 #define MICROCONTROLLER_8052 -> 8052 type microcontroller
73 #define MICROCONTROLLER_AT89CX051 -> Atmel AT89C1051, AT89C2051 and AT89C4051 microcontrollers
76 Use only one of the following definitions!!!
78 Supported Microcontrollers:
81 MICROCONTROLLER_8051 8051
82 MICROCONTROLLER_8052 8052
83 MICROCONTROLLER_AT89CX051 Atmel AT89C1051, AT89C2051 and AT89C4051
84 MICROCONTROLLER_AT89S53 Atmel AT89S53 microcontroller
85 MICROCONTROLLER_AT89X52 Atmel AT89C52 and AT80LV52 microcontrollers
86 MICROCONTROLLER_AT89X55 Atmel AT89C55 and AT80LV55 microcontrollers
87 MICROCONTROLLER_DS80C32X Dallas DS80C320 and DS80C323 microcontrollers
88 MICROCONTROLLER_DS8XC520 Dallas DS87C520 and DS83C520 microcontrollers
89 MICROCONTROLLER_SAB80515 Infineon / Siemens SAB80515 & SAB80535
90 MICROCONTROLLER_SAB80515A Infineon / Siemens SAB80515A
91 MICROCONTROLLER_SAB80517 Infineon / Siemens SAB80517
93 -----------------------------------------------------------------------*/
96 #ifndef HEADER_MCS51REG
97 #define HEADER_MCS51REG
99 //////////////////////////////////
100 /// Describe microcontrollers ///
101 /// (inventory of registers) ///
102 //////////////////////////////////
104 // definitions for the 8051
105 #ifdef MICROCONTROLLER_8051
106 #ifdef MICROCONTROLLER_DEFINED
107 #define MCS51REG_ERROR
109 #ifndef MICROCONTROLLER_DEFINED
110 #define MICROCONTROLLER_DEFINED
112 #warning Selected HW: 8051
135 // end of definitions for the 8051
138 // definitions for the 8052 microcontroller
139 #ifdef MICROCONTROLLER_8052
140 #ifdef MICROCONTROLLER_DEFINED
141 #define MCS51REG_ERROR
143 #ifndef MICROCONTROLLER_DEFINED
144 #define MICROCONTROLLER_DEFINED
146 #warning Selected HW: 8052
169 // 8052 specific registers
177 // end of definitions for the 8052 microcontroller
180 // definitionsons for the Atmel
181 // AT89C1051, AT89C2051 and AT89C4051 microcontrollers
182 #ifdef MICROCONTROLLER_AT89CX051
183 #ifdef MICROCONTROLLER_DEFINED
184 #define MCS51REG_ERROR
186 #ifndef MICROCONTROLLER_DEFINED
187 #define MICROCONTROLLER_DEFINED
189 #warning Selected HW: Atmel AT89Cx051
190 // 8051 register set without P0 & P2
211 // end of definitionsons for the Atmel
212 // AT89C1051, AT89C2051 and AT89C4051 microcontrollers
215 // definitions for the Atmel AT89S53
216 #ifdef MICROCONTROLLER_AT89S53
217 #ifdef MICROCONTROLLER_DEFINED
218 #define MCS51REG_ERROR
220 #ifndef MICROCONTROLLER_DEFINED
221 #define MICROCONTROLLER_DEFINED
223 #warning Selected HW: AT89S53
246 // 8052 specific registers
253 // AT89S53 specific register
255 #define IP_EXT_AT89X52_55
263 // end of definitions for the Atmel AT89S53 microcontroller
266 // definitions for the Atmel AT89C52 and AT89LV52 microcontrollers
267 #ifdef MICROCONTROLLER_AT89X52
268 #ifdef MICROCONTROLLER_DEFINED
269 #define MCS51REG_ERROR
271 #ifndef MICROCONTROLLER_DEFINED
272 #define MICROCONTROLLER_DEFINED
274 #warning Selected HW: AT89C52 or AT89LV52
297 // 8052 specific registers
304 // AT89X52 specific register
306 #define IP_EXT_AT89X52_55
308 // end of definitions for the Atmel AT89C52 and AT89LV52 microcontrollers
311 // definitions for the Atmel AT89C55 and AT89LV55 microcontrollers
312 #ifdef MICROCONTROLLER_AT89X55
313 #ifdef MICROCONTROLLER_DEFINED
314 #define MCS51REG_ERROR
316 #ifndef MICROCONTROLLER_DEFINED
317 #define MICROCONTROLLER_DEFINED
319 #warning Selected HW: AT89C55 or AT89LV55
342 // 8052 specific registers
349 // AT89X52 specific register
351 #define IP_EXT_AT89X52_55
353 // end of definitions for the Atmel AT89C55 and AT89LV55 microcontrollers
356 // definitions for the Dallas DS80C320 and DS80C323 microcontrollers
357 #ifdef MICROCONTROLLER_DS80C32X
358 #ifdef MICROCONTROLLER_DEFINED
359 #define MCS51REG_ERROR
361 #ifndef MICROCONTROLLER_DEFINED
362 #define MICROCONTROLLER_DEFINED
364 #warning Selected HW: Dallas DS80C320 or DS80C323
387 // 8052 specific registers
388 #define IE_EXT_80C320
394 // DS80C320 specific register
395 #define P1_EXT_DS80C320
396 #define IP_EXT_DS80C320
397 #define PCON_EXT_DS8XCX2X
402 #define EXIF_DS80C32X
409 #define STATUS_DS80C32X
416 // end of definitions for the Dallas DS80C320 and DS80C323 microcontrollers
419 // definitions for the Dallas DS87C520 and DS83C520 microcontrollers
420 #ifdef MICROCONTROLLER_DS8XC520
421 #ifdef MICROCONTROLLER_DEFINED
422 #define MCS51REG_ERROR
424 #ifndef MICROCONTROLLER_DEFINED
425 #define MICROCONTROLLER_DEFINED
427 #warning Selected HW: Dallas DS87C520 or DS85C520
450 // 8052 specific registers
451 #define IE_EXT_80C320
457 // DS8XC520 specific registers
458 #define P1_EXT_DS80C320
459 #define IP_EXT_DS80C320
460 #define PCON_EXT_DS8XCX2X
465 #define EXIF_DS8XC520
473 #define STATUS_DS80C32X
482 // end of definitions for the Dallas DS87C520 and DS83C520 microcontrollers
485 // definitions for the Infineon / Siemens SAB80515 & SAB80535
486 #ifdef MICROCONTROLLER_SAB80515
487 #ifdef MICROCONTROLLER_DEFINED
488 #define MCS51REG_ERROR
490 #ifndef MICROCONTROLLER_DEFINED
491 #define MICROCONTROLLER_DEFINED
493 #warning Selected HW: Infineon / Siemens SAB80515 & SAB80535
494 // 8051 register set without IP & PCON
514 // SAB80515 specific registers
515 #define IE_EXT_SAB80515X // Definitions for additional Bit registers
516 #define P1_EXT_SAB80515X // P1 alternate functions - SAB80515 specific
517 #define PCON_80515 // PCON - SAB80515 specific
518 #define IP0 // interrupt priority register - SAB80515 specific
519 #define IEN1 // interrupt enable register - SAB80515 specific
520 #define IRCON // interrupt control register - SAB80515 specific
521 #define CCEN // compare/capture enable register
522 #define CCL1 // compare/capture register 1, low byte
523 #define CCH1 // compare/capture register 1, high byte
524 #define CCL2 // compare/capture register 2, low byte
525 #define CCH2 // compare/capture register 2, high byte
526 #define CCL3 // compare/capture register 3, low byte
527 #define CCH3 // compare/capture register 3, high byte
529 #define CRCL // compare/reload/capture register, low byte
530 #define CRCH // compare/reload/capture register, high byte
533 #define ADCON // A/D-converter control register
534 #define ADDAT // A/D-converter data register
535 #define DAPR_SAB80515 // D/A-converter program register
536 #define P4_SAB80515 // Port 4 - SAB80515 specific
537 #define P5_SAB80515 // Port 5 - SAB80515 specific
539 // end of definitions for the Infineon / Siemens SAB80515
542 // definitions for the Infineon / Siemens SAB80515A
543 #ifdef MICROCONTROLLER_SAB80515A
544 #ifdef MICROCONTROLLER_DEFINED
545 #define MCS51REG_ERROR
547 #ifndef MICROCONTROLLER_DEFINED
548 #define MICROCONTROLLER_DEFINED
550 #warning Selected HW: Infineon / Siemens SAB80515A
551 // 8051 register set without IP
572 // SAB80515A specific registers
573 #define IE_EXT_SAB80515X // Definitions for additional Bit registers
574 #define P1_EXT_SAB80515X // P1 alternate functions - SAB80515 specific
575 #define PCON_EXT_80515A // Definitions for additional Bit registers
576 #define IP0 // interrupt priority register - SAB80515 specific
577 #define IP1 // interrupt priority register - SAB80515 specific
578 #define IEN1 // interrupt enable register - SAB80515 specific
579 #define IRCON // interrupt control register - SAB80515 specific
580 #define CCEN // compare/capture enable register
581 #define CCL1 // compare/capture register 1, low byte
582 #define CCH1 // compare/capture register 1, high byte
583 #define CCL2 // compare/capture register 2, low byte
584 #define CCH2 // compare/capture register 2, high byte
585 #define CCL3 // compare/capture register 3, low byte
586 #define CCH3 // compare/capture register 3, high byte
588 #define CRCL // compare/reload/capture register, low byte
589 #define CRCH // compare/reload/capture register, high byte
592 #define ADCON0 // A/D-converter control register 0
593 #define ADDATH // A/D data high byte
594 #define ADDATL // A/D data low byte
595 #define ADCON1 // A/D-converter control register 1
596 #define SRELL // Baudrate generator reload low
597 #define SYSCON // XRAM Controller Access Control
598 #define SRELH // Baudrate generator reload high
599 #define P4_SAB80515 // Port 4 - SAB80515 specific
600 #define P5_SAB80515 // Port 5 - SAB80515 specific
601 #define P6_SAB80515 // Port 6 - SAB80515 specific
602 #define XPAGE // Page Address Register for Extended On-Chip RAM
604 // end of definitions for the Infineon / Siemens SAB80515A
607 // definitions for the Infineon / Siemens SAB80517
608 #ifdef MICROCONTROLLER_SAB80517
609 #ifdef MICROCONTROLLER_DEFINED
610 #define MCS51REG_ERROR
612 #ifndef MICROCONTROLLER_DEFINED
613 #define MICROCONTROLLER_DEFINED
615 #warning Selected HW: Infineon / Siemens SAB80517
616 // 8051 register set without IP, SCON & SBUF
637 // SAB80517 specific registers
638 #define IE_EXT_SAB80515X // Definitions for additional Bit registers
639 #define P1_EXT_SAB80515X // P1 alternate functions - SAB80515 specific
640 #define PCON_EXT_80515A // Definitions for additional Bit registers
641 #define IP0 // interrupt priority register - SAB80517 specific
642 #define IP1 // interrupt priority register - SAB80517 specific
643 #define IEN1 // interrupt enable register - SAB80517 specific
644 #define IEN2_SAB80517 // interrupt enable register 2 - SAB80517 specific
645 #define IRCON // interrupt control register - SAB80517 specific
646 #define CCEN // compare/capture enable register
647 #define CCL1 // compare/capture register 1, low byte
648 #define CCH1 // compare/capture register 1, high byte
649 #define CCL2 // compare/capture register 2, low byte
650 #define CCH2 // compare/capture register 2, high byte
651 #define CCL3 // compare/capture register 3, low byte
652 #define CCH3 // compare/capture register 3, high byte
653 #define CCL4 // compare/capture register 4, low byte
654 #define CCH4 // compare/capture register 4, high byte
655 #define CC4EN // compare/capture register 4 enable
656 #define CMEN // compare enable register
657 #define CMH0 // compare register 0, high byte
658 #define CML0 // compare register 0, low byte
659 #define CMH1 // compare register 1, high byte
660 #define CML1 // compare register 1, low byte
661 #define CMH2 // compare register 2, high byte
662 #define CML2 // compare register 2, low byte
663 #define CMH3 // compare register 3, high byte
664 #define CML3 // compare register 3, low byte
665 #define CMH4 // compare register 4, high byte
666 #define CML4 // compare register 4, low byte
667 #define CMH5 // compare register 5, high byte
668 #define CML5 // compare register 5, low byte
669 #define CMH6 // compare register 6, high byte
670 #define CML6 // compare register 6, low byte
671 #define CMH7 // compare register 7, high byte
672 #define CML7 // compare register 7, low byte
673 #define CMSEL // compare input select
675 #define CRCL // compare/reload/capture register, low byte
676 #define CRCH // compare/reload/capture register, high byte
677 #define CTCON // com.timer control register
678 #define CTRELH // com.timer rel register high byte
679 #define CTRELL // com.timer rel register low byte
682 #define ADCON0 // A/D-converter control register 0
683 #define ADCON1 // A/D-converter control register 1
684 #define ADDAT // A/D-converter data register
685 #define DAPR_SAB80517 // D/A-converter program register
686 #define P4_SAB80515 // Port 4 - SAB80515 specific
687 #define P5_SAB80515 // Port 5 - SAB80515 specific
688 #define P6_SAB80517 // Port 6 - SAB80517 specific
689 #define P7_SAB80517 // Port 7 - SAB80517 specific
690 #define P8_SAB80517 // Port 8 - SAB80517 specific
691 #define DPSEL // data pointer select register
692 #define ARCON // Arithmetic Ctrl. Register
693 #define MD0 // MUL / DIV register 0
694 #define MD1 // MUL / DIV register 1
695 #define MD2 // MUL / DIV register 2
696 #define MD3 // MUL / DIV register 3
697 #define MD4 // MUL / DIV register 4
698 #define MD5 // MUL / DIV register 5
699 #define S0BUF // serial 0 buffer register
700 #define S0CON // serial 0 control register
701 #define S0RELH // serial 0 reload register high byte
702 #define S0RELL // serial 0 reload register low byte
703 #define S1BUF // serial 0 buffer register
704 #define S1CON // serial 0 control register
705 #define S1RELH // serial 0 reload register high byte
706 #define S1RELL // serial 0 reload register low byte
707 #define WDTH // watchdog timer high byte
708 #define WDTL // watchdog timer low byte
709 #define WDTREL // watchdog timer reload register
711 // end of definitions for the Infineon / Siemens SAB80517
714 /////////////////////////////////////////////////////////
715 /// don't specify microcontrollers below this line! ///
716 /////////////////////////////////////////////////////////
719 // default microcontroller -> 8051
720 // use default if no microcontroller specified
721 #ifndef MICROCONTROLLER_DEFINED
722 #define MICROCONTROLLER_DEFINED
723 #warning //////////////////////////////////
724 #warning // No microcontroller defined! //
725 #warning //////////////////////////////////
726 #warning Code will be generated for the
727 #warning 8051 (default) microcontroller.
728 #warning If you have another microcontroller
729 #warning define it in the makefile, or in the
730 #warning "C" source prior
731 #warning the #include <mcs51reg.h> statement.
732 #warning If you use a non supported
733 #warning microcontroller, mcs51reg.h can be
734 #warning easily extended to support your HW.
758 // end of definitions for the default microcontroller
761 #ifdef MCS51REG_ERROR
762 #error Two or more microcontrollers defined!
765 ////////////////////////////////
766 /// Register definitions ///
767 /// (In alphabetical order) ///
768 ////////////////////////////////
777 sfr at 0xD8 ADCON ; // A/D-converter control register SAB80515 specific
788 // ADCON0 ... Infineon / Siemens also called this register ADCON in the User Manual
791 sfr at 0xD8 ADCON0 ; // A/D-converter control register 0 SAB80515A &
792 // Bit registers // SAB80517 specific
801 // Not directly accessible ADCON0
802 #define ADCON0_MX0 0x01
803 #define ADCON0_MX1 0x02
804 #define ADCON0_MX2 0x04
805 #define ADCON0_ADM 0x08
806 #define ADCON0_BSY 0x10
807 #define ADCON0_ADEX 0x20
808 #define ADCON0_CLK 0x40
809 #define ADCON0_BD 0x80
814 sfr at 0xDC ADCON1 ; // A/D-converter control register 1 SAB80515A & SAB80517 specific
815 // Not directly accessible ADCON1
816 #define ADCON1_MX0 0x01
817 #define ADCON1_MX1 0x02
818 #define ADCON1_MX2 0x04
819 #define ADCON1_ADCL 0x80
824 sfr at 0xD9 ADDAT ; // A/D-converter data register SAB80515 specific
829 sfr at 0xD9 ADDATH ; // A/D data high byte SAB80515A specific
834 sfr at 0xDA ADDATL ; // A/D data low byte SAB80515A specific
839 sfr at 0xEF ARCON ; // arithmetic control register SAB80517
846 sbit at 0xF0 BREG_F0 ;
847 sbit at 0xF1 BREG_F1 ;
848 sbit at 0xF2 BREG_F2 ;
849 sbit at 0xF3 BREG_F3 ;
850 sbit at 0xF4 BREG_F4 ;
851 sbit at 0xF5 BREG_F5 ;
852 sbit at 0xF6 BREG_F6 ;
853 sbit at 0xF7 BREG_F7 ;
858 sfr at 0xC9 CC4EN ; // compare/capture 4 enable register SAB80517 specific
863 sfr at 0xC1 CCEN ; // compare/capture enable register SAB80515 specific
868 sfr at 0xC3 CCH1 ; // compare/capture register 1, high byte SAB80515 specific
873 sfr at 0xC5 CCH2 ; // compare/capture register 2, high byte SAB80515 specific
878 sfr at 0xC7 CCH3 ; // compare/capture register 3, high byte SAB80515 specific
883 sfr at 0xCF CCH4 ; // compare/capture register 4, high byte SAB80515 specific
888 sfr at 0xC2 CCL1 ; // compare/capture register 1, low byte SAB80515 specific
893 sfr at 0xC4 CCL2 ; // compare/capture register 2, low byte SAB80515 specific
898 sfr at 0xC6 CCL3 ; // compare/capture register 3, low byte SAB80515 specific
903 sfr at 0xCE CCL4 ; // compare/capture register 4, low byte SAB80515 specific
908 sfr at 0x8E CKCON ; // DS80C320 specific
909 // Not directly accessible Bits. DS80C320 specific
922 sfr at 0xF6 CMEN ; // compare enable register SAB80517 specific
927 sfr at 0xD3 CMH0 ; // compare register 0 high byte SAB80517 specific
932 sfr at 0xD5 CMH1 ; // compare register 1 high byte SAB80517 specific
937 sfr at 0xD7 CMH2 ; // compare register 2 high byte SAB80517 specific
942 sfr at 0xE3 CMH3 ; // compare register 3 high byte SAB80517 specific
947 sfr at 0xE5 CMH4 ; // compare register 4 high byte SAB80517 specific
952 sfr at 0xE7 CMH5 ; // compare register 5 high byte SAB80517 specific
957 sfr at 0xF3 CMH6 ; // compare register 6 high byte SAB80517 specific
962 sfr at 0xF5 CMH7 ; // compare register 7 high byte SAB80517 specific
967 sfr at 0xD2 CML0 ; // compare register 0 low byte SAB80517 specific
972 sfr at 0xD4 CML1 ; // compare register 1 low byte SAB80517 specific
977 sfr at 0xD6 CML2 ; // compare register 2 low byte SAB80517 specific
982 sfr at 0xE2 CML3 ; // compare register 3 low byte SAB80517 specific
987 sfr at 0xE4 CML4 ; // compare register 4 low byte SAB80517 specific
992 sfr at 0xE6 CML5 ; // compare register 5 low byte SAB80517 specific
997 sfr at 0xF2 CML6 ; // compare register 6 low byte SAB80517 specific
1002 sfr at 0xF4 CML7 ; // compare register 7 low byte SAB80517 specific
1007 sfr at 0xF7 CMSEL ; // compare input select SAB80517
1012 sfr at 0xCB CRCH ; // compare/reload/capture register, high byte SAB80515 specific
1017 sfr at 0xCA CRCL ; // compare/reload/capture register, low byte SAB80515 specific
1022 sfr at 0xE1 CTCON ; // com.timer control register SAB80517
1027 sfr at 0xDF CTRELH ; // com.timer rel register high byte SAB80517
1032 sfr at 0xDE CTRELL ; // com.timer rel register low byte SAB80517
1035 #ifdef DAPR_SAB80515
1036 #undef DAPR_SAB80515
1037 sfr at 0xD8 DAPR ; // D/A-converter program register SAB80515 specific
1040 #ifdef DAPR_SAB80517
1041 #undef DAPR_SAB80517
1042 sfr at 0xDA DAPR ; // D/A-converter program register SAB80517 specific
1048 sfr at 0x83 DP0H ; // Alternate name for AT89S53
1053 sfr at 0x85 DPH1 ; // DS80C320 specific
1054 sfr at 0x85 DP1H ; // Alternate name for AT89S53
1059 sfr at 0x82 DPL ; // Alternate name for AT89S53
1065 sfr at 0x84 DPL1 ; // DS80C320 specific
1066 sfr at 0x84 DP1L ; // Alternate name for AT89S53
1072 // Not directly accessible DPS Bit. DS80C320 specific
1078 sfr at 0x92 DPSEL ; // data pointer select register SAB80517
1081 #ifdef EXIF_DS80C32X
1082 #undef EXIF_DS80C32X
1084 // Not directly accessible EXIF Bits DS80C320 specific
1094 #ifdef EXIF_DS8XC520
1095 #undef EXIF_DS8XC520
1097 // Not directly accessible EXIF Bits DS87C520 specific
1111 // Bit registers DS80C320 specific
1122 // Bit registers DS80C320 specific
1144 // Additional bit register for the 8052 and compatible IE
1145 sbit at 0xAD ET2 ; // Enable timer2 interrupt
1148 #ifdef IE_EXT_SAB80515X
1149 #undef IE_EXT_SAB80515X
1151 // Additional bit register for the SAB80515 and compatible IE
1153 sbit at 0xAD ET2 ; // Enable timer 2 overflow SAB80515 specific
1154 sbit at 0xAE WDT ; // watchdog timer reset - SAB80515 specific
1155 sbit at 0xAF EAL ; // EA as called by Infineon / Siemens
1160 sfr at 0xB8 IEN1 ; // interrupt enable register - SAB80515 specific
1162 sbit at 0xB8 EADC ; // A/D converter interrupt enable
1168 sbit at 0xBE SWDT ; // watchdog timer start/reset
1169 sbit at 0xBF EXEN2 ; // timer2 external reload interrupt enable
1172 #ifdef IEN2_SAB80517
1173 #undef IEN2_SAB80517
1174 sfr at 0x9A IEN2 ; // interrupt enable register 2 SAB80517
1188 #ifdef IP_EXT_AT89X52_55
1189 #undef IP_EXT_AT89X52_55
1190 // Additional bit register for the AT89C52 and compatible
1194 #ifdef IP_EXT_DS80C320
1195 #undef IP_EXT_DS80C320
1196 // Additional bit register for the DS80C320 and compatible
1203 sfr at 0xA9 IP0 ; // interrupt priority register SAB80515 specific
1204 // Not directly accessible IP1 bits
1216 sfr at 0xB9 IP1 ; // interrupt priority register SAB80515 specific
1217 // Not directly accessible IP1 bits
1228 sfr at 0xC0 IRCON ; // interrupt control register - SAB80515 specific
1230 sbit at 0xC0 IADC ; // A/D converter irq flag
1231 sbit at 0xC1 IEX2 ; // external interrupt edge detect flag
1236 sbit at 0xC6 TF2 ; // timer 2 owerflow flag
1237 sbit at 0xC7 EXF2 ; // timer2 reload flag
1242 sfr at 0xC0 IRCON0 ; // interrupt control register - SAB80515 specific
1244 sbit at 0xC0 IADC ; // A/D converter irq flag
1245 sbit at 0xC1 IEX2 ; // external interrupt edge detect flag
1250 sbit at 0xC6 TF2 ; // timer 2 owerflow flag
1251 sbit at 0xC7 EXF2 ; // timer2 reload flag
1256 sfr at 0xD1 IRCON1 ; // interrupt control register - SAB80515 specific
1261 sfr at 0xE9 MD0 ; // MUL / DIV register 0 SAB80517
1266 sfr at 0xEA MD1 ; // MUL / DIV register 1 SAB80517
1271 sfr at 0xEB MD2 ; // MUL / DIV register 2 SAB80517
1276 sfr at 0xEC MD3 ; // MUL / DIV register 3 SAB80517
1281 sfr at 0xED MD4 ; // MUL / DIV register 4 SAB80517
1286 sfr at 0xEE MD5 ; // MUL / DIV register 5 SAB80517
1316 // P1 alternate functions
1322 #ifdef P1_EXT_DS80C320
1323 #undef P1_EXT_DS80C320
1324 // P1 alternate functions
1333 #ifdef P1_EXT_SAB80515X
1334 sbit at 0x90 INT3_CC0 ; // P1 alternate functions - SAB80515 specific
1335 sbit at 0x91 INT4_CC1 ;
1336 sbit at 0x92 INT5_CC2 ;
1337 sbit at 0x93 INT6_CC3 ;
1340 sbit at 0x96 CLKOUT ;
1383 sfr at 0xE8 P4 ; // Port 4 - SAB80515 & compatible microcontrollers
1397 sfr at 0xF8 P5 ; // Port 5 - SAB80515 & compatible microcontrollers
1411 sfr at 0xDB P6 ; // Port 6 - SAB80515 & compatible microcontrollers
1416 sfr at 0xFA P6 ; // Port 6 - SAB80517 specific
1421 sfr at 0xDB P7 ; // Port 7 - SAB80517 specific
1426 sfr at 0xDD P8 ; // Port 6 - SAB80517 specific
1432 // Not directly accessible PCON bits
1443 // Not directly accessible PCON bits
1447 #ifdef PCON_EXT_80515A
1448 #undef PCON_EXT_80515A
1449 // Not directly accessible PCON bits
1450 #define IDLE 0x01 ; same as IDL
1451 #define PDE 0x02 ; same as PD
1455 #define PCON_IDLE 0x01
1456 #define PCON_PDE 0x02
1457 #define PCON_GF0 0x04
1458 #define PCON_GF1 0x08
1459 #define PCON_IDLS 0x20
1460 #define PCON_PDS 0x40
1461 #define PCON_SMOD 0x80
1464 #ifdef PCON_EXT_DS8XCX2X
1465 #undef PCON_EXT_DS8XCX2X
1466 // Not directly accessible PCON bits
1467 #define SMOD0 0x40 // DS80C320, DS80C323, DS87C520, DS83C520
1472 sfr at 0xC4 PMR ; // DS87C520, DS83C520
1473 // Not directly accessible bits
1499 sfr at 0xCB RCAP2H ;
1504 sfr at 0xCA RCAP2L ;
1509 sfr at 0xC2 ROMSIZE ; // DS87C520, DS83C520
1510 // Not directly accessible bits
1518 sfr at 0x99 S0BUF ; // serial channel 0 buffer register SAB80517 specific
1523 sfr at 0x98 S0CON ; // serial channel 0 control register SAB80517 specific
1528 sfr at 0xAA S0RELL ; // serial channel 0 reload register low byte SAB80517 specific
1533 sfr at 0xBA S0RELH ; // serial channel 0 reload register high byte SAB80517 specific
1538 sfr at 0x9C S1BUF ; // serial channel 1 buffer register SAB80517 specific
1543 sfr at 0x9B S1CON ; // serial channel 1 control register SAB80517 specific
1548 sfr at 0x9D S1RELL ; // serial channel 1 reload register low byte SAB80517 specific
1553 sfr at 0xBB S1RELH ; // serial channel 1 reload register high byte SAB80517 specific
1558 // DS80C320 specific
1559 sfr at 0xA9 SADDR0 ;
1564 // DS80C320 specific
1565 sfr at 0xAA SADDR1 ;
1570 // DS80C320 specific
1571 sfr at 0xB9 SADEN0 ;
1576 // DS80C320 specific
1577 sfr at 0xBA SADEN1 ;
1587 // DS80C320 specific
1607 // DS80C320 specific
1612 sbit at 0xCA RB8_1 ;
1613 sbit at 0xCB TB8_1 ;
1614 sbit at 0xCC REN_1 ;
1615 sbit at 0xCD SM2_1 ;
1616 sbit at 0xCE SM1_1 ;
1617 sbit at 0xCF SM0_1 ;
1619 sbit at 0xCF SM0_FE_1 ;
1629 sfr at 0xD5 SPCR ; // AT89S53 specific
1630 // Not directly accesible bits
1643 sfr at 0x86 SPDR ; // AT89S53 specific
1644 // Not directly accesible bits
1657 sfr at 0xAA SPSR ; // AT89S53 specific
1658 // Not directly accesible bits
1665 sfr at 0xBA SRELH ; // Baudrate generator reload high
1670 sfr at 0xAA SRELL ; // Baudrate generator reload low
1673 #ifdef STATUS_DS80C32X
1674 #undef STATUS_DS80C32X
1675 // DS80C320 specific
1676 sfr at 0xC5 STATUS ;
1677 // Not directly accessible Bits. DS80C320 specific
1683 #ifdef STATUS_DS8XC520
1684 #undef STATUS_DS8XC520
1685 sfr at 0xC5 STATUS ; // DS87C520 & DS83520specific
1686 // Not directly accessible Bits.
1699 sfr at 0xB1 SYSCON ; // XRAM Controller Access Control
1701 #define SYSCON_XMAP0 0x01
1702 #define SYSCON_XMAP1 0x02
1703 #define SYSCON_RMAP 0x10
1704 #define SYSCON_EALE 0x20
1710 // Definitions for the 8052 compatible microcontrollers.
1712 sbit at 0xC8 CP_RL2 ;
1715 sbit at 0xCB EXEN2 ;
1721 sbit at 0xC8 T2CON_0 ;
1722 sbit at 0xC9 T2CON_1 ;
1723 sbit at 0xCA T2CON_2 ;
1724 sbit at 0xCB T2CON_3 ;
1725 sbit at 0xCC T2CON_4 ;
1726 sbit at 0xCD T2CON_5 ;
1727 sbit at 0xCE T2CON_6 ;
1728 sbit at 0xCF T2CON_7 ;
1734 // Definitions for the Infineon / Siemens SAB80515, SAB80515A, SAB80517, SAB-C505 compatible
1735 // Microcontrollers.
1737 // SAB-C505 has no I2FR
1738 // SAB-C504 has a 8052 style T2CON
1739 // SAB-C541 has no T2CON
1746 #ifndef MICROCONTROLLER_SABC505
1752 sbit at 0xC8 T2CON_0 ;
1753 sbit at 0xC9 T2CON_1 ;
1754 sbit at 0xCA T2CON_2 ;
1755 sbit at 0xCB T2CON_3 ;
1756 sbit at 0xCC T2CON_4 ;
1757 sbit at 0xCD T2CON_5 ;
1758 sbit at 0xCE T2CON_6 ;
1759 sbit at 0xCF T2CON_7 ;
1764 // Definitions for the timer/counter 2 of the Atmel 89x52 microcontroller
1766 // Not not directly accessible T2MOD bits
1776 // DS80C320 specific
1827 // Not directly accessible TMOD bits
1831 #define T0_GATE 0x08
1835 #define T1_GATE 0x80
1837 #define T0_MASK 0x0F
1838 #define T1_MASK 0xF0
1843 sfr at 0x96 WCON ; // AT89S53 specific
1844 // Not directly accesible bits
1855 // DS80C320 specific
1857 // Not directly accessible bits
1858 #define RWT 0x01 /* Timed-Access protected */
1859 #define EWT 0x02 /* Timed-Access protected */
1861 #define WDIF 0x08 /* Timed-Access protected */
1864 #define POR 0x40 /* Timed-Access protected */
1870 sfr at 0x86 WDTREL ; // Watchdof Timer reload register
1875 sfr at 0x91 XPAGE ; // Page Address Register for Extended On-Chip Ram - Infineon / Siemens SAB80515A specific
1879 /////////////////////////
1880 /// Interrupt vectors ///
1881 /////////////////////////
1883 // Interrupt numbers: address = (number * 8) + 3
1884 #define IE0_VECTOR 0 // 0x03 external interrupt 0
1885 #define TF0_VECTOR 1 // 0x0b timer 0
1886 #define IE1_VECTOR 2 // 0x13 external interrupt 1
1887 #define TF1_VECTOR 3 // 0x1b timer 1
1888 #define SI0_VECTOR 4 // 0x23 serial port 0
1890 #ifdef MICROCONTROLLER_AT89X52
1891 #define TF2_VECTOR 5 /* 0x2B timer 2 */
1892 #define EX2_VECTOR 5 /* 0x2B external interrupt 2 */
1895 #ifdef MICROCONTROLLER_SAB80515
1896 #define TF2_VECTOR 5 // 0x2B timer 2
1897 #define EX2_VECTOR 5 // 0x2B external interrupt 2
1899 #define IADC_VECTOR 8 // 0x43 A/D converter interrupt
1900 #define IEX2_VECTOR 9 // 0x4B external interrupt 2
1901 #define IEX3_VECTOR 10 // 0x53 external interrupt 3
1902 #define IEX4_VECTOR 11 // 0x5B external interrupt 4
1903 #define IEX5_VECTOR 12 // 0x63 external interrupt 5
1904 #define IEX6_VECTOR 13 // 0x6B external interrupt 6
1907 #ifdef MICROCONTROLLER_SAB80515A
1908 #define TF2_VECTOR 5 // 0x2B timer 2
1909 #define EX2_VECTOR 5 // 0x2B external interrupt 2
1911 #define IADC_VECTOR 8 // 0x43 A/D converter interrupt
1912 #define IEX2_VECTOR 9 // 0x4B external interrupt 2
1913 #define IEX3_VECTOR 10 // 0x53 external interrupt 3
1914 #define IEX4_VECTOR 11 // 0x5B external interrupt 4
1915 #define IEX5_VECTOR 12 // 0x63 external interrupt 5
1916 #define IEX6_VECTOR 13 // 0x6B external interrupt 6
1919 #ifdef MICROCONTROLLER_SAB80517
1920 #define TF2_VECTOR 5 // 0x2B timer 2
1921 #define EX2_VECTOR 5 // 0x2B external interrupt 2
1923 #define IADC_VECTOR 8 // 0x43 A/D converter interrupt
1924 #define IEX2_VECTOR 9 // 0x4B external interrupt 2
1925 #define IEX3_VECTOR 10 // 0x53 external interrupt 3
1926 #define IEX4_VECTOR 11 // 0x5B external interrupt 4
1927 #define IEX5_VECTOR 12 // 0x63 external interrupt 5
1928 #define IEX6_VECTOR 13 // 0x6B external interrupt 6
1931 #define SI1_VECTOR 16 // 0x83 serial port 1
1934 #define COMPARE_VECTOR 19 // 0x9B compare
1937 #endif // End of the header -> #ifndef MCS51REG_H