1 /*--------------------------------------------------------------------------
4 This header allows to use the microcontroler Philips P89c66x
5 with the compiler SDCC.
7 Copyright (c) 2007 Gudjon I. Gudjonsson <gudjon AT gudjon.org>
9 This library is free software; you can redistribute it and/or
10 modify it under the terms of the GNU Lesser General Public
11 License as published by the Free Software Foundation; either
12 version 2.1 of the License, or (at your option) any later version.
14 This library is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the GNU
17 Lesser General Public License for more details.
19 You should have received a copy of the GNU Lesser General Public
20 License along with this library; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA02111-1307 USA
23 The registered are ordered in the same way as in the NXP data sheet
24 P89C660_662_664_3.PDF, see http://www.nxp.com
26 --------------------------------------------------------------------------*/
33 SFR(ACC, 0xE0); // Accumulator
42 SFR(AUXR, 0x8E); // Auxiliary
45 SFR(AUXR1, 0xA2); // Auxiliary 1
50 SFR(B, 0xF0); // B register
59 SFR(CCAP0H, 0xFA); // Module 0 Capture High
60 SFR(CCAP1H, 0xFB); // Module 1 Capture High
61 SFR(CCAP2H, 0xFC); // Module 2 Capture High
62 SFR(CCAP3H, 0xFD); // Module 3 Capture High
63 SFR(CCAP4H, 0xFE); // Module 4 Capture High
64 SFR(CCAP0L, 0xEA); // Module 0 Capture Low
65 SFR(CCAP1L, 0xEB); // Module 1 Capture Low
66 SFR(CCAP2L, 0xEC); // Module 2 Capture Low
67 SFR(CCAP3L, 0xED); // Module 3 Capture Low
68 SFR(CCAP4L, 0xEE); // Module 4 Capture Low
69 SFR(CCAPM0, 0xC2); // Module 0 Mode
70 SFR(CCAPM1, 0xC3); // Module 1 Mode
71 SFR(CCAPM2, 0xC4); // Module 2 Mode
72 SFR(CCAPM3, 0xC5); // Module 3 Mode
73 SFR(CCAPM4, 0xC6); // Module 4 Mode
81 SFR(CCON, 0xC0); // PCA Counter Control
89 SFR(CH, 0xF9); // PCA Counter High
90 SFR(CL, 0xE9); // PCA Counter Low
91 SFR(CMOD, 0xC1); // PCA Counter Mode
97 SFR(DPH, 0x83); // Data Pointer High
98 SFR(DPL, 0x82); // Data Pointer Low
99 SFR(IEN0, 0xA8); // Interrupt Enable 0
108 SFR(IEN1, 0xE8); // Interrupt Enable 1
110 SFR(IP, 0xB8); // Interrupt Priority
119 SFR(IPH, 0xB7); // Interrupt Priority High
128 SFR(P0, 0x80); // Port 0
145 SFR(P1, 0x90); // Port 1
146 SBIT(T1_CEX4, 0x90, 7);
148 SBIT(T0_CEX3, 0x90, 6);
162 SFR(P2, 0xA0); // Port 2
179 SFR(P3, 0xB0); // Port 3
196 SFR(PCON, 0x87); // Power Control
204 SFR(PSW, 0xD0); // Program Status Word
213 SFR(RCAP2H, 0xCB); // Timer 2 Capture High
214 SFR(RCAP2L, 0xCA); // Timer 2 Capture Low
215 SFR(SADDR, 0xA9); // I2C Slave Address
216 SFR(SADEN, 0xB9); // I2C Slave Address Mask
217 SFR(S0BUF, 0x99); // Serial Data Buffer
218 SFR(S0CON, 0x98); // Serial Control
219 SBIT(SM0_FE, 0x98, 7);
227 SFR(SP, 0x81); // Stack Pointer
228 SFR(S1DAT, 0xDA); // I2C Serial 1 Data
229 SFR(S1IST, 0xDC); // I2C Serial 1 Internal Status
230 SFR(S1ADR, 0xDB); // I2C Serial 1 Address
232 SFR(S1STA, 0xD9); // I2C Serial 1 Status
238 SFR(S1CON, 0xD8); // I2C Serial 1 Control
247 SFR(TCON, 0x88); // Timer Control
256 SFR(T2CON, 0xC8); // Timer 2 Control
261 SBIT(EXEN2, 0xC8, 3);
264 SBIT(CP_RL2, 0xC8, 0);
265 SFR(T2MOD, 0xC9); // Timer 2 Mode Control
268 SFR(TH0 , 0x8C); // Timer High 0
269 SFR(TH1, 0x8D); // Timer High 1
270 SFR(TH2, 0xCD); // Timer High 2
271 SFR(TL0, 0x8A); // Timer Low 0
272 SFR(TL1, 0x8B); // Timer Low 1
273 SFR(TL2, 0xCC); // Timer Low 2
274 SFR(TMOD, 0x89); // Timer Mode
283 SFR(WDTRST, 0xA6); // Watchdog Timer Reset