1 /*--------------------------------------------------------------------------
4 This header allows to use the microcontroler Philips P89LPC901
5 with the compiler SDCC.
7 Copyright (c) 2005 Omar Espinosa--e-mail: opiedrahita2003 AT yahoo.com.
9 This library is free software; you can redistribute it and/or
10 modify it under the terms of the GNU Lesser General Public
11 License as published by the Free Software Foundation; either
12 version 2.1 of the License, or (at your option) any later version.
14 This library is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 Lesser General Public License for more details.
19 You should have received a copy of the GNU Lesser General Public
20 License along with this library; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
24 Archivo encabezador para el ucontrolador Philips P89LPC901.
25 Derechos de copy (DC) 2005. OMAR ESPINOSA P. E-mail: opiedrahita2003 AT yahoo.com
27 --------------------------------------------------------------------------*/
33 __sfr __at (0x80) P0 ;
34 __sfr __at (0x84) P0M1 ;
35 __sfr __at (0x85) P0M2 ;
37 __sfr __at (0x90) P1 ;
38 __sfr __at (0x91) P1M1 ;
39 __sfr __at (0x92) P1M2 ;
41 __sfr __at (0xB0) P3 ;
42 __sfr __at (0xB1) P3M1 ;
43 __sfr __at (0xB2) P3M2 ;
45 __sfr __at (0xD0) PSW ;
46 __sfr __at (0xE0) ACC ;
48 __sfr __at (0x81) SP ;
49 __sfr __at (0x82) DPL ;
50 __sfr __at (0x83) DPH ;
52 __sfr __at (0xA2) AUXR1 ;
53 __sfr __at (0xAC) CMP1 ;
54 __sfr __at (0x95) DIVM ;
56 __sfr __at (0xE7) FMADRH ;
57 __sfr __at (0xE6) FMADRL ;
58 __sfr __at (0xE4) FMCON ;
59 __sfr __at (0xE5) FMDATA ;
61 __sfr __at (0xA8) IEN0 ;
62 __sfr __at (0xE8) IEN1 ;
64 __sfr __at (0xB8) IP0 ;
65 __sfr __at (0xB7) IP0H ;
66 __sfr __at (0xF8) IP1 ;
67 __sfr __at (0xF7) IP1H ;
69 __sfr __at (0x94) KBCON ;
70 __sfr __at (0x86) KBMASK ;
71 __sfr __at (0x93) KBPATN ;
73 __sfr __at (0x87) PCON ;
74 __sfr __at (0xB5) PCONA ;
75 __sfr __at (0xB6) PCONB ;
77 __sfr __at (0xF6) PT0AD ;
78 __sfr __at (0xDF) RSTSRC ;
80 __sfr __at (0xD1) RTCCON ;
81 __sfr __at (0xD2) RTCH ;
82 __sfr __at (0xD3) RTCL ;
84 __sfr __at (0x8F) TAMOD ;
85 __sfr __at (0x88) TCON ;
86 __sfr __at (0x8A) TL0 ;
87 __sfr __at (0x8B) TL1 ;
88 __sfr __at (0x8C) TH0 ;
89 __sfr __at (0x8D) TH1 ;
90 __sfr __at (0x89) TMOD ;
91 __sfr __at (0x96) TRIM ;
93 __sfr __at (0xA7) WDCON ;
94 __sfr __at (0xC1) WDL ;
95 __sfr __at (0xC2) WFEED1 ;
96 __sfr __at (0xC3) WFEED2 ;
101 __sbit __at (0xD7) PSW_7;
102 __sbit __at (0xD6) PSW_6;
103 __sbit __at (0xD5) PSW_5;
104 __sbit __at (0xD4) PSW_4;
105 __sbit __at (0xD3) PSW_3;
106 __sbit __at (0xD2) PSW_2;
107 __sbit __at (0xD1) PSW_1;
108 __sbit __at (0xD0) PSW_0;
120 __sbit __at (0x8F) TCON_7;
121 __sbit __at (0x8E) TCON_6;
122 __sbit __at (0x8D) TCON_5;
123 __sbit __at (0x8C) TCON_4;
131 __sbit __at (0xAF) IEN0_7;
132 __sbit __at (0xAE) IEN0_6;
133 __sbit __at (0xAD) IEN0_5;
134 __sbit __at (0xAB) IEN0_3;
135 __sbit __at (0xA9) IEN0_1;
144 __sbit __at (0xEA) IEN1_2;
145 __sbit __at (0xE9) IEN1_1;
151 __sbit __at (0xBE) IP0_6;
152 __sbit __at (0xBD) IP0_5;
153 __sbit __at (0xBB) IP0_3;
154 __sbit __at (0xB9) IP0_1;
162 __sbit __at (0x85) P0_5;
163 __sbit __at (0x84) P0_4;
171 __sbit __at (0x95) P1_5;
172 __sbit __at (0x92) P1_2;
178 __sbit __at (0xB1) P3_1;
179 __sbit __at (0xB0) P3_0;