1 /*-------------------------------------------------------------------------
2 Register Declarations for Motorola MC68HC908JK1/JK3/JL3/JK8/JL8
4 Copyright (c) 2004, Lucas Loizaga <lucas.loizaga@ingenieria-inversa.com.ar>
6 Based on mc68hc908qy.h,
7 Written By - Erik Petrich
8 epetrich@users.sourceforge.net (2003)
10 This program is free software; you can redistribute it and/or modify it
11 under the terms of the GNU General Public License as published by the
12 Free Software Foundation; either version 2, or (at your option) any
15 This program is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with this program; if not, write to the Free Software
22 Foundation, 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
24 In other words, you are welcome to use, share and improve this program.
25 You are forbidden to forbid anyone else to use, share and improve
26 what you give them. Help stamp out software-hoarding!
27 -------------------------------------------------------------------------*/
29 #ifndef _MC68HC908JKJL_H
30 #define _MC68HC908JKJL_H
33 #define _UINT8 unsigned char
36 #define _UINT16 unsigned int
39 #define _VOLDATA volatile __data
42 #define _VOLXDATA volatile __xdata
58 _VOLDATA _UINT8 __at 0x00 PTA; /* Port A Data Register */
59 #define PORTA PTA /* Alias for PTA */
60 #define PTA0 ((struct __hc08_bits *)(&PTA))->bit0
61 #define PTA1 ((struct __hc08_bits *)(&PTA))->bit1
62 #define PTA2 ((struct __hc08_bits *)(&PTA))->bit2
63 #define PTA3 ((struct __hc08_bits *)(&PTA))->bit3
64 #define PTA4 ((struct __hc08_bits *)(&PTA))->bit4
65 #define PTA5 ((struct __hc08_bits *)(&PTA))->bit5
66 #define PTA6 ((struct __hc08_bits *)(&PTA))->bit6
67 #define PTA7 ((struct __hc08_bits *)(&PTA))->bit7
69 _VOLDATA _UINT8 __at 0x01 PTB; /* Port B Data Register */
70 #define PORTB PTB /* Alias for PTB */
71 #define PTB0 ((struct __hc08_bits *)(&PTB))->bit0
72 #define PTB1 ((struct __hc08_bits *)(&PTB))->bit1
73 #define PTB2 ((struct __hc08_bits *)(&PTB))->bit2
74 #define PTB3 ((struct __hc08_bits *)(&PTB))->bit3
75 #define PTB4 ((struct __hc08_bits *)(&PTB))->bit4
76 #define PTB5 ((struct __hc08_bits *)(&PTB))->bit5
77 #define PTB6 ((struct __hc08_bits *)(&PTB))->bit6
78 #define PTB7 ((struct __hc08_bits *)(&PTB))->bit7
80 _VOLDATA _UINT8 __at 0x03 PTD; /* Port D Data Register */
81 #define PORTD PTD /* Alias for PTD */
82 #define PTD0 ((struct __hc08_bits *)(&PTD))->bit0
83 #define PTD1 ((struct __hc08_bits *)(&PTD))->bit1
84 #define PTD2 ((struct __hc08_bits *)(&PTD))->bit2
85 #define PTD3 ((struct __hc08_bits *)(&PTD))->bit3
86 #define PTD4 ((struct __hc08_bits *)(&PTD))->bit4
87 #define PTD5 ((struct __hc08_bits *)(&PTD))->bit5
88 #define PTD6 ((struct __hc08_bits *)(&PTD))->bit6
89 #define PTD7 ((struct __hc08_bits *)(&PTD))->bit7
91 _VOLDATA _UINT8 __at 0x04 DDRA; /* Data Direction Register A */
92 #define DDRA0 ((struct __hc08_bits *)(&DDRA))->bit0
93 #define DDRA1 ((struct __hc08_bits *)(&DDRA))->bit1
94 #define DDRA2 ((struct __hc08_bits *)(&DDRA))->bit2
95 #define DDRA3 ((struct __hc08_bits *)(&DDRA))->bit3
96 #define DDRA4 ((struct __hc08_bits *)(&DDRA))->bit4
97 #define DDRA5 ((struct __hc08_bits *)(&DDRA))->bit5
98 #define DDRA6 ((struct __hc08_bits *)(&DDRA))->bit6
99 #define DDRA7 ((struct __hc08_bits *)(&DDRA))->bit7
101 _VOLDATA _UINT8 __at 0x05 DDRB; /* Data Direction Register B */
102 #define DDRB0 ((struct __hc08_bits *)(&DDRB))->bit0
103 #define DDRB1 ((struct __hc08_bits *)(&DDRB))->bit1
104 #define DDRB2 ((struct __hc08_bits *)(&DDRB))->bit2
105 #define DDRB3 ((struct __hc08_bits *)(&DDRB))->bit3
106 #define DDRB4 ((struct __hc08_bits *)(&DDRB))->bit4
107 #define DDRB5 ((struct __hc08_bits *)(&DDRB))->bit5
108 #define DDRB6 ((struct __hc08_bits *)(&DDRB))->bit6
109 #define DDRB7 ((struct __hc08_bits *)(&DDRB))->bit7
111 _VOLDATA _UINT8 __at 0x07 DDRD; /* Data Direction Register D */
112 #define DDRD0 ((struct __hc08_bits *)(&DDRD))->bit0
113 #define DDRD1 ((struct __hc08_bits *)(&DDRD))->bit1
114 #define DDRD2 ((struct __hc08_bits *)(&DDRD))->bit2
115 #define DDRD3 ((struct __hc08_bits *)(&DDRD))->bit3
116 #define DDRD4 ((struct __hc08_bits *)(&DDRD))->bit4
117 #define DDRD5 ((struct __hc08_bits *)(&DDRD))->bit5
118 #define DDRD6 ((struct __hc08_bits *)(&DDRD))->bit6
119 #define DDRD7 ((struct __hc08_bits *)(&DDRD))->bit7
121 _VOLDATA _UINT8 __at 0x08 PTE; /* Port E Data Register */
122 #define PORTE PTE /* Alias for PTE */
123 #define PTE0 ((struct __hc08_bits *)(&PTE))->bit0
124 #define PTE1 ((struct __hc08_bits *)(&PTE))->bit1
127 _VOLDATA _UINT8 __at 0x0A PTE; /* Port D Control Register */
128 #define PORTE PTE /* Alias for PDCR */
129 #define PTDPU6 ((struct __hc08_bits *)(&PTE))->bit0
130 #define PTDPU7 ((struct __hc08_bits *)(&PTE))->bit1
131 #define SLOWD6 ((struct __hc08_bits *)(&PTE))->bit2
132 #define SLOWD7 ((struct __hc08_bits *)(&PTE))->bit3
134 _VOLDATA _UINT8 __at 0x0C DDRE; /* Data Direction Register E */
135 #define DDRE0 ((struct __hc08_bits *)(&DDRE))->bit0
136 #define DDRE1 ((struct __hc08_bits *)(&DDRE))->bit1
139 _VOLDATA _UINT8 __at 0x0D PTAPUE; /* Port A pull-up enables */
140 #define PTAPUE0 ((struct __hc08_bits *)(&PTAPUE))->bit0
141 #define PTAPUE1 ((struct __hc08_bits *)(&PTAPUE))->bit1
142 #define PTAPUE2 ((struct __hc08_bits *)(&PTAPUE))->bit2
143 #define PTAPUE3 ((struct __hc08_bits *)(&PTAPUE))->bit3
144 #define PTAPUE4 ((struct __hc08_bits *)(&PTAPUE))->bit4
145 #define PTAPUE5 ((struct __hc08_bits *)(&PTAPUE))->bit5
146 #define PTAPUE6 ((struct __hc08_bits *)(&PTAPUE))->bit6
147 #define PTA6EN ((struct __hc08_bits *)(&PTAPUE))->bit7
149 _VOLDATA _UINT8 __at 0x0E PTA7PUE; /* Port A pull-up enables */
150 #define PTAPUE7 ((struct __hc08_bits *)(&PTA7PUE))->bit7
152 _VOLDATA _UINT8 __at 0x13 SCC1; /* SCI Control Register 1 */
153 #define LOOPS ((struct __hc08_bits *)(&SCC1))->bit7
154 #define ENSCI ((struct __hc08_bits *)(&SCC1))->bit6
155 #define TXINV ((struct __hc08_bits *)(&SCC1))->bit5
156 #define M ((struct __hc08_bits *)(&SCC1))->bit4
157 #define WAKE ((struct __hc08_bits *)(&SCC1))->bit3
158 #define ILTY ((struct __hc08_bits *)(&SCC1))->bit2
159 #define PEN ((struct __hc08_bits *)(&SCC1))->bit1
160 #define PTY ((struct __hc08_bits *)(&SCC1))->bit0
163 _VOLDATA _UINT8 __at 0x14 SCC2; /* SCI Control Register 2 */
164 #define SCTIE ((struct __hc08_bits *)(&SCC2))->bit7
165 #define TCIE ((struct __hc08_bits *)(&SCC2))->bit6
166 #define SCRIE ((struct __hc08_bits *)(&SCC2))->bit5
167 #define ILIE ((struct __hc08_bits *)(&SCC2))->bit4
168 #define TE ((struct __hc08_bits *)(&SCC2))->bit3
169 #define RE ((struct __hc08_bits *)(&SCC2))->bit2
170 #define WRU ((struct __hc08_bits *)(&SCC2))->bit1
171 #define SBK ((struct __hc08_bits *)(&SCC2))->bit0
173 _VOLDATA _UINT8 __at 0x15 SCC3; /* SCI Control Register 3 */
174 #define SCC3_R8 ((struct __hc08_bits *)(&SCC3))->bit7
175 #define SCC3_TB ((struct __hc08_bits *)(&SCC3))->bit6
176 #define DMARE ((struct __hc08_bits *)(&SCC3))->bit5
177 #define DMATE ((struct __hc08_bits *)(&SCC3))->bit4
178 #define ORIE ((struct __hc08_bits *)(&SCC3))->bit3
179 #define NEIE ((struct __hc08_bits *)(&SCC3))->bit2
180 #define FEIE ((struct __hc08_bits *)(&SCC3))->bit1
181 #define PEIE ((struct __hc08_bits *)(&SCC3))->bit0
183 _VOLDATA _UINT8 __at 0x16 SCS1; /* SCI Status Register 1 */
184 #define SCTE ((struct __hc08_bits *)(&SCS1))->bit7
185 #define TC ((struct __hc08_bits *)(&SCS1))->bit6
186 #define SCRF ((struct __hc08_bits *)(&SCS1))->bit5
187 #define IDLE ((struct __hc08_bits *)(&SCS1))->bit4
188 #define OR ((struct __hc08_bits *)(&SCS1))->bit3
189 #define NF ((struct __hc08_bits *)(&SCS1))->bit2
190 #define FE ((struct __hc08_bits *)(&SCS1))->bit1
191 #define PE ((struct __hc08_bits *)(&SCS1))->bit0
193 _VOLDATA _UINT8 __at 0x17 SCS2; /* SCI Status Register 2 */
194 #define RPF ((struct __hc08_bits *)(&SCS2))->bit0
195 #define BKF ((struct __hc08_bits *)(&SCS2))->bit1
196 /* Bits 2-7 not implemented */
198 _VOLDATA _UINT8 __at 0x18 SCDR; /* SCI Data Register */
200 _VOLDATA _UINT8 __at 0x19 SCBR; /* SCI Baud Rate Register */
201 #define SCP1 ((struct __hc08_bits *)(&SCBR))->bit5
202 #define SCP0 ((struct __hc08_bits *)(&SCBR))->bit4
203 #define R ((struct __hc08_bits *)(&SCBR))->bit3
204 #define SCR2 ((struct __hc08_bits *)(&SCBR))->bit2
205 #define SCR1 ((struct __hc08_bits *)(&SCBR))->bit1
206 #define SCR0 ((struct __hc08_bits *)(&SCBR))->bit0
207 /*-- Bits 6 and 7 do not exist */
210 _VOLDATA _UINT8 __at 0x1a KBSCR; /* Keyboard Status and Control Register */
211 #define MODEK ((struct __hc08_bits *)(&KBSCR))->bit0
212 #define IMASKK ((struct __hc08_bits *)(&KBSCR))->bit1
213 #define ACKK ((struct __hc08_bits *)(&KBSCR))->bit2
214 #define KEYF ((struct __hc08_bits *)(&KBSCR))->bit3
215 /*-- Bits 4-7 do not exist */
217 _VOLDATA _UINT8 __at 0x1b KBIER; /* Keyboard Interrupt Enable Register */
218 #define KBIE0 ((struct __hc08_bits *)(&KBIER))->bit0
219 #define KBIE1 ((struct __hc08_bits *)(&KBIER))->bit1
220 #define KBIE3 ((struct __hc08_bits *)(&KBIER))->bit3
221 #define KBIE2 ((struct __hc08_bits *)(&KBIER))->bit2
222 #define KBIE4 ((struct __hc08_bits *)(&KBIER))->bit4
223 #define KBIE5 ((struct __hc08_bits *)(&KBIER))->bit5
224 #define KBIE6 ((struct __hc08_bits *)(&KBIER))->bit6
225 #define KBIE7 ((struct __hc08_bits *)(&KBIER))->bit7
227 _VOLDATA _UINT8 __at 0x1D INTSCR; /* IRQ status/control */
228 #define IRQF1 ((struct __hc08_bits *)(&INTSCR))->bit3
229 #define ACK1 ((struct __hc08_bits *)(&INTSCR))->bit2
230 #define IMASK1 ((struct __hc08_bits *)(&INTSCR))->bit1
231 #define MODE1 ((struct __hc08_bits *)(&INTSCR))->bit0
232 /* Bits 4-7 unimplemented */
234 _VOLDATA _UINT8 __at 0x1e CONFIG2; /* Configuration Register 2 */
235 /* CONFIG2 is one-time writeble, so can't use bitfields */
237 _VOLDATA _UINT8 __at 0x1f CONFIG1; /* Configuration Register 1 */
238 /* CONFIG1 is one-time writeable, so can't use bitfields */
240 _VOLDATA _UINT8 __at 0x20 T1SC; /* TIM 1 Status and Control */
241 #define PS0 ((struct __hc08_bits *)(&T1SC))->bit0
242 #define PS1 ((struct __hc08_bits *)(&T1SC))->bit1
243 #define PS2 ((struct __hc08_bits *)(&T1SC))->bit2
244 #define TRST ((struct __hc08_bits *)(&T1SC))->bit4
245 #define TSTOP ((struct __hc08_bits *)(&T1SC))->bit5
246 #define TOIE ((struct __hc08_bits *)(&T1SC))->bit6
247 #define TOF ((struct __hc08_bits *)(&T1SC))->bit7
249 _VOLDATA _UINT16 __at 0x21 T1CNT; /* TIM1 Counter High & Low Registers */
250 _VOLDATA _UINT8 __at 0x21 T1CNTH; /* TIM1 Counter Register High */
251 _VOLDATA _UINT8 __at 0x22 T1CNTL; /* TIM1 Counter Register Low */
253 _VOLDATA _UINT16 __at 0x23 T1MOD; /* TIM1 Counter Modulo High & Low Registers */
254 _VOLDATA _UINT8 __at 0x23 T1MODH; /* TIM1 Counter Modulo Register High */
255 _VOLDATA _UINT8 __at 0x24 T1MODL; /* TIM1 Counter Modulo Register Low */
257 _VOLDATA _UINT8 __at 0x25 T1SC0; /* TIM1 Channel 0 Status and Control Register */
258 #define CH0MAX ((struct __hc08_bits *)(&T1SC0))->bit0
259 #define TOV0 ((struct __hc08_bits *)(&T1SC0))->bit1
260 #define ELS0A ((struct __hc08_bits *)(&T1SC0))->bit2
261 #define ELS0B ((struct __hc08_bits *)(&T1SC0))->bit3
262 #define MS0A ((struct __hc08_bits *)(&T1SC0))->bit4
263 #define MS0B ((struct __hc08_bits *)(&T1SC0))->bit5
264 #define CH0IE ((struct __hc08_bits *)(&T1SC0))->bit6
265 #define CH0F ((struct __hc08_bits *)(&T1SC0))->bit7
267 _VOLDATA _UINT16 __at 0x26 T1CH0; /* TIM1 Channel 0 High & Low Registers */
268 _VOLDATA _UINT8 __at 0x26 T1CH0H; /* TIM1 Channel 0 Register High */
269 _VOLDATA _UINT8 __at 0x27 T1CH0L; /* TIM1 Channel 0 Register Low */
271 _VOLDATA _UINT8 __at 0x28 T1SC1; /* TIM1 Channel 1 Status and Control Register */
272 #define CH1MAX ((struct __hc08_bits *)(&T1SC1))->bit0
273 #define TOV1 ((struct __hc08_bits *)(&T1SC1))->bit1
274 #define ELS1A ((struct __hc08_bits *)(&T1SC1))->bit2
275 #define ELS1B ((struct __hc08_bits *)(&T1SC1))->bit3
276 #define MS1A ((struct __hc08_bits *)(&T1SC1))->bit4
277 #define CH1IE ((struct __hc08_bits *)(&T1SC1))->bit6
278 #define CH1F ((struct __hc08_bits *)(&T1SC1))->bit7
280 _VOLDATA _UINT16 __at 0x29 T1CH1; /* TIM1 Channel 1 High & Low Registers */
281 _VOLDATA _UINT8 __at 0x29 T1CH1H; /* TIM1 Channel 1 Register High */
282 _VOLDATA _UINT8 __at 0x2A T1CH1L; /* TIM1 Channel 1 Register Low */
284 _VOLDATA _UINT8 __at 0x30 T2SC; /* TIM2 Status and Control Register */
285 #define PS0_2 ((struct __hc08_bits *)(&T2SC))->bit0
286 #define PS1_2 ((struct __hc08_bits *)(&T2SC0))->bit1
287 #define PS2_2 ((struct __hc08_bits *)(&T2SC0))->bit2
288 #define TRST_2 ((struct __hc08_bits *)(&T2SC0))->bit4
289 #define TSTOP_2 ((struct __hc08_bits *)(&T2SC0))->bit5
290 #define TOIE_2 ((struct __hc08_bits *)(&T2SC0))->bit6
291 #define TOF_2 ((struct __hc08_bits *)(&T2SC0))->bit7
293 _VOLDATA _UINT16 __at 0x31 T2CNT; /* TIM2 Counter Registers */
294 _VOLDATA _UINT8 __at 0x31 T2CNTH; /* TIM2 Counter Register High */
295 _VOLDATA _UINT8 __at 0x32 T2CNTL; /* TIM2 Counter Register Low */
298 _VOLDATA _UINT16 __at 0x33 T2MOD; /* TIM2 Counter Modulo Registers */
299 _VOLDATA _UINT8 __at 0x33 T2MODH; /* TIM2 Counter Modulo Register High */
300 _VOLDATA _UINT8 __at 0x34 T2MODL; /* TIM2 Counter Modulo Register Low */
303 _VOLDATA _UINT8 __at 0x35 T2SC1; /* TIM2 Channel 0 Status and Control Register */
304 #define CH0MAX_2 ((struct __hc08_bits *)(&T2SC1))->bit0
305 #define TOV0_2 ((struct __hc08_bits *)(&T2SC1))->bit1
306 #define ELS0A_2 ((struct __hc08_bits *)(&T2SC1))->bit2
307 #define ELS0B_2 ((struct __hc08_bits *)(&T2SC1))->bit3
308 #define MS0A_2 ((struct __hc08_bits *)(&T2SC1))->bit4
309 #define CH0IE_2 ((struct __hc08_bits *)(&T2SC1))->bit6
310 #define CH0F_2 ((struct __hc08_bits *)(&T2SC1))->bit7
312 _VOLDATA _UINT16 __at 0x36 T2CH0; /* TIM2 Channel 0 High & Low Registers */
313 _VOLDATA _UINT8 __at 0x36 T2CH0H; /* TIM2 Channel 0 Register High */
314 _VOLDATA _UINT8 __at 0x37 T2CH0L; /* TIM2 Channel 0 Register Low */
316 _VOLDATA _UINT8 __at 0x38 T2SC1; /* TIM2 Channel 1 Status and Control Register */
317 #define CH1MAX_2 ((struct __hc08_bits *)(&T2SC1))->bit0
318 #define TOV1_2 ((struct __hc08_bits *)(&T2SC1))->bit1
319 #define ELS1A_2 ((struct __hc08_bits *)(&T2SC1))->bit2
320 #define ELS1B_2 ((struct __hc08_bits *)(&T2SC1))->bit3
321 #define MS1A_2 ((struct __hc08_bits *)(&T2SC1))->bit4
322 #define CH1IE_2 ((struct __hc08_bits *)(&T2SC1))->bit6
323 #define CH1F_2 ((struct __hc08_bits *)(&T2SC1))->bit7
325 _VOLDATA _UINT16 __at 0x39 T2CH1; /* TIM2 Channel 1 High & Low Registers */
326 _VOLDATA _UINT8 __at 0x39 T2CH1H; /* TIM2 Channel 1 Register High */
327 _VOLDATA _UINT8 __at 0x3a T2CH1L; /* TIM2 Channel 1 Register Low */
330 _VOLDATA _UINT8 __at 0x3c ADSCR; /* Analog-to-Digital Status and Control Reg. */
331 #define COCO ((struct __hc08_bits *)(&ADSCR))->bit7
332 #define AIEN ((struct __hc08_bits *)(&ADSCR))->bit6
333 #define ADCO ((struct __hc08_bits *)(&ADSCR))->bit5
334 #define ADCH4 ((struct __hc08_bits *)(&ADSCR))->bit4
335 #define ADCH3 ((struct __hc08_bits *)(&ADSCR))->bit3
336 #define ADCH2 ((struct __hc08_bits *)(&ADSCR))->bit2
337 #define ADCH1 ((struct __hc08_bits *)(&ADSCR))->bit1
338 #define ADCH0 ((struct __hc08_bits *)(&ADSCR))->bit0
340 _VOLDATA _UINT8 __at 0x3d ADR; /* Analog-to-Digital Data Register */
342 _VOLDATA _UINT8 __at 0x3e ADCLK; /* Analog-to-Digital Clock */
343 #define ADIV2 ((struct __hc08_bits *)(&ADCLK))->bit7
344 #define ADIV1 ((struct __hc08_bits *)(&ADCLK))->bit6
345 #define ADIV0 ((struct __hc08_bits *)(&ADCLK))->bit5
346 /* Bits 0-4 unimplemented */
348 _VOLXDATA _UINT8 __at 0xfe00 BSR; /* SIM Break Status Register */
349 #define SBSW ((struct __hc08_bits *)(&BSR))->bit1
351 _VOLXDATA _UINT8 __at 0xfe01 RSR; /* SIM Reset Status Register */
352 #define LVI ((struct __hc08_bits *)(&RSR))->bit1
353 #define MODRST ((struct __hc08_bits *)(&RSR))->bit2
354 #define ILAD ((struct __hc08_bits *)(&RSR))->bit3
355 #define ILOP ((struct __hc08_bits *)(&RSR))->bit4
356 #define COP ((struct __hc08_bits *)(&RSR))->bit5
357 #define PIN ((struct __hc08_bits *)(&RSR))->bit6
358 #define POR ((struct __hc08_bits *)(&RSR))->bit7
359 /* Bit 0 unimplemented */
361 _VOLXDATA _UINT8 __at 0xfe02 SUBAR; /* SIM Upper Byte Address */
363 _VOLXDATA _UINT8 __at 0xfe03 BFCR; /* SIM Break Flag Control Register */
364 #define BFCE ((struct __hc08_bits *)(&BFCR))->bit7
366 _VOLXDATA _UINT8 __at 0xfe04 INT1; /* Interrupt Status Register 1 */
367 #define IF1 ((struct __hc08_bits *)(&INT1))->bit2
368 #define IF3 ((struct __hc08_bits *)(&INT1))->bit4
369 #define IF4 ((struct __hc08_bits *)(&INT1))->bit5
370 #define IF5 ((struct __hc08_bits *)(&INT1))->bit6
373 _VOLXDATA _UINT8 __at 0xfe05 INT2; /* Interrupt Status Register 2 */
374 #define IF14 ((struct __hc08_bits *)(&INT2))->bit7
376 _VOLXDATA _UINT8 __at 0xfe06 INT3; /* Interrupt Status Register 3 */
377 #define IF16 ((struct __hc08_bits *)(&INT3))->bit1
378 #define IF15 ((struct __hc08_bits *)(&INT3))->bit0
380 _VOLXDATA _UINT8 __at 0xfe08 FLCR; /* FLASH Control Register */
381 #define PGM ((struct __hc08_bits *)(&FLCR))->bit0
382 #define ERASE ((struct __hc08_bits *)(&FLCR))->bit1
383 #define MASS ((struct __hc08_bits *)(&FLCR))->bit2
384 #define HVEN ((struct __hc08_bits *)(&FLCR))->bit3
386 _VOLXDATA _UINT8 __at 0xfe09 FLBPR; /* Flash Block Protect Register */
387 #define BPR0 ((struct __hc08_bits *)(&FLBPR))->bit0
388 #define BPR1 ((struct __hc08_bits *)(&FLBPR))->bit1
389 #define BPR2 ((struct __hc08_bits *)(&FLBPR))->bit2
390 #define BPR3 ((struct __hc08_bits *)(&FLBPR))->bit3
391 #define BPR4 ((struct __hc08_bits *)(&FLBPR))->bit4
392 #define BPR5 ((struct __hc08_bits *)(&FLBPR))->bit5
393 #define BPR6 ((struct __hc08_bits *)(&FLBPR))->bit6
394 #define BPR7 ((struct __hc08_bits *)(&FLBPR))->bit7
396 _VOLXDATA _UINT16 __at 0xfe0C BRK; /* Break Address High & Low Registers */
397 _VOLXDATA _UINT8 __at 0xfe0C BRKH; /* Break Address High Register */
398 _VOLXDATA _UINT8 __at 0xfe0D BRKL; /* Break Address Low Register */
400 _VOLXDATA _UINT8 __at 0xfe0e BRKSCR; /* Break Status and Control Register */
401 #define BRKA ((struct __hc08_bits *)(&BRKSCR))->bit6
402 #define BRKE ((struct __hc08_bits *)(&BRKSCR))->bit7
404 _VOLXDATA _UINT8 __at 0xffff COPCTL; /* COP Control Register */