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   1 /***************************************************************************
   2  *   Copyright (C) 2010 by Spencer Oliver                                  *
   3  *   spen@spen-soft.co.uk                                                  *
   4  *                                                                         *
   5  *   This program is free software; you can redistribute it and/or modify  *
   6  *   it under the terms of the GNU General Public License as published by  *
   7  *   the Free Software Foundation; either version 2 of the License, or     *
   8  *   (at your option) any later version.                                   *
   9  *                                                                         *
  10  *   This program is distributed in the hope that it will be useful,       *
  11  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  12  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  13  *   GNU General Public License for more details.                          *
  14  *                                                                         *
  15  *   You should have received a copy of the GNU General Public License     *
  16  *   along with this program; if not, write to the                         *
  17  *   Free Software Foundation, Inc.,                                       *
  18  *   51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.           *
  19  ***************************************************************************/
  20
  21         .text
  22         .arm
  23         .arch armv4t
  24
  25         .section .init
  26 /*
  27         r0 source address
  28         r1 address
  29         r2 FLASH_CR0
  30         r3 dword count
  31         r4 result
  32         r5 busy mask
  33 */
  34
  35 write:
  36         mov             r4, #0x10000000                 /* set DWPG bit */
  37         str             r4, [r2, #0x0]                  /* FLASH_CR0 */
  38         str             r1, [r2, #0x10]                 /* FLASH_AR */
  39         ldr             r4, [r0], #4                    /* load data */
  40         str             r4, [r2, #0x8]                  /* FLASH_DR0 */
  41         ldr             r4, [r0], #4                    /* load data */
  42         str             r4, [r2, #0xc]                  /* FLASH_DR1 */
  43         mov             r4, #0x90000000                 /* set DWPG and WMS bits */
  44         str             r4, [r2, #0x0]                  /* FLASH_CR0 */
  45 busy:
  46         ldr             r4, [r2, #0x0]                  /* FLASH_CR0 */
  47         tst             r4, r5
  48         bne             busy
  49         ldr             r4, [r2, #0x14]                 /* FLASH_ER */
  50         tst             r4, #0xff                               /* do we have errors */
  51         tsteq   r4, #0x100                      /* write protection set */
  52         bne             exit
  53         add             r1, r1, #0x8                    /* next 8 bytes */
  54         subs    r3, r3, #1                              /* decrement dword count */
  55         bne             write
  56 exit:
  57         b               exit
  58
  59         .end