1 /***************************************************************************
2 * Copyright (C) 2019 by Andreas Bolsch *
3 * andreas.bolsch@mni.thm.de *
5 * This program is free software; you can redistribute it and/or modify *
6 * it under the terms of the GNU General Public License as published by *
7 * the Free Software Foundation; either version 2 of the License, or *
8 * (at your option) any later version. *
10 * This program is distributed in the hope that it will be useful, *
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
13 * GNU General Public License for more details. *
15 * You should have received a copy of the GNU General Public License *
16 * along with this program. If not, see <http://www.gnu.org/licenses/>. *
17 ***************************************************************************/
26 * r0 - total count (bytes), crc32 (out)
27 * r1 - flash page size
28 * r2 - address offset into flash
29 * r3 - OCTOSPI io_base
33 * r5 - address of OCTOSPI_DR
34 * r6 - address of OCTOSPI_CCR
38 #include "../../../../src/flash/nor/stmqspi.h"
40 #define OCTOSPI_CCR_CCR (OCTOSPI_CCR - OCTOSPI_CCR)
41 #define OCTOSPI_TCR_CCR (OCTOSPI_TCR - OCTOSPI_CCR)
42 #define OCTOSPI_IR_CCR (OCTOSPI_IR - OCTOSPI_CCR)
45 movs r5, #(1<<SPI_ABORT) /* abort bit mask */
46 ldr r7, [r3, #OCTOSPI_CR] /* get OCTOSPI CR register */
47 orrs r7, r7, r5 /* set abort bit */
48 str r7, [r3, #OCTOSPI_CR] /* store new CR register */
53 ldr r7, [r3, #OCTOSPI_SR] /* load status */
54 lsrs r7, r7, #(SPI_BUSY+1) /* shift BUSY into C */
55 bcs 0b /* loop until BUSY cleared */
56 movs r7, #(1<<SPI_TCF) /* TCF bitmask */
57 str r7, [r3, #OCTOSPI_FCR] /* clear TCF flag */
61 subs r0, r0, #1 /* decrement count for DLR */
62 subs r1, r1, #1 /* page size mask and for DLR */
63 movs r4, #0x00 /* initialize crc */
64 mvns r4, r4 /* to 0xFFFFFFFF */
66 octospi_abort /* start in clean state */
67 movs r5, #OCTOSPI_DR /* load OCTOSPI_DR address offset */
68 adds r5, r5, r3 /* address of OCTOSPI_DR */
69 movs r6, #OCTOSPI_CCR-OCTOSPI_DR /* load OCTOSPI_CCR address offset */
70 adds r6, r6, r5 /* address of OCTOSPI_CCR */
72 ldr r7, cr_page_read /* indirect read mode */
73 str r7, [r3, #OCTOSPI_CR] /* set mode */
74 mov r7, r2 /* get current start address */
75 orrs r7, r7, r1 /* end of current page */
76 subs r7, r7, r2 /* count-1 to end of page */
77 cmp r7, r0 /* if this count <= remaining */
78 bls write_dlr /* then read to end of page */
79 mov r7, r0 /* else read all remaining */
81 str r7, [r3, #OCTOSPI_DLR] /* size-1 in DLR register */
82 ldr r7, ccr_page_read /* CCR for read */
83 str r7, [r6, #OCTOSPI_CCR_CCR] /* initiate transfer */
84 ldr r7, tcr_page_read /* TCR for read */
85 str r7, [r6, #OCTOSPI_TCR_CCR] /* instruction */
86 ldr r7, ir_page_read /* IR for read */
87 str r7, [r6, #OCTOSPI_IR_CCR] /* instruction */
88 str r2, [r3, #OCTOSPI_AR] /* store SPI start address */
89 ldr r6, =0x04C11DB7 /* CRC32 polynomial */
91 ldrb r7, [r5] /* read next byte from DR */
92 lsls r7, r7, #24 /* shift into msb */
94 .rept 8 /* unrolled bit loop */
95 asrs r7, r4, #31 /* copy bit 31 into bits 0 to 31 */
96 ands r7, r7, r6 /* r7 neg. -> CRC32XOR, pos. -> 0x0 */
97 lsls r4, r4, #1 /* shift result */
98 eors r4, r4, r7 /* eor by CRC32XOR or 0x0 */
100 adds r2, r2, #1 /* increment address */
101 subs r0, r0, #1 /* decrement (count-1) */
102 bmi exit /* stop if no data left */
103 tst r2, r1 /* page end ? */
104 bne read_loop /* if not, then next byte */
106 bal start_read /* then next page */
110 mvns r0, r4 /* invert to get final result */
111 octospi_abort /* to idle state */
112 .align 2 /* align to word, bkpt is 4 words */
113 bkpt #0 /* before code end for exit_point */
114 .align 2 /* align to word */
117 .space 4 /* OCTOSPI_CR value for read command */
119 .space 4 /* OCTOSPI_CCR value for read command */
121 .space 4 /* OCTOSPI_TCR value for read command */
123 .space 4 /* OCTOSPI_IR value for read command */