1 /***************************************************************************
2 * Copyright (C) 2010 by Spencer Oliver *
3 * spen@spen-soft.co.uk *
5 * Copyright (C) 2011 Øyvind Harboe *
6 * oyvind.harboe@zylin.com *
8 * Copyright (C) 2015 Uwe Bonnes *
9 * bon@elektron.ikp.physik.tu-darmstadt.de *
11 * This program is free software; you can redistribute it and/or modify *
12 * it under the terms of the GNU General Public License as published by *
13 * the Free Software Foundation; either version 2 of the License, or *
14 * (at your option) any later version. *
16 * This program is distributed in the hope that it will be useful, *
17 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
19 * GNU General Public License for more details. *
21 * You should have received a copy of the GNU General Public License *
22 * along with this program; if not, write to the *
23 * Free Software Foundation, Inc. *
24 ***************************************************************************/
33 * arm-none-eabi-gcc -c stm32l4x.S
36 * arm-none-eabi-objdump -o stm32l4x.o
38 * To generate binary file:
39 * arm-none-eabi-objcopy -O binary stm32l4x.o stm32l4_flash_write_code.bin
41 * To generate include file:
42 * xxd -i stm32l4_flash_write_code.bin
47 * r0 = workarea start, status (out)
50 * r3 = count (64bit words)
55 * r6/7 - temp (64-bit)
59 #define STM32_FLASH_CR_OFFSET 0x14 /* offset of CR register in FLASH struct */
60 #define STM32_FLASH_SR_OFFSET 0x10 /* offset of SR register in FLASH struct */
63 ldr r8, [r0, #0] /* read wp */
64 cmp r8, #0 /* abort if wp == 0 */
66 ldr r5, [r0, #4] /* read rp */
67 subs r6, r8, r5 /* number of bytes available for read in r6*/
68 cmp r6, #7 /* wait until 8 bytes are available */
72 str r6, [r4, #STM32_FLASH_CR_OFFSET]
73 ldrd r6, [r5], #0x08 /* read one word from src, increment ptr */
74 strd r6, [r2], #0x08 /* write one word to dst, increment ptr */
77 ldr r6, [r4, #STM32_FLASH_SR_OFFSET]
78 tst r6, #0x10000 /* BSY (bit16) == 1 => operation in progress */
79 bne busy /* wait more... */
80 tst r6, #0xfa /* PGSERR | PGPERR | PGAERR | WRPERR | PROGERR*/
81 bne error /* fail... */
83 cmp r5, r1 /* wrap rp at end of buffer */
85 addcs r5, r0, #8 /* skip loader args */
86 str r5, [r0, #4] /* store rp */
87 subs r3, r3, #1 /* decrement dword count */
88 cbz r3, exit /* loop if not done */
92 str r1, [r0, #4] /* set rp = 0 on error */
94 mov r0, r6 /* return status in r0 */
97 STM32_PROG: .word 0x1 /* PG */