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36 MAIN_FLASH (RX) : ORIGIN = 0x00000000, LENGTH = 0x00200000
37 INFO_FLASH (RX) : ORIGIN = 0x00200000, LENGTH = 0x00008000
38 SRAM_CODE_0(RWX): ORIGIN = 0x01000000, LENGTH = 0x00000110
39 SRAM_CODE_1(RWX): ORIGIN = 0x01000110, LENGTH = 0x00000030
40 SRAM_CODE_2(RWX): ORIGIN = 0x01000150, LENGTH = 0x00000040
41 SRAM_CODE_3(RWX): ORIGIN = 0x01000190, LENGTH = 0x00001E70
42 SRAM_CODE_4(RWX): ORIGIN = 0x01002000, LENGTH = 0x00000200
43 SRAM_DATA (RW) : ORIGIN = 0x20002000, LENGTH = 0x00001000
46 REGION_ALIAS("REGION_INTVECT", SRAM_CODE_0);
47 REGION_ALIAS("REGION_RESET", SRAM_CODE_1);
48 REGION_ALIAS("REGION_DESCRIPTOR", SRAM_CODE_2);
49 REGION_ALIAS("REGION_TEXT", SRAM_CODE_3);
50 REGION_ALIAS("REGION_BSS", SRAM_CODE_3);
51 REGION_ALIAS("REGION_DATA", SRAM_DATA);
52 REGION_ALIAS("REGION_STACK", SRAM_CODE_4);
53 REGION_ALIAS("REGION_HEAP", SRAM_DATA);
54 REGION_ALIAS("REGION_ARM_EXIDX", SRAM_CODE_3);
55 REGION_ALIAS("REGION_ARM_EXTAB", SRAM_CODE_3);
58 /* section for the interrupt vector area */
63 PROVIDE (_vtable_base_address =
64 DEFINED(_vtable_base_address) ? _vtable_base_address : 0x20000000);
66 .vtable (_vtable_base_address) : AT (_vtable_base_address) {
72 . = ORIGIN(REGION_DESCRIPTOR) + LENGTH(REGION_DESCRIPTOR) - 1;
79 } > REGION_RESET AT> REGION_RESET
90 __init_array_start = .;
91 KEEP (*(.init_array*))
95 } > REGION_TEXT AT> REGION_TEXT
100 } > REGION_TEXT AT> REGION_TEXT
104 *(.ARM.exidx* .gnu.linkonce.armexidx.*)
106 } > REGION_ARM_EXIDX AT> REGION_ARM_EXIDX
109 KEEP (*(.ARM.extab* .gnu.linkonce.armextab.*))
110 } > REGION_ARM_EXTAB AT> REGION_ARM_EXTAB
115 __data_load__ = LOADADDR (.data);
121 } > REGION_DATA AT> REGION_TEXT
131 } > REGION_BSS AT> REGION_BSS
135 end = __heap_start__;
140 __HeapLimit = __heap_end__;
141 } > REGION_HEAP AT> REGION_HEAP
143 .stack (NOLOAD) : ALIGN(0x8) {
146 } > REGION_STACK AT> REGION_STACK
148 __stack_top = ORIGIN(REGION_STACK) + LENGTH(REGION_STACK);
149 PROVIDE(__stack = __stack_top);