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   1 /***************************************************************************
   2  *   Copyright (C) 2015 by Bogdan Kolbov                                   *
   3  *   kolbov@niiet.ru                                                       *
   4  *                                                                         *
   5  *   This program is free software; you can redistribute it and/or modify  *
   6  *   it under the terms of the GNU General Public License as published by  *
   7  *   the Free Software Foundation; either version 2 of the License, or     *
   8  *   (at your option) any later version.                                   *
   9  *                                                                         *
  10  *   This program is distributed in the hope that it will be useful,       *
  11  *   but WITHOUT ANY WARRANTY; without even the implied warranty of        *
  12  *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the         *
  13  *   GNU General Public License for more details.                          *
  14  *                                                                         *
  15  *   You should have received a copy of the GNU General Public License     *
  16  *   along with this program; if not, write to the                         *
  17  *   Free Software Foundation, Inc.                                        *
  18  ***************************************************************************/
  19
  20         .text
  21         .syntax unified
  22         .cpu cortex-m4
  23         .thumb
  24         .thumb_func
  25
  26 /* K1921VK01T has 128-bitwidth flash, so it`s able to load 4x32-bit words at the time.
  27  * And only after all words loaded we can start write
  28  */
  29
  30 /* Registers addresses */
  31 #define FLASH_FMA       0x00            /* Address reg */
  32 #define FLASH_FMD1      0x04            /* Data1 reg */
  33 #define FLASH_FMC       0x08            /* Command reg */
  34 #define FLASH_FCIS      0x0C            /* Operation Status reg */
  35 #define FLASH_FCIC      0x14            /* Operation Status Clear reg */
  36 #define FLASH_FMD2      0x50            /* Data2 reg */
  37 #define FLASH_FMD3      0x54            /* Data3 reg */
  38 #define FLASH_FMD4      0x58            /* Data4 reg*/
  39
  40         /* Params:
  41          * r0 - write cmd (in), status (out)
  42          * r1 - count
  43          * r2 - workarea start
  44          * r3 - workarea end
  45          * r4 - target address
  46          * Clobbered:
  47          * r5 - rp
  48          * r6 - wp, tmp
  49          * r7 - flash base
  50          */
  51
  52 ldr     r7, =#0xA001C000  /* Flash reg base*/
  53
  54 wait_fifo:
  55         ldr             r6, [r2, #0]    /* read wp */
  56         cmp             r6, #0                  /* abort if wp == 0 */
  57         beq             exit
  58         ldr             r5, [r2, #4]    /* read rp */
  59         cmp             r5, r6                  /* wait until rp != wp */
  60         beq             wait_fifo
  61
  62
  63 load_data:
  64         ldr r6, [r5]                    /* read data1 */
  65         str r6, [r7, #FLASH_FMD1]
  66         adds    r5, #4
  67
  68         ldr r6, [r5]                    /* read data2 */
  69         str r6, [r7, #FLASH_FMD2]
  70         adds    r5, #4
  71
  72         ldr r6, [r5]                    /* read data3 */
  73         str r6, [r7, #FLASH_FMD3]
  74         adds    r5, #4
  75
  76         ldr r6, [r5]                    /* read data4 */
  77         str r6, [r7, #FLASH_FMD4]
  78         adds    r5, #4
  79
  80 start_write:
  81         str r4, [r7, #FLASH_FMA]                /* set addr */
  82         adds    r4, #16
  83         str r0, [r7, #FLASH_FMC]                /* write cmd */
  84
  85 busy:
  86         ldr             r6, [r7, #FLASH_FCIS]   /* wait until flag set */
  87         cmp             r6, #0x0
  88         beq             busy
  89
  90         cmp             r6, #2                  /* check the error bit */
  91         beq             error
  92
  93         movs    r6, #1                  /* clear flags */
  94         str r6, [r7, #FLASH_FCIC]
  95
  96         cmp     r5, r3                  /* wrap rp at end of buffer */
  97         bcc     no_wrap
  98         mov     r5, r2
  99         adds    r5, #8
 100 no_wrap:
 101         str     r5, [r2, #4]    /* store rp */
 102         subs    r1, r1, #1              /* decrement 16-byte block count */
 103         cmp     r1, #0
 104         beq     exit            /* loop if not done */
 105         b       wait_fifo
 106
 107 error:
 108         movs    r0, #0
 109         str             r0, [r2, #4]    /* set rp = 0 on error */
 110 exit:
 111         mov             r0, r6                  /* return status in r0 */
 112         bkpt    #0