1 // SPDX-License-Identifier: GPL-2.0-or-later
3 /***************************************************************************
4 * Copyright (C) 2007 by Pavel Chromy *
6 ***************************************************************************/
10 unsigned int flash_page_count = 1024;
11 unsigned int flash_page_size = 256;
13 /* pages per lock bit */
14 unsigned int flash_lock_pages = 1024/16;
17 /* detect chip and set loader parameters */
22 nvpsiz = (inr(DBGU_CIDR) >> 8)&0xf;
27 flash_page_count = 256;
28 flash_page_size = 128;
29 flash_lock_pages = 256/8;
33 flash_page_count = 512;
34 flash_page_size = 128;
35 flash_lock_pages = 512/16;
39 flash_page_count = 512;
40 flash_page_size = 256;
41 flash_lock_pages = 512/8;
45 flash_page_count = 1024;
46 flash_page_size = 256;
47 flash_lock_pages = 1024/16;
51 flash_page_count = 2048;
52 flash_page_size = 256;
53 flash_lock_pages = 2048/32;
56 return FLASH_STAT_INITE;
62 /* program single flash page */
63 int flash_page_program(uint32 *data, int page_num)
71 /* select proper controller */
72 if (page_num >= 1024) efc_ofs = 0x10;
75 /* wait until FLASH is ready, just for sure */
76 while ((inr(MC_FSR + efc_ofs)&MC_FRDY) == 0);
78 /* calculate page address, only lower 8 bits are used to address the latch,
79 but the upper part of address is needed for writing to proper EFC */
80 flash_ptr = (uint32 *)(FLASH_AREA_ADDR + (page_num*flash_page_size));
83 /* copy data to latch */
84 for (i = flash_page_size/4; i; i--) {
85 /* we do not use memcpy to be sure that only 32 bit access is used */
86 *(flash_ptr++)=*(data_ptr++);
89 /* page number and page write command to FCR */
90 outr(MC_FCR + efc_ofs, ((page_num&0x3ff) << 8) | MC_KEY | MC_FCMD_WP);
92 /* wait until it's done */
93 while ((inr(MC_FSR + efc_ofs)&MC_FRDY) == 0);
95 /* check for errors */
96 if ((inr(MC_FSR + efc_ofs)&MC_PROGE)) return FLASH_STAT_PROGE;
97 if ((inr(MC_FSR + efc_ofs)&MC_LOCKE)) return FLASH_STAT_LOCKE;
100 /* verify written data */
101 flash_ptr = (uint32 *)(FLASH_AREA_ADDR + (page_num*flash_page_size));
104 for (i = flash_page_size/4; i; i--) {
105 if (*(flash_ptr++)!=*(data_ptr++)) return FLASH_STAT_VERIFE;
109 return FLASH_STAT_OK;
113 int flash_erase_plane(int efc_ofs)
115 unsigned int lockbits;
119 lockbits = inr(MC_FSR + efc_ofs) >> 16;
123 /* wait until FLASH is ready, just for sure */
124 while ((inr(MC_FSR + efc_ofs)&MC_FRDY) == 0);
126 outr(MC_FCR + efc_ofs, ((page_num&0x3ff) << 8) | 0x5a000004);
128 /* wait until it's done */
129 while ((inr(MC_FSR + efc_ofs)&MC_FRDY) == 0);
131 /* check for errors */
132 if ((inr(MC_FSR + efc_ofs)&MC_PROGE)) return FLASH_STAT_PROGE;
133 if ((inr(MC_FSR + efc_ofs)&MC_LOCKE)) return FLASH_STAT_LOCKE;
136 if ((page_num += flash_lock_pages) > flash_page_count) break;
140 /* wait until FLASH is ready, just for sure */
141 while ((inr(MC_FSR + efc_ofs)&MC_FRDY) == 0);
143 /* erase all command to FCR */
144 outr(MC_FCR + efc_ofs, 0x5a000008);
146 /* wait until it's done */
147 while ((inr(MC_FSR + efc_ofs)&MC_FRDY) == 0);
149 /* check for errors */
150 if ((inr(MC_FSR + efc_ofs)&MC_PROGE)) return FLASH_STAT_PROGE;
151 if ((inr(MC_FSR + efc_ofs)&MC_LOCKE)) return FLASH_STAT_LOCKE;
153 /* set no erase before programming */
154 outr(MC_FMR + efc_ofs, inr(MC_FMR + efc_ofs) | 0x80);
156 return FLASH_STAT_OK;
160 /* erase whole chip */
161 int flash_erase_all(void)
165 if ((result = flash_erase_plane(0)) != FLASH_STAT_OK) return result;
167 /* the second flash controller, if any */
168 if (flash_page_count > 1024) result = flash_erase_plane(0x10);
174 int flash_verify(uint32 adr, unsigned int len, uint8 *src)
176 unsigned char *flash_ptr;
178 flash_ptr = (uint8 *)FLASH_AREA_ADDR + adr;
180 if (*(flash_ptr++)!=*(src++)) return FLASH_STAT_VERIFE;
182 return FLASH_STAT_OK;