1 /***************************************************************************
2 * Copyright (C) 2008 by Dominic Rath *
3 * Dominic.Rath@gmx.de *
4 * Copyright (C) 2008 by Spencer Oliver *
5 * spen@spen-soft.co.uk *
7 * This program is free software; you can redistribute it and/or modify *
8 * it under the terms of the GNU General Public License as published by *
9 * the Free Software Foundation; either version 2 of the License, or *
10 * (at your option) any later version. *
12 * This program is distributed in the hope that it will be useful, *
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of *
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the *
15 * GNU General Public License for more details. *
17 * You should have received a copy of the GNU General Public License *
18 * along with this program; if not, write to the *
19 * Free Software Foundation, Inc., *
20 * 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. *
21 ***************************************************************************/
23 #include "dcc_stdio.h"
25 #if defined(__ARM_ARCH_7M__)
27 /* we use the cortex_m3 DCRDR reg to simulate a arm7_9 dcc channel
28 * DCRDR[7:0] is used by target for status
29 * DCRDR[15:8] is used by target for write buffer
30 * DCRDR[23:16] is used for by host for status
31 * DCRDR[31:24] is used for by host for write buffer */
33 #define DCRDR_WRSTS *((volatile u8*)0xE000EDF8)
34 #define DCRDR_WRDAT *((volatile u8*)0xE000EDF9)
38 void dbg_write(u32 dcc_data)
44 /* wait for data ready */
45 while (DCRDR_WRSTS & BUSY);
48 DCRDR_WRDAT = (u8)(dcc_data & 0xff);
49 /* set write flag - tell host there is data */
55 #elif defined(__ARM_ARCH_4T__) || defined(__ARM_ARCH_5TE__)
57 void dbg_write(u32 dcc_data)
62 asm volatile("mrc p14, 0, %0, c0, c0" : "=r" (dcc_status));
63 } while (dcc_status & 0x2);
65 asm volatile("mcr p14, 0, %0, c1, c0" : : "r" (dcc_data));
69 #error unsupported target
73 void dbg_write_u32(u32 *val, u32 len)
75 dbg_write(0x01 | 0x0400 | ((len & 0xffff) << 16));
86 void dbg_write_u16(u16 *val, u32 len)
90 dbg_write(0x01 | 0x0200 | ((len & 0xffff) << 16));
94 dcc_data = val[0] | (val[1] << 8)
95 | ((len > 1) ? (val[2] | (val[3] << 8)) << 16 : 0x00);
104 void dbg_write_u8(u8 *val, u32 len)
108 dbg_write(0x01 | 0x0100 | ((len & 0xffff) << 16));
113 | ((len > 1) ? val[1] << 8 : 0x00)
114 | ((len > 2) ? val[2] << 16 : 0x00)
115 | ((len > 3) ? val[3] << 24 : 0x00);
124 void dbg_write_str(u8 *msg)
129 for (len = 0; msg[len] && (len < 65536); len++);
131 dbg_write(0x01 | ((len & 0xffff) << 16));
136 | ((len > 1) ? msg[1] << 8 : 0x00)
137 | ((len > 2) ? msg[2] << 16 : 0x00)
138 | ((len > 3) ? msg[3] << 24 : 0x00);
146 void dbg_write_char(u8 msg)
148 dbg_write(0x02 | ((msg & 0xff) << 16));