4 * (C) Copyright 1989-1995
13 * Extensions: P. Felber
21 char imtab[3] = { 0x46, 0x56, 0x5E };
27 * Process a machine op.
33 register int op, t1, t2;
42 if (!hd64 && rf>X_HD64)
60 if ((v1 = admode(CND)) != 0) {
75 if ((v1 = admode(R16)) != 0 && (v1 &= 0xFF) != SP) {
76 if (v1 != gixiy(v1)) {
103 outab(imtab[e1.e_addr]);
118 if (genop(0xCB, op, &e2, 0) || t1)
126 if ((t2 != S_R8) || (e2.e_addr != A))
131 if (genop(0xCB, op, &e2, 0) || t1)
140 if ((t2 != S_R8) || (e2.e_addr != A))
145 if (genop(0, op, &e2, 1) || t1)
159 if (genop(0, op, &e1, 1))
163 if ((t1 == S_R8) && (e1.e_addr == A)) {
164 if (genop(0, op, &e2, 1))
168 if ((t1 == S_R16) && (t2 == S_R16)) {
178 if ((v1 == HL) && (v2 <= SP)) {
188 if ((v1 == IX) && (v2 != HL) && (v2 != IY)) {
195 if ((v1 == IY) && (v2 != HL) && (v2 != IX)) {
206 if ((v1 == HL) && (v2 <= SP) && (rf == S_ADD)) {
207 outab(0x09 | (v2<<4));
214 if ((rf == S_ADD) && (t1 == S_R16) && (e1.e_addr == SP) && (t2 == S_IMMED)) {
228 v1 = op | e1.e_addr<<3;
229 if (genop(0, v1, &e2, 0) == 0)
232 outab(e1.e_addr<<3 | 0x06);
239 if ((t1 == S_R16) && (t2 == S_IMMED)) {
246 if ((t1 == S_R16) && (t2 == S_INDM)) {
247 if (gixiy(v1) == HL) {
256 if ((t1 == S_INDM) && (t2 == S_R16)) {
257 if (gixiy(v2) == HL) {
266 if ((t1 == S_R8) && (v1 == A) && (t2 == S_INDM)) {
271 if ((t1 == S_INDM) && (t2 == S_R8) && (v2 == A)) {
277 if ((t2 == S_R8) && (gixiy(t1) == S_IDHL)) {
283 if ((t2 == S_IMMED) && (gixiy(t1) == S_IDHL)) {
291 if ((t1 == S_R8X) && (t2 == S_R8) && (v2 == A)) {
296 if ((t1 == S_R8) && (v1 == A) && (t2 == S_R8X)) {
302 if ((t1 == S_R16) && (v1 == SP)) {
303 if ((t2 == S_R16) && (gixiy(v2) == HL)) {
308 if ((t1 == S_R8) && (v1 == A)) {
309 if ((t2 == S_IDBC) || (t2 == S_IDDE)) {
310 outab(0x0A | (t2-S_INDR)<<4);
314 if ((t2 == S_R8) && (v2 == A)) {
315 if ((t1 == S_IDBC) || (t1 == S_IDDE)) {
316 outab(0x02 | (t1-S_INDR)<<4);
324 if ((t1 == S_INDM) && (t2 == S_R16) && (v2 == SP)) {
333 if ((t1 == S_INDM) && (t2 == S_R8) && (v2 == A)) {
338 if ((t2 == S_INDM) && (t1 == S_R8) && (v1 == A)) {
347 if ((t1 == S_R8) && (v1 == A) && (t2 == S_IDHLD)) {
351 if ((t2 == S_R8) && (v2 == A) && (t1 == S_IDHLD)) {
359 if ((t1 == S_R8) && (v1 == A) && (t2 == S_IDHLI)) {
363 if ((t2 == S_R8) && (v2 == A) && (t1 == S_IDHLI)) {
373 case S_STOP: /* 0x10 */
382 case S_LDH: /* 0xE0 */
384 * 0xE0 : LDH (n),A = LD ($FF00+n),A
385 * 0xE2 : LDH (C),A = LD ($FF00+C),A
386 * 0xF0 : LDH A,(n) = LD A,($FF00+n)
387 * 0xF2 : LDH A,(C) = LD A,($FF00+C)
392 if ((t1 == S_INDM) && (t2 == S_R8) && (e2.e_addr == A)) {
397 if ((t1 == S_IDC) && (t2 == S_R8) && (e2.e_addr == A)) {
401 if ((t2 == S_INDM) && (t1 == S_R8) && (e1.e_addr == A)) {
406 if ((t2 == S_IDC) && (t1 == S_R8) && (e1.e_addr == A)) {
414 case S_LDA: /* 0xE8 */
416 * 0xE8 : LDA SP,#n(SP)
417 * 0xF8 : LDA HL,#n(SP)
422 if ((t1 == S_R16) && (e1.e_addr == SP) && (t2 == S_INDR+SP)) {
427 if ((t1 == S_R16) && (e1.e_addr == HL) && (t2 == S_INDR+SP)) {
436 case S_LDHL: /* 0xF8 */
443 if ((t1 == S_R16) && (e1.e_addr == SP) && (t2 == S_IMMED)) {
461 if ((t1 == S_IDSP) && (v1 == 0)) {
462 if (gixiy(v2) == HL) {
468 if ((v1 == DE) && (v2 == HL)) {
474 if ((t1 == S_R16X) && (t2 == S_R16X)) {
495 if ((v1 == A) && (t2 == S_INDM)) {
502 outab(((rf == S_IN) ? 0x40 : 0x41) + (v1<<3));
522 if (t1 != gixiy(t1)) {
544 if ((v1 = admode(CND)) != 0 && rf != S_DJNZ) {
547 if ((v1 = admode(CND)) != 0) {
549 if ((v1 &= 0xFF) <= 0x18) {
558 if (e2.e_base.e_ap == NULL || e2.e_base.e_ap == dot.s_area) {
559 v2 = e2.e_addr - dot.s_addr - 1;
560 if (pass == 2 && ((v2 < -128) || (v2 > 127)))
566 if (e2.e_mode != S_USER)
571 if ((v1 = admode(CND)) != 0) {
583 if ((v1 = admode(CND)) != 0) {
597 if ((e1.e_addr == 0) && (gixiy(t1) == S_IDHL)) {
625 if ((t1 == S_R8) && (t2 == S_INDM)) {
627 outab(op | e1.e_addr<<3);
636 if ((t1 == S_R16) && ((v1 = e1.e_addr) <= SP)) {
648 outab(op | e1.e_addr<<3);
683 * general addressing evaluation
684 * return(0) if general addressing mode output, else
685 * return(esp->e_mode)
688 genop(pop, op, esp, f)
689 register int pop, op;
690 register struct expr *esp;
694 if ((t1 = esp->e_mode) == S_R8) {
697 outab(op|esp->e_addr);
706 if (gixiy(t1) == S_IDHL) {
717 if ((t1 == S_IMMED) && (f)) {
728 * IX and IY prebyte check
738 } else if (v == IY) {
741 } else if (v == S_IDIX) {
744 } else if (v == S_IDIY) {
753 * The next character must be a
765 * Machine dependent initialization