3 <TITLE>ASxxxx Cross Assembler Documentation</TITLE>
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10 <H2>ASxxxx Cross Assembler Documentation</H2>
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22 ASLINK Relocating Linker
42 The ASxxxx assemblers were written following the style of
43 several cross assemblers found in the Digital Equipment Corpora-
44 tion Users Society (DECUS) distribution of the C programming
45 language. The DECUS code was provided with no documentation as
46 to the input syntax or the output format. Study of the code
47 revealed that the unknown author of the code had attempted to
48 formulate an assembler with attributes similiar to those of the
49 PDP-11 MACRO assembler (without macro's). The incomplete code
50 from the DECUS C distribution has been largely rewritten, only
51 the program structure, and C source file organization remains
52 relatively unchanged. However, I wish to thank the author for
53 his contribution to this set of assemblers.
55 The ASLINK program was written as a companion to the ASxxxx
56 assemblers, its design and implementation was not derived from
59 The ASxxxx assemblers and the ASLINK relocating linker are
60 placed in the Public Domain. Publication or distribution of
61 these programs for non-commercial use is hereby granted with the
62 stipulation that the copyright notice be included with all
65 I would greatly appreciate receiving the details of any
66 changes, additions, or errors pertaining to these programs and
67 will attempt to incorporate any fixes or generally useful
68 changes in a future update to these programs.
79 http://shop-pdp.kent.edu/ashtml/asxxxx.htm
81 baldwin@shop-pdp.kent.edu
95 C O N T R I B U T O R S
100 Thanks to Marko Makela for his contribution of the AS6500
107 Internet: Marko.Makela@Helsinki.Fi
108 EARN/BitNet: msmakela@finuh
114 Thanks to John Hartman for his contribution of the AS8051
115 cross assembler and updates to the ASxxxx and ASLINK internals.
118 jhartman@compuserve.com
119 http://ourworld.compuserve.com/homepages/jhartman/
125 Thanks to G. Osborn for his contributions to LKS19.C and
136 ASxxxx Cross Assemblers, Version 2.00, August 1998
138 Submitted by Alan R. Baldwin,
139 Kent State University, Kent, Ohio
141 Operating System: TSX+, RT-11, MS/DOS, PDOS
142 or other supporting K&R C.
148 The ASxxxx assemblers are a series of microprocessor assem-
149 blers written in the C programming language. This collection
150 contains cross assemblers for the 6800(6802/6808), 6801(hd6303),
151 6804, 6805, 68HC08, 6809, 68HC11, 68HC12, 68HC16, 8051,
152 8085(8080), z80(hd64180), H8/3xx, and 6500 series microproces-
153 sors. Each assembler has a device specific section which
154 includes: (1) device description, byte order, and file exten-
155 sion information, (2) a table of assembler general directives,
156 special directives, assembler mnemonics and associated operation
157 codes, (3) machine specific code for processing the device
158 mnemonics, addressing modes, and special directives.
160 The assemblers have a common device independent section which
161 handles the details of file input/output, symbol table genera-
162 tion, program/data areas, expression analysis, and assembler
163 directive processing.
165 The assemblers provide the following features: (1) alpha-
166 betized, formatted symbol table listings, (2) relocatable object
167 modules, (3) global symbols for linking object modules, (4) con-
168 ditional assembly directives, (5) reusable local symbols, and
169 (6) include-file processing.
171 The companion program ASLINK is a relocating linker perform-
172 ing the following functions: (1) bind multiple object modules
173 into a single memory image, (2) resolve inter-module symbol
174 references, (3) resolve undefined symbols from specified
175 librarys of object modules, (4) process absolute, relative, con-
176 catenated, and overlay attributes in data and program sections,
177 (5) perform byte and word program-counter relative (pc or pcr)
178 addressing calculations, (6) define absolute symbol values at
179 link time, (7) define absolute area base address values at link
180 time, (8) produce Intel Hex or Motorola S19 output file, (9)
181 produce a map of the linked memory image, and (10) update the
182 ASxxxx assembler listing files with the absolute linked ad-
185 The assemblers and linker have been tested using DECUS C
186 under TSX+ and RT-11, PDOS C V5.4b, and Symantec C/C++ V6.1/V7.2
187 under DOS/Windows 3.x/95. Complete source code and documenta-
188 tion for the assemblers and linker is included with the distri-
189 bution. Additionally, test code for each assembler and several
190 microprocessor monitors ( ASSIST05 for the 6805, MONDEB and
191 ASSIST09 for the 6809, and BUFFALO 2.5 for the 6811) are in-
192 cluded as working examples of use of these assemblers.
195 CHAPTER 1 THE ASSEMBLER 1-1
196 1.1 THE ASXXXX ASSEMBLERS 1-1
197 1.1.1 Assembly Pass 1 1-2
198 1.1.2 Assembly Pass 2 1-2
199 1.1.3 Assembly Pass 3 1-2
200 1.2 SOURCE PROGRAM FORMAT 1-3
201 1.2.1 Statement Format 1-3
202 1.2.1.1 Label Field 1-3
203 1.2.1.2 Operator Field 1-5
204 1.2.1.3 Operand Field 1-5
205 1.2.1.4 Comment Field 1-6
206 1.3 SYMBOLS AND EXPRESSIONS 1-6
207 1.3.1 Character Set 1-6
208 1.3.2 User-Defined Symbols 1-10
209 1.3.3 Local Symbols 1-11
210 1.3.4 Current Location Counter 1-12
213 1.3.7 Expressions 1-15
214 1.4 GENERAL ASSEMBLER DIRECTIVES 1-16
215 1.4.1 .module Directive 1-16
216 1.4.2 .title Directive 1-17
217 1.4.3 .sbttl Directive 1-17
218 1.4.4 .page Directive 1-17
219 1.4.5 .byte and .db Directives 1-17
220 1.4.6 .word and .dw Directives 1-18
221 1.4.7 .blkb, .blkw, and .ds Directives 1-18
222 1.4.8 .ascii Directive 1-18
223 1.4.9 .ascis Directive 1-19
224 1.4.10 .asciz Directive 1-19
225 1.4.11 .radix Directive 1-20
226 1.4.12 .even Directive 1-20
227 1.4.13 .odd Directive 1-20
228 1.4.14 .area Directive 1-21
229 1.4.15 .org Directive 1-22
230 1.4.16 .globl Directive 1-23
231 1.4.17 .if, .else, and .endif Directives 1-23
232 1.4.18 .include Directive 1-24
233 1.4.19 .setdp Directive 1-25
234 1.5 INVOKING ASXXXX 1-27
236 1.7 LISTING FILE 1-29
237 1.8 SYMBOL TABLE FILE 1-30
240 CHAPTER 2 THE LINKER 2-1
241 2.1 ASLINK RELOCATING LINKER 2-1
242 2.2 INVOKING ASLINK 2-2
243 2.3 LIBRARY PATH(S) AND FILE(S) 2-3
244 2.4 ASLINK PROCESSING 2-4
245 2.5 LINKER INPUT FORMAT 2-6
246 2.5.1 Object Module Format 2-6
247 2.5.2 Header Line 2-6
248 2.5.3 Module Line 2-7
249 2.5.4 Symbol Line 2-7
260 2.6 LINKER ERROR MESSAGES 2-9
261 2.7 INTEL HEX OUTPUT FORMAT 2-11
262 2.8 MOTORLA S1-S9 OUTPUT FORMAT 2-12
264 CHAPTER 3 BUILDING ASXXXX AND ASLINK 3-1
265 3.1 BUILDING AN ASSEMBLER 3-1
266 3.2 BUILDING ASLINK 3-2
268 APPENDIX A AS6800 ASSEMBLER A-1
269 A.1 6800 REGISTER SET A-1
270 A.2 6800 INSTRUCTION SET A-1
271 A.2.1 Inherent Instructions A-2
272 A.2.2 Branch Instructions A-2
273 A.2.3 Single Operand Instructions A-3
274 A.2.4 Double Operand Instructions A-4
275 A.2.5 Jump and Jump to Subroutine Instructions A-4
276 A.2.6 Long Register Instructions A-5
278 APPENDIX B AS6801 ASSEMBLER B-1
279 B.1 .hd6303 DIRECTIVE B-1
280 B.2 6801 REGISTER SET B-1
281 B.3 6801 INSTRUCTION SET B-1
282 B.3.1 Inherent Instructions B-2
283 B.3.2 Branch Instructions B-2
284 B.3.3 Single Operand Instructions B-3
285 B.3.4 Double Operand Instructions B-4
286 B.3.5 Jump and Jump to Subroutine Instructions B-5
287 B.3.6 Long Register Instructions B-5
288 B.3.7 6303 Specific Instructions B-5
290 APPENDIX C AS6804 ASSEMBLER C-1
291 C.1 6804 REGISTER SET C-1
292 C.2 6804 INSTRUCTION SET C-1
293 C.2.1 Inherent Instructions C-2
294 C.2.2 Branch Instructions C-2
295 C.2.3 Single Operand Instructions C-2
296 C.2.4 Jump and Jump to Subroutine Instructions C-2
297 C.2.5 Bit Test Instructions C-2
298 C.2.6 Load Immediate data Instruction C-3
299 C.2.7 6804 Derived Instructions C-3
301 APPENDIX D AS6805 ASSEMBLER D-1
302 D.1 6805 REGISTER SET D-1
303 D.2 6805 INSTRUCTION SET D-1
304 D.2.1 Control Instructions D-2
305 D.2.2 Bit Manipulation Instructions D-2
306 D.2.3 Branch Instructions D-2
307 D.2.4 Read-Modify-Write Instructions D-3
308 D.2.5 Register\Memory Instructions D-3
315 D.2.6 Jump and Jump to Subroutine Instructions D-4
317 APPENDIX E AS6808 ASSEMBLER E-1
318 E.1 68HC08 REGISTER SET E-1
319 E.2 68HC08 INSTRUCTION SET E-1
320 E.2.1 Control Instructions E-2
321 E.2.2 Bit Manipulation Instructions E-2
322 E.2.3 Branch Instructions E-3
323 E.2.4 Complex Branch Instructions E-3
324 E.2.5 Read-Modify-Write Instructions E-4
325 E.2.6 Register\Memory Instructions E-5
326 E.2.7 Double Operand Move Instruction E-5
327 E.2.8 16-Bit <H:X> Index Register Instructions E-5
328 E.2.9 Jump and Jump to Subroutine Instructions E-5
330 APPENDIX F AS6809 ASSEMBLER F-1
331 F.1 6809 REGISTER SET F-1
332 F.2 6809 INSTRUCTION SET F-1
333 F.2.1 Inherent Instructions F-3
334 F.2.2 Short Branch Instructions F-3
335 F.2.3 Long Branch Instructions F-3
336 F.2.4 Single Operand Instructions F-4
337 F.2.5 Double Operand Instructions F-5
338 F.2.6 D-register Instructions F-5
339 F.2.7 Index/Stack Register Instructions F-5
340 F.2.8 Jump and Jump to Subroutine Instructions F-6
341 F.2.9 Register - Register Instructions F-6
342 F.2.10 Condition Code Register Instructions F-6
343 F.2.11 6800 Compatibility Instructions F-6
345 APPENDIX G AS6811 ASSEMBLER G-1
346 G.1 68HC11 REGISTER SET G-1
347 G.2 68HC11 INSTRUCTION SET G-1
348 G.2.1 Inherent Instructions G-2
349 G.2.2 Branch Instructions G-2
350 G.2.3 Single Operand Instructions G-3
351 G.2.4 Double Operand Instructions G-4
352 G.2.5 Bit Manupulation Instructions G-4
353 G.2.6 Jump and Jump to Subroutine Instructions G-5
354 G.2.7 Long Register Instructions G-5
356 APPENDIX H AS6812 ASSEMBLER H-1
357 H.1 68HC12 REGISTER SET H-1
358 H.2 68HC12 INSTRUCTION SET H-1
359 H.2.1 Inherent Instructions H-3
360 H.2.2 Short Branch Instructions H-3
361 H.2.3 Long Branch Instructions H-3
362 H.2.4 Branch on Decrement, Test, or Increment H-4
363 H.2.5 Bit Clear and Set Instructions H-4
364 H.2.6 Branch on Bit Clear or Set H-4
365 H.2.7 Single Operand Instructions H-5
366 H.2.8 Double Operand Instructions H-6
373 H.2.9 Move Instructions H-6
374 H.2.10 D-register Instructions H-6
375 H.2.11 Index/Stack Register Instructions H-7
376 H.2.12 Jump and Jump/Call to Subroutine
378 H.2.13 Other Special Instructions H-7
379 H.2.14 Register - Register Instructions H-7
380 H.2.15 Condition Code Register Instructions H-7
381 H.2.16 M68HC11 Compatibility Mode Instructions H-8
383 APPENDIX I AS6816 ASSEMBLER I-1
384 I.1 68HC16 REGISTER SET I-1
385 I.2 68HC16 INSTRUCTION SET I-1
386 I.2.1 Inherent Instructions I-2
387 I.2.2 Push/Pull Multiple Register Instructions I-3
388 I.2.3 Short Branch Instructions I-3
389 I.2.4 Long Branch Instructions I-3
390 I.2.5 Bit Manipulation Instructions I-3
391 I.2.6 Single Operand Instructions I-4
392 I.2.7 Double Operand Instructions I-5
393 I.2.8 Index/Stack Register Instructions I-5
394 I.2.9 Jump and Jump to Subroutine Instructions I-6
395 I.2.10 Condition Code Register Instructions I-6
396 I.2.11 Multiply and Accumulate Instructions I-6
398 APPENDIX J ASH8 ASSEMBLER J-1
399 J.1 H8/3XX REGISTER SET J-1
400 J.2 H8/3XX INSTRUCTION SET J-1
401 J.2.1 Inherent Instructions J-2
402 J.2.2 Branch Instructions J-2
403 J.2.3 Single Operand Instructions J-3
404 J.2.4 Double Operand Instructions J-4
405 J.2.5 Mov Instructions J-5
406 J.2.6 Bit Manipulation Instructions J-6
407 J.2.7 Extended Bit Manipulation Instructions J-7
408 J.2.8 Condition Code Instructions J-7
409 J.2.9 Other Instructions J-8
410 J.2.10 Jump and Jump to Subroutine Instructions J-8
412 APPENDIX K AS8051 ASSEMBLER K-1
413 K.1 ACKNOWLEDGMENT K-1
414 K.2 8051 REGISTER SET K-1
415 K.3 8051 INSTRUCTION SET K-2
416 K.3.1 Inherent Instructions K-2
417 K.3.2 Move Instructions K-3
418 K.3.3 Single Operand Instructions K-3
419 K.3.4 Two Operand Instructions K-4
420 K.3.5 Call and Return Instructions K-4
421 K.3.6 Jump Instructions K-4
422 K.3.7 Predefined Symbols: SFR Map K-5
423 K.3.8 Predefined Symbols: SFR Bit Addresses K-6
424 K.3.9 Predefined Symbols: Control Bits K-7
431 APPENDIX L AS8085 ASSEMBLER L-1
432 L.1 8085 REGISTER SET L-1
433 L.2 8085 INSTRUCTION SET L-1
434 L.2.1 Inherent Instructions L-2
435 L.2.2 Register/Memory/Immediate Instructions L-2
436 L.2.3 Call and Return Instructions L-2
437 L.2.4 Jump Instructions L-2
438 L.2.5 Input/Output/Reset Instructions L-3
439 L.2.6 Move Instructions L-3
440 L.2.7 Other Instructions L-3
442 APPENDIX M ASZ80 ASSEMBLER M-1
443 M.1 .hd64 DIRECTIVE M-1
444 M.2 Z80 REGISTER SET AND CONDITIONS M-1
445 M.3 Z80 INSTRUCTION SET M-2
446 M.3.1 Inherent Instructions M-3
447 M.3.2 Implicit Operand Instructions M-3
448 M.3.3 Load Instruction M-4
449 M.3.4 Call/Return Instructions M-4
450 M.3.5 Jump and Jump to Subroutine Instructions M-4
451 M.3.6 Bit Manipulation Instructions M-5
452 M.3.7 Interrupt Mode and Reset Instructions M-5
453 M.3.8 Input and Output Instructions M-5
454 M.3.9 Register Pair Instructions M-5
455 M.3.10 HD64180 Specific Instructions M-6
457 APPENDIX N AS6500 ASSEMBLER N-1
458 N.1 ACKNOWLEDGMENT N-1
459 N.2 6500 REGISTER SET N-2
460 N.3 6500 INSTRUCTION SET N-2
461 N.3.1 Processor Specific Directives N-3
462 N.3.2 65xx Core Inherent Instructions N-3
463 N.3.3 65xx Core Branch Instructions N-3
464 N.3.4 65xx Core Single Operand Instructions N-3
465 N.3.5 65xx Core Double Operand Instructions N-4
466 N.3.6 65xx Core Jump and Jump to Subroutine
468 N.3.7 65xx Core Miscellaneous X and Y Register
470 N.3.8 65F11 and 65F12 Specific Instructions N-5
471 N.3.9 65C00/21 and 65C29 Specific Instructions N-5
472 N.3.10 65C02, 65C102, and 65C112 Specific
496 1.1 THE ASXXXX ASSEMBLERS
499 The ASxxxx assemblers are a series of microprocessor assem-
500 blers written in the C programming language. Each assembler has
501 a device specific section which includes:
503 1. device description, byte order, and file extension in-
506 2. a table of the assembler general directives, special
507 device directives, assembler mnemonics and associated
510 3. machine specific code for processing the device mnemon-
511 ics, addressing modes, and special directives
513 The device specific information is detailed in the appendices.
515 The assemblers have a common device independent section which
516 handles the details of file input/output, symbol table genera-
517 tion, program/data areas, expression analysis, and assembler
518 directive processing.
520 The assemblers provide the following features:
522 1. Command string control of assembly functions
524 2. Alphabetized, formatted symbol table listing
526 3. Relocatable object modules
528 4. Global symbols for linking object modules
530 5. Conditional assembly directives
534 THE ASSEMBLER PAGE 1-2
535 THE ASXXXX ASSEMBLERS
538 6. Program sectioning directives
541 ASxxxx assembles one or more source files into a single relo-
542 catable ascii object file. The output of the ASxxxx assemblers
543 consists of an ascii relocatable object file(*.rel), an assembly
544 listing file(*.lst), and a symbol file(*.sym).
547 1.1.1 Assembly Pass 1
550 During pass 1, ASxxxx opens all source files and performs a
551 rudimenatry assembly of each source statement. During this pro-
552 cess all symbol tables are built, program sections defined, and
553 number of bytes for each assembled source line is estimated.
555 At the end of pass 1 all undefined symbols may be made global
556 (external) using the ASxxxx switch -g, otherwise undefined sym-
557 bols will be flagged as errors during succeeding passes.
560 1.1.2 Assembly Pass 2
563 During pass 2 the ASxxxx assembler resolves forward refer-
564 ences and determines the number of bytes for each assembled
565 line. The number of bytes used by a particular assembler in-
566 struction may depend upon the addressing mode, whether the in-
567 struction allows multiple forms based upon the relative distance
568 to the addressed location, or other factors. Pass 2 resolves
569 these cases and determines the address of all symbols.
572 1.1.3 Assembly Pass 3
575 Pass 3 by the assembler generates the listing file, the relo-
576 catable output file, and the symbol tables. Also during pass 3
577 the errors will be reported.
579 The relocatable object file is an ascii file containing sym-
580 bol references and definitions, program area definitions, and
581 the relocatable assembled code, the linker ASLINK will use this
582 information to generate an absolute load file (Motorola or Intel
588 THE ASSEMBLER PAGE 1-3
589 SOURCE PROGRAM FORMAT
592 1.2 SOURCE PROGRAM FORMAT
596 1.2.1 Statement Format
599 A source program is composed of assembly-language statements.
600 Each statement must be completed on one line. A line may con-
601 tain a maximum of 128 characters, longer lines are truncated and
604 An ASxxxx assembler statement may have as many as four
605 fields. These fields are identified by their order within the
606 statement and/or by separating characters between fields. The
607 general format of the ASxxxx statement is:
609 [label:] Operator Operand [;Comment(s)]
611 The label and comment fields are optional. The operator and
612 operand fields are interdependent. The operator field may be an
613 assembler directive or an assembly mnemonic. The operand field
614 may be optional or required as defined in the context of the
617 ASxxxx interprets and processes source statements one at a
618 time. Each statement causes a particular operation to be per-
622 1.2.1.1 Label Field -
624 A label is a user-defined symbol which is assigned the value
625 of the current location counter and entered into the user de-
626 fined symbol table. The current location counter is used by
627 ASxxxx to assign memory addresses to the source program state-
628 ments as they are encountered during the assembly process. Thus
629 a label is a means of symbolically referring to a specific
632 When a program section is absolute, the value of the current
633 location counter is absolute; its value references an absolute
634 memory address. Similarly, when a program section is relocat-
635 able, the value of the current location counter is relocatable.
636 A relocation bias calculated at link time is added to the ap-
637 parent value of the current location counter to establish its
638 effective absolute address at execution time. (The user can
639 also force the linker to relocate sections defined as absolute.
640 This may be required under special circumstances.)
642 If present, a label must be the first field in a source
643 statement and must be terminated by a colon (:). For example,
646 THE ASSEMBLER PAGE 1-4
647 SOURCE PROGRAM FORMAT
650 if the value of the current location counter is absolute
651 01F0(H), the statement:
655 assigns the value 01F0(H) to the label abcd. If the location
656 counter value were relocatable, the final value of abcd would be
657 01F0(H)+K, where K represents the relocation bias of the program
658 section, as calculated by the linker at link time.
660 More than one label may appear within a single label field.
661 Each label so specified is assigned the same address value. For
662 example, if the value of the current location counter is
663 1FF0(H), the multiple labels in the following statement are each
664 assigned the value 1FF0(H):
668 Multiple labels may also appear on successive lines. For ex-
669 ample, the statements
675 likewise cause the same value to be assigned to all three la-
678 A double colon (::) defines the label as a global symbol.
679 For example, the statement
683 establishes the label abcd as a global symbol. The distinguish-
684 ing attribute of a global symbol is that it can be referenced
685 from within an object module other than the module in which the
686 symbol is defined. References to this label in other modules
687 are resolved when the modules are linked as a composite execut-
690 The legal characters for defining labels are:
699 A label may be any length, however only the first 79
700 characters are significant and, therefore must be unique among
701 all labels in the source program (not necessarily among
704 THE ASSEMBLER PAGE 1-5
705 SOURCE PROGRAM FORMAT
708 separately compiled modules). An error code(s) (m or p) will be
709 generated in the assembly listing if the first 79 characters in
710 two or more labels are the same. The m code is caused by the
711 redeclaration of the symbol or its reference by another state-
712 ment. The p code is generated because the symbols location is
713 changing on each pass through the source file.
715 The label must not start with the characters 0-9, as this
716 designates a local symbol with special attributes described in a
719 The label must not start with the sequence $$, as this
720 represents the temporary radix 16 for constants.
723 1.2.1.2 Operator Field -
725 The operator field specifies the action to be performed. It
726 may consist of an instruction mnemonic (op code) or an assembler
729 When the operator is an instruction mnemonic, a machine in-
730 struction is generated and the assembler evaluates the addresses
731 of the operands which follow. When the operator is a directive
732 ASxxxx performs certain control actions or processing operations
733 during assembly of the source program.
735 Leading and trailing spaces or tabs in the operator field
736 have no significance; such characters serve only to separate
737 the operator field from the preceeding and following fields.
739 An operator is terminated by a space, tab or end of line.
742 1.2.1.3 Operand Field -
744 When the operator is an instruction mnemonic (op code), the
745 operand field contains program variables that are to be
746 evaluated/manipulated by the operator.
748 Operands may be expressions or symbols, depending on the
749 operator. Multiple expressions used in the operand fields may
750 be separated by a comma. An operand should be preceeded by an
751 operator field; if it is not, the statement will give an error
752 (q or o). All operands following instruction mnemonics are
753 treated as expressions.
755 The operand field is terminated by a semicolon when the field
756 is followed by a comment. For example, in the following
759 label: lda abcd,x ;Comment field
762 THE ASSEMBLER PAGE 1-6
763 SOURCE PROGRAM FORMAT
767 the tab between lda and abcd terminates the operator field and
768 defines the beginning of the operand field; a comma separates
769 the operands abcd and x; and a semicolon terminates the operand
770 field and defines the beginning of the comment field. When no
771 comment field follows, the operand field is terminated by the
772 end of the source line.
775 1.2.1.4 Comment Field -
777 The comment field begins with a semicolon and extends through
778 the end of the line. This field is optional and may contain any
779 7-bit ascii character except null.
781 Comments do not affect assembly processing or program execu-
785 1.3 SYMBOLS AND EXPRESSIONS
788 This section describes the generic components of the ASxxxx
789 assemblers: the character set, the conventions observed in con-
790 structing symbols, and the use of numbers, operators, and ex-
797 The following characters are legal in ASxxxx source programs:
799 1. The letters A through Z. Both upper- and lower-case
800 letters are acceptable. The assemblers, by default,
801 are not case sensitive, i.e. ABCD and abcd are the
802 same symbols. (The assemblers can be made case sensi-
803 tive by using the -z command line option.)
805 2. The digits 0 through 9
807 3. The characters . (period), $ (dollar sign), and _ (un-
810 4. The special characters listed in Tables 1 through 6.
813 Tables 1 through 6 describe the various ASxxxx label and
814 field terminators, assignment operators, operand separators, as-
815 sembly, unary, binary, and radix operators.
818 THE ASSEMBLER PAGE 1-7
819 SYMBOLS AND EXPRESSIONS
822 Table 1 Label Terminators and Assignment Operators
823 ----------------------------------------------------------------
825 : Colon Label terminator.
827 :: Double colon Label Terminator; defines the
828 label as a global label.
830 = Equal sign Direct assignment operator.
832 == Double equal Direct assignment operator;
833 sign defines the symbol as a global
836 ----------------------------------------------------------------
842 Table 2 Field Terminators and Operand Separators
843 ----------------------------------------------------------------
845 Tab Item or field terminator.
847 Space Item or field terminator.
849 , Comma Operand field separator.
851 ; Semicolon Comment field indicator.
853 ----------------------------------------------------------------
859 Table 3 Assembler Operators
860 ----------------------------------------------------------------
862 # Number sign Immediate expression indicator.
864 . Period Current location counter.
866 ( Left parenthesis Expression delimiter.
868 ) Right parenthesis Expression delimeter.
870 ----------------------------------------------------------------
873 THE ASSEMBLER PAGE 1-8
874 SYMBOLS AND EXPRESSIONS
882 Table 4 Unary Operators
883 ----------------------------------------------------------------
885 < Left bracket <FEDC Produces the lower byte
886 value of the expression.
889 > Right bracket >FEDC Produces the upper byte
890 value of the expression.
893 + Plus sign +A Positive value of A
895 - Minus sign -A Produces the negative
896 (2's complement) of A.
898 ~ Tilde ~A Produces the 1's comple-
901 ' Single quote 'D Produces the value of
904 " Double quote "AB Produces the double byte
907 \ Backslash '\n Unix style characters
909 or '\001 or octal byte values.
911 ----------------------------------------------------------------
919 THE ASSEMBLER PAGE 1-9
920 SYMBOLS AND EXPRESSIONS
923 Table 5 Binary Operators
924 ----------------------------------------------------------------
926 << Double 0800 << 4 Produces the 4 bit
927 Left bracket left-shifted value of
930 >> Double 0800 >> 4 Produces the 4 bit
931 Right bracket right-shifted value of
934 + Plus sign A + B Arithmetic Addition
937 - Minus sign A - B Arithmetic Subtraction
940 * Asterisk A * B Arithmetic Multiplica-
941 tion operator. (signed
944 / Slash A / B Arithmetic Division
948 & Ampersand A & B Logical AND operator.
950 | Bar A | B Logical OR operator.
952 % Percent sign A % B Modulus operator.
955 ^ Up arrow or A ^ B EXCLUSIVE OR operator.
958 ----------------------------------------------------------------
966 THE ASSEMBLER PAGE 1-10
967 SYMBOLS AND EXPRESSIONS
970 Table 6 Temporary Radix Operators
971 ----------------------------------------------------------------
973 $%, 0b, 0B Binary radix operator.
975 $&, 0o, 0O, 0q, 0Q Octal radix operator.
977 $#, 0d, 0D Decimal radix operator.
979 $$, 0h, 0H, 0x, 0X Hexidecimal radix operator.
982 Potential ambiguities arising from the use of 0b and 0d
983 as temporary radix operators may be circumvented by pre-
984 ceding all non-prefixed hexidecimal numbers with 00.
985 Leading 0's are required in any case where the first
986 hexidecimal digit is abcdef as the assembler will treat
987 the letter sequence as a label.
989 ----------------------------------------------------------------
997 1.3.2 User-Defined Symbols
1000 User-defined symbols are those symbols that are equated to a
1001 specific value through a direct assignment statement or appear
1002 as labels. These symbols are added to the User Symbol Table as
1003 they are encountered during assembly.
1005 The following rules govern the creation of user-defined symbols:
1007 1. Symbols can be composed of alphanumeric characters,
1008 dollar signs ($), periods (.), and underscores (_)
1011 2. The first character of a symbol must not be a number
1012 (except in the case of local symbols).
1014 3. The first 79 characters of a symbol must be unique. A
1015 symbol can be written with more than 79 legal
1016 characters, but the 80th and subsequent characters are
1019 4. Spaces and Tabs must not be embedded within a symbol.
1024 THE ASSEMBLER PAGE 1-11
1025 SYMBOLS AND EXPRESSIONS
1031 Local symbols are specially formatted symbols used as labels
1032 within a block of coding that has been delimited as a local sym-
1033 bol block. Local symbols are of the form n$, where n is a
1034 decimal integer from 0 to 255, inclusive. Examples of local
1042 The range of a local symbol block consists of those state-
1043 ments between two normally constructed symbolic labels. Note
1044 that a statement of the form:
1048 is a direct assignment statement but does not create a label and
1049 thus does not delimit the range of a local symbol block.
1051 Note that the range of a local symbol block may extend across
1054 Local symbols provide a convenient means of generating labels
1055 for branch instructions and other such references within local
1056 symbol blocks. Using local symbols reduces the possibility of
1057 symbols with multiple definitions appearing within a user pro-
1058 gram. In addition, the use of local symbols differentiates
1059 entry-point labels from local labels, since local labels cannot
1060 be referenced from outside their respective local symbol blocks.
1061 Thus, local symbols of the same name can appear in other local
1062 symbol blocks without conflict. Local symbols require less sym-
1063 bol table space than normal symbols. Their use is recommended.
1065 The use of the same local symbol within a local symbol block
1066 will generate one or both of the m or p errors.
1069 THE ASSEMBLER PAGE 1-12
1070 SYMBOLS AND EXPRESSIONS
1073 Example of local symbols:
1075 a: ldx #atable ;get table address
1076 lda #0d48 ;table length
1081 b: ldx #btable ;get table address
1082 lda #0d48 ;table length
1088 1.3.4 Current Location Counter
1091 The period (.) is the symbol for the current location coun-
1092 ter. When used in the operand field of an instruction, the
1093 period represents the address of the first byte of the
1096 AS: ldx #. ;The period (.) refers to
1097 ;the address of the ldx
1100 When used in the operand field of an ASxxxx directive, it
1101 represents the address of the current byte or word:
1105 .word 0xFFFE,.+4,QK ;The operand .+4 in the .word
1106 ;directive represents a value
1107 ;stored in the second of the
1108 ;three words during assembly.
1110 If we assume the current value of the program counter is
1111 0H0200, then during assembly, ASxxxx reserves three words of
1112 storage starting at location 0H0200. The first value, a hex-
1113 idecimal constant FFFE, will be stored at location 0H0200. The
1114 second value represented by .+4 will be stored at location
1115 0H0202, its value will be 0H0206 ( = 0H0202 + 4). The third
1116 value defined by the symbol QK will be placed at location
1119 At the beginning of each assembly pass, ASxxxx resets the lo-
1120 cation counter. Normally, consecutive memory locations are as-
1121 signed to each byte of object code generated. However, the
1122 value of the location counter can be changed through a direct
1123 assignment statement of the following form:
1127 THE ASSEMBLER PAGE 1-13
1128 SYMBOLS AND EXPRESSIONS
1134 The new location counter can only be specified relative to
1135 the current location counter. Neglecting to specify the current
1136 program counter along with the expression on the right side of
1137 the assignment operator will generate the (.) error. (Absolute
1138 program areas may use the .org directive to specify the absolute
1139 location of the current program counter.)
1141 The following coding illustrates the use of the current location
1144 .area CODE1 (ABS) ;program area CODE1
1147 .org 0H100 ;set location to
1150 num1: ldx #.+0H10 ;The label num1 has
1155 .org 0H130 ;location counter
1158 num2: ldy #. ;The label num2 has
1164 .area CODE2 (REL) ;program area CODE2
1167 . = . + 0H20 ;Set location counter
1168 ;to relocatable 0H20 of
1169 ;the program section.
1171 num3: .word 0 ;The label num3 has
1173 ;of relocatable 0H20.
1175 . = . + 0H40 ;will reserve 0H40
1176 ;bytes of storage as will
1180 The .blkb and .blkw directives are the preferred methods of
1185 THE ASSEMBLER PAGE 1-14
1186 SYMBOLS AND EXPRESSIONS
1192 ASxxxx assumes that all numbers in the source program are to
1193 be interpreted in decimal radix unless otherwise specified. The
1194 .radix directive may be used to specify the default as octal,
1195 decimal, or hexidecimal. Individual numbers can be designated
1196 as binary, octal, decimal, or hexidecimal through the temporary
1197 radix prefixes shown in table 6.
1199 Negative numbers must be preceeded by a minus sign; ASxxxx
1200 translates such numbers into two's complement form. Positive
1201 numbers may (but need not) be preceeded by a plus sign.
1203 Numbers are always considered to be absolute values, therefor
1204 they are never relocatable.
1210 A term is a component of an expression and may be one of the
1217 1. A period (.) specified in an expression causes the
1218 current location counter to be used.
1219 2. A User-defined symbol.
1220 3. An undefined symbol is assigned a value of zero and
1221 inserted in the User-Defined symbol table as an un-
1224 3. A single quote followed by a single ascii character, or
1225 a double quote followed by two ascii characters.
1227 4. An expression enclosed in parenthesis. Any expression
1228 so enclosed is evaluated and reduced to a single term
1229 before the remainder of the expression in which it ap-
1230 pears is evaluated. Parenthesis, for example, may be
1231 used to alter the left-to-right evaluation of expres-
1232 sions, (as in A*B+C versus A*(B+C)), or to apply a un-
1233 ary operator to an entire expression (as in -(A+B)).
1235 5. A unary operator followed by a symbol or number.
1241 THE ASSEMBLER PAGE 1-15
1242 SYMBOLS AND EXPRESSIONS
1248 Expressions are combinations of terms joined together by
1249 binary operators. Expressions reduce to a 16-bit value. The
1250 evaluation of an expression includes the determination of its
1251 attributes. A resultant expression value may be one of three
1252 types (as described later in this section): relocatable, ab-
1253 solute, and external.
1255 Expressions are evaluate with an operand hierarchy as follows:
1257 * / % multiplication,
1264 << >> left shift and
1267 ^ exclusive or fourth.
1269 & logical and fifth.
1273 except that unary operators take precedence over binary
1277 A missing or illegal operator terminates the expression
1278 analysis, causing error codes (o) and/or (q) to be generated
1279 depending upon the context of the expression itself.
1281 At assembly time the value of an external (global) expression
1282 is equal to the value of the absolute part of that expression.
1283 For example, the expression external+4, where 'external' is an
1284 external symbol, has the value of 4. This expression, however,
1285 when evaluated at link time takes on the resolved value of the
1286 symbol 'external', plus 4.
1288 Expressions, when evaluated by ASxxxx, are one of three
1289 types: relocatable, absolute, or external. The following dis-
1290 tinctions are important:
1292 1. An expression is relocatable if its value is fixed re-
1293 lative to the base address of the program area in which
1294 it appears; it will have an offset value added at link
1295 time. Terms that contain labels defined in relocatable
1296 program areas will have a relocatable value;
1299 THE ASSEMBLER PAGE 1-16
1300 SYMBOLS AND EXPRESSIONS
1303 similarly, a period (.) in a relocatable program area,
1304 representing the value of the current program location
1305 counter, will also have a relocatable value.
1307 2. An expression is absolute if its value is fixed. An
1308 expression whose terms are numbers and ascii characters
1309 will reduce to an absolute value. A relocatable ex-
1310 pression or term minus a relocatable term, where both
1311 elements being evaluated belong to the same program
1312 area, is an absolute expression. This is because every
1313 term in a program area has the same relocation bias.
1314 When one term is subtracted from the other the reloca-
1317 3. An expression is external (or global) if it contains a
1318 single global reference (plus or minus an absolute ex-
1319 pression value) that is not defined within the current
1320 program. Thus, an external expression is only par-
1321 tially defined following assembly and must be resolved
1326 1.4 GENERAL ASSEMBLER DIRECTIVES
1329 An ASxxxx directive is placed in the operator field of the
1330 source line. Only one directive is allowed per source line.
1331 Each directive may have a blank operand field or one or more
1332 operands. Legal operands differ with each directive.
1335 1.4.1 .module Directive
1341 The .module directive causes the string to be included in the
1342 assemblers output file as an identifier for this particular ob-
1343 ject module. The string may be from 1 to 79 characters in
1344 length. Only one identifier is allowed per assembled module.
1345 The main use of this directive is to allow the linker to report
1346 a modules' use of undefined symbols. At link time all undefined
1347 symbols are reported and the modules referencing them are
1353 THE ASSEMBLER PAGE 1-17
1354 GENERAL ASSEMBLER DIRECTIVES
1357 1.4.2 .title Directive
1363 The .title directive provides a character string to be placed
1364 on the second line of each page during listing.
1367 1.4.3 .sbttl Directive
1373 The .sbttl directive provides a character string to be placed
1374 on the third line of each page during listing.
1377 1.4.4 .page Directive
1383 The .page directive causes a page ejection with a new heading
1384 to be printed. The new page occurs after the next line of the
1385 source program is processed, this allows an immediately follow-
1386 ing .sbttl directive to appear on the new page. The .page
1387 source line will not appear in the file listing. Paging may be
1388 disabled by invoking the -p directive.
1391 1.4.5 .byte and .db Directives
1395 .byte exp ;Stores the binary value
1396 .db exp ;of the expression in the
1399 .byte exp1,exp2,expn ;Stores the binary values
1400 .db exp1,exp2,expn ;of the list of expressions
1401 ;in successive bytes.
1403 where: exp, represent expressions that will be
1404 exp1, truncated to 8-bits of data.
1405 . Each expression will be calculated
1406 . as a 16-bit word expression,
1407 . the high-order byte will be truncated.
1408 . Multiple expressions must be
1411 THE ASSEMBLER PAGE 1-18
1412 GENERAL ASSEMBLER DIRECTIVES
1415 expn separated by commas.
1417 The .byte or .db directives are used to generate successive
1418 bytes of binary data in the object module.
1421 1.4.6 .word and .dw Directives
1425 .word exp ;Stores the binary value
1426 .dw exp ;of the expression in
1429 .word exp1,exp2,expn ;Stores the binary values
1430 .dw exp1,exp2,expn ;of the list of expressions
1431 ;in successive words.
1433 where: exp, represent expressions that will occupy two
1434 exp1, bytes of data. Each expression will be
1435 . calculated as a 16-bit word expression.
1436 . Multiple expressions must be
1437 expn separated by commas.
1439 The .word or .dw directives are used to generate successive
1440 words of binary data in the object module.
1443 1.4.7 .blkb, .blkw, and .ds Directives
1447 .blkb N ;reserve N bytes of space
1448 .blkw N ;reserve N words of space
1449 .ds N ;reserve N bytes of space
1451 The .blkb and .ds directives reserve byte blocks in the ob-
1452 ject module; the .blkw directive reserves word blocks.
1455 1.4.8 .ascii Directive
1461 where: string is a string of printable ascii characters.
1463 / / represent the delimiting characters. These
1464 delimiters may be any paired printing
1465 characters, as long as the characters are not
1466 contained within the string itself. If the
1469 THE ASSEMBLER PAGE 1-19
1470 GENERAL ASSEMBLER DIRECTIVES
1473 delimiting characters do not match, the .ascii
1474 directive will give the (q) error.
1476 The .ascii directive places one binary byte of data for each
1477 character in the string into the object module.
1480 1.4.9 .ascis Directive
1486 where: string is a string of printable ascii characters.
1488 / / represent the delimiting characters. These
1489 delimiters may be any paired printing
1490 characters, as long as the characters are not
1491 contained within the string itself. If the
1492 delimiting characters do not match, the .ascis
1493 directive will give the (q) error.
1495 The .ascis directive places one binary byte of data for each
1496 character in the string into the object module. The last
1497 character in the string will have the high order bit set.
1500 1.4.10 .asciz Directive
1506 where: string is a string of printable ascii characters.
1508 / / represent the delimiting characters. These
1509 delimiters may be any paired printing
1510 characters, as long as the characters are not
1511 contained within the string itself. If the
1512 delimiting characters do not match, the .asciz
1513 directive will give the (q) error.
1515 The .asciz directive places one binary byte of data for each
1516 character in the string into the object module. Following all
1517 the character data a zero byte is inserted to terminate the
1523 THE ASSEMBLER PAGE 1-20
1524 GENERAL ASSEMBLER DIRECTIVES
1527 1.4.11 .radix Directive
1533 where: character represents a single character specifying the
1534 default radix to be used for succeeding numbers.
1535 The character may be any one of the following:
1549 1.4.12 .even Directive
1555 The .even directive ensures that the current location counter
1556 contains an even boundary value by adding 1 if the current loca-
1560 1.4.13 .odd Directive
1566 The .odd directive ensures that the current location counter
1567 contains an odd boundary value by adding one if the current lo-
1573 THE ASSEMBLER PAGE 1-21
1574 GENERAL ASSEMBLER DIRECTIVES
1577 1.4.14 .area Directive
1581 .area name [(options)]
1583 where: name represents the symbolic name of the program sec-
1584 tion. This name may be the same as any
1585 user-defined symbol as the area names are in-
1586 dependent of all symbols and labels.
1588 options specify the type of program or data area:
1589 ABS absolute (automatically invokes OVR)
1596 The .area directive provides a means of defining and separat-
1597 ing multiple programming and data sections. The name is the
1598 area label used by the assembler and the linker to collect code
1599 from various separately assembled modules into one section. The
1600 name may be from 1 to 79 characters in length.
1602 The options are specified within parenthesis and separated by
1603 commas as shown in the following example:
1605 .area TEST (REL,CON) ;This section is relocatable
1606 ;and concatenated with other
1607 ;sections of this program area.
1609 .area DATA (REL,OVR) ;This section is relocatable
1610 ;and overlays other sections
1611 ;of this program area.
1613 .area SYS (ABS,OVR) ;(CON not allowed with ABS)
1614 ;This section is defined as
1615 ;absolute. Absolute sections
1616 ;are always overlayed with
1617 ;other sections of this program
1620 .area PAGE (PAG) ;This is a paged section. The
1621 ;section must be on a 256 byte
1622 ;boundary and its length is
1623 ;checked by the linker to be
1624 ;no larger than 256 bytes.
1625 ;This is useful for direct page
1630 THE ASSEMBLER PAGE 1-22
1631 GENERAL ASSEMBLER DIRECTIVES
1634 The default area type is REL|CON; i.e. a relocatable sec-
1635 tion which is concatenated with other sections of code with the
1636 same area name. The ABS option indicates an absolute area. The
1637 OVR and CON options indicate if program sections of the same
1638 name will overlay each other (start at the same location) or be
1639 concatenated with each other (appended to each other).
1641 Multiple invocations of the .area directive with the same
1642 name must specify the same options or leave the options field
1643 blank, this defaults to the previously specified options for
1646 The ASxxxx assemblers automatically provide two program
1649 '. .ABS.' This dumby section contains all absolute
1650 symbols and their values.
1652 '_CODE' This is the default program/data area.
1653 This program area is of type (REL,CON).
1655 The ASxxxx assemblers also automatically generate two symbols
1656 for each program area:
1658 's_<area>' This is the starting address of the pro-
1661 indent -16 'l_<area>' This is the
1662 length of the program area.
1664 The .area names and options are never case sensitive.
1667 1.4.15 .org Directive
1673 where: exp is an absolute expression that becomes the cur-
1674 rent location counter.
1676 The .org directive is valid only in an absolute program section
1677 and will give a (q) error if used in a relocatable program area.
1678 The .org directive specifies that the current location counter
1679 is to become the specified absolute value.
1684 THE ASSEMBLER PAGE 1-23
1685 GENERAL ASSEMBLER DIRECTIVES
1688 1.4.16 .globl Directive
1692 .globl sym1,sym2,...,symn
1694 where: sym1, represent legal symbolic names. When
1695 sym2,... When multiple symbols are specified,
1696 symn they are separated by commas.
1698 A .globl directive may also have a label field and/or a com-
1701 The .globl directive is provided to define (and thus provide
1702 linkage to) symbols not otherwise defined as global symbols
1703 within a module. In defining global symbols the directive
1704 .globl J is similar to:
1706 J == expression or J::
1708 Because object modules are linked by global symbols, these
1709 symbols are vital to a program. All internal symbols appearing
1710 within a given program must be defined at the end of pass 1 or
1711 they will be considered undefined. The assembly directive (-g)
1712 can be be invoked to make all undefined symbols global at the
1716 1.4.17 .if, .else, and .endif Directives
1722 . ;} range of true condition
1726 . ;} range of false condition
1730 The conditional assembly directives allow you to include or
1731 exclude blocks of source code during the assembly process, based
1732 on the evaluation of the condition test.
1734 The range of true condition will be processed if the expres-
1735 sion 'expr' is not zero (i.e. true) and the range of false con-
1736 dition will be processed if the expression 'expr' is zero (i.e
1737 false). The range of true condition is optional as is the .else
1738 directive and the range of false condition. The following are
1739 all valid .if/.else/.endif constructions:
1742 THE ASSEMBLER PAGE 1-24
1743 GENERAL ASSEMBLER DIRECTIVES
1747 .if A-4 ;evaluate A-4
1748 .byte 1,2 ;insert bytes if A-4 is
1751 .if K+3 ;evaluate K+3
1753 .byte 3,4 ;insert bytes if K+3
1756 .if J&3 ;evaluate J masked by 3
1757 .byte 12 ;insert this byte if J&3
1759 .byte 13 ;insert this byte if J&3
1763 The .if/.else/.endif directives may be nested upto 10 levels.
1765 The .page directive is processed within a false condition
1766 range to allow extended textual information to be incorporated
1767 in the source program with out the need to use the comment
1773 This text will be bypassed during assembly
1774 but appear in the listing file.
1782 1.4.18 .include Directive
1788 where: string represents a delimited string that is the file
1789 specification of an ASxxxx source file.
1791 The .include directive is used to insert a source file within
1792 the source file currently being assembled. When this directive
1793 is encountered, an implicit .page directive is issued. When the
1794 end of the specified source file is reached, an implicit .page
1795 directive is issued and input continues from the previous source
1796 file. The maximum nesting level of source files specified by a
1797 .include directive is five.
1800 THE ASSEMBLER PAGE 1-25
1801 GENERAL ASSEMBLER DIRECTIVES
1804 The total number of separately specified .include files is
1805 unlimited as each .include file is opened and then closed during
1806 each pass made by the assembler.
1809 1.4.19 .setdp Directive
1813 .setdp [base [,area]]
1815 The set direct page directive has a common format in all the
1816 AS68xx assemblers. The .setdp directive is used to inform the
1817 assembler of the current direct page region and the offset ad-
1818 dress within the selected area. The normal invocation methods
1828 for all the 68xx microprocessors (the 6804 has only the paged
1829 ram area). The commands specify that the direct page is in area
1830 DIRECT and its offset address is 0 (the only valid value for all
1831 but the 6809 microprocessor). Be sure to place the DIRECT area
1832 at address 0 during linking. When the base address and area are
1833 not specified, then zero and the current area are the defaults.
1834 If a .setdp directive is not issued the assembler defaults the
1835 direct page to the area "_CODE" at offset 0.
1837 The assembler verifies that any local variable used in a
1838 direct variable reference is located in this area. Local vari-
1839 able and constant value direct access addresses are checked to
1840 be within the address range from 0 to 255.
1842 External direct references are assumed by the assembler to be
1843 in the correct area and have valid offsets. The linker will
1844 check all direct page relocations to verify that they are within
1847 The 6809 microprocessor allows the selection of the direct
1848 page to be on any 256 byte boundary by loading the appropriate
1849 value into the dp register. Typically one would like to select
1850 the page boundary at link time, one method follows:
1853 THE ASSEMBLER PAGE 1-26
1854 GENERAL ASSEMBLER DIRECTIVES
1857 .area DIRECT (PAG) ; define the direct page
1864 ldd #DIRECT ; load the direct page register
1865 tfr a,dp ; for access to the direct page
1867 At link time specify the base and global equates to locate the
1873 Both the area address and offset value must be specified (area
1874 and variable names are independent). The linker will verify
1875 that the relocated direct page accesses are within the direct
1877 The preceeding sequence could be repeated for multiple paged
1878 areas, however an alternate method is to define a non-paged area
1879 and use the .setdp directive to specify the offset value:
1881 .area DIRECT ; define non-paged area
1887 .setdp 0,DIRECT ; direct page area
1888 ldd #DIRECT ; load the direct page register
1889 tfr a,dp ; for access to the direct page
1892 .setdp 0x100,DIRECT ; direct page area
1893 ldd #DIRECT+0x100 ; load the direct page register
1894 tfr a,dp ; for access to the direct page
1896 The linker will verify that subsequent direct page references
1897 are in the specified area and offset address range. It is the
1898 programmers responsibility to load the dp register with the cor-
1899 rect page segment corresponding to the .setdp base address
1902 For those cases where a single piece of code must access a
1903 defined data structure within a direct page and there are many
1904 pages, define a dumby direct page linked at address 0. This
1905 dumby page is used only to define the variable labels. Then
1906 load the dp register with the real base address but donot use a
1907 .setdp directive. This method is equivalent to indexed
1910 THE ASSEMBLER PAGE 1-27
1911 GENERAL ASSEMBLER DIRECTIVES
1914 addressing, where the dp register is the index register and the
1915 direct addressing is the offset.
1921 The ASxxxx assemblers are command line oriented. The PC as-
1922 semblers are started with the appropriate option(s) and file(s)
1923 to assemble following the assembler name:
1925 as6809 [-dqxgalosff] file1 [file2 file3 ... file6]
1931 x hex listing (default)
1933 The listing radix affects the
1934 .lst, .rel, and .sym files.
1936 g undefined symbols made global
1937 a all user symbols made global
1939 l create list output file1.lst
1940 o create object output file1.rel
1941 s create symbol output file1.sym
1943 p disable listing pagination
1944 w wide listing format for symbol table
1946 z enable case sensitivity for symbols
1948 relocatable reference flagging:
1950 f by ` in the listing file
1951 ff by mode in the listing file
1953 The file name for the .lst, .rel, and .sym files is the first
1954 file name specified in the command line. All output files are
1955 ascii text files which may be edited, copied, etc. The output
1956 files are the concatenation of all the input files, if files are
1957 to be assembled independently invoke the assembler for each
1960 The .rel file contains a radix directive so that the linker
1961 will use the proper conversion for this file. Linked files may
1962 have different radices.
1966 THE ASSEMBLER PAGE 1-28
1970 If the list (l) option is specified without the symbol table
1971 (s) option, the symbol table is placed at the end of the listing
1978 The ASxxxx assemblers provide limited diagnostic error codes
1979 during the assembly process, these errors will be noted in the
1980 listing file and printed on the stderr device.
1982 The assembler reports the errors on the stderr device as
1984 ?ASxxxx-Error-<*> in line nnn of filename
1986 where * is the error code, nnn is the line number, and filename
1987 is the source/include file.
1991 (.) This error is caused by an absolute direct assign-
1992 ment of the current location counter
1993 . = expression (incorrect)
1994 rather than the correct
1997 (a) Indicates a machine specific addressing or address-
2000 (b) Indicates a direct page boundary error.
2002 (d) Indicates a direct page addressing error.
2004 (i) Caused by an .include file error or an .if/.endif
2007 (m) Multiple definitions of the same label, multiple
2008 .module directives, or multiple conflicting attri-
2009 butes in an .area directive.
2011 (o) Directive or mnemonic error or the use of the .org
2012 directive in a relocatable area.
2014 (p) Phase error: label location changing between passes
2015 2 and 3. Normally caused by having more than one
2016 level of forward referencing.
2018 (q) Questionable syntax: missing or improper operators,
2019 terminators, or delimiters.
2021 (r) Relocation error: logic operation attempted on a
2024 THE ASSEMBLER PAGE 1-29
2028 relocatable term, addition of two relocatable terms,
2029 subtraction of two relocatable terms not within the
2030 same programming area or external symbols.
2032 (u) Undefined symbol encountered during assembly.
2038 The (-l) option produces an ascii output listing file. Each
2039 page of output contains a four line header:
2042 1. The ASxxxx program name and page number
2044 2. Title from a .title directive (if any)
2046 3. Subtitle from a .sbttl directive (if any)
2052 Each succeeding line contains five fields:
2055 1. Error field (first three characters of line)
2057 2. Current location counter
2059 3. Generated code in byte format
2061 4. Source text line number
2066 The error field may contain upto 2 error flags indicating any
2067 errors encountered while assembling this line of source code.
2069 The current location counter field displays the 16-bit pro-
2070 gram position. This field will be in the selected radix.
2072 The generated code follows the program location. The listing
2073 radix determines the number of bytes that will be displayed in
2074 this field. Hexidecimal listing allows six bytes of data within
2075 the field, decimal and octal allow four bytes within the field.
2076 If more than one field of data is generated from the assembly of
2077 a single line of source code, then the data field is repeated on
2082 THE ASSEMBLER PAGE 1-30
2086 The source text line number is printed in decimal and is fol-
2087 lowed by the source text.
2089 Two special cases will disable the listing of a line of
2092 1. Source line with a .page directive is never listed.
2094 2. Source line with a .include file directive is not
2095 listed unless the .include file cannot be opened.
2098 Two data field options are available to flag those bytes
2099 which will be relocated by the linker. If the -f option is
2100 specified then each byte to be relocated will be preceeded by
2101 the '`' character. If the -ff option is specified then each
2102 byte to be relocated will be preceeded by one of the following
2105 1. * paged relocation
2107 2. u low byte of unsigned word or unsigned byte
2109 3. v high byte of unsigned word
2111 4. p PCR low byte of word relocation or PCR byte
2113 5. q PCR high byte of word relocation
2115 6. r low byte relocation or byte relocation
2117 7. s high byte relocation
2121 1.8 SYMBOL TABLE FILE
2124 The symbol table has two parts:
2126 1. The alphabetically sorted list of symbols and/or labels
2127 defined or referenced in the source program.
2129 2. A list of the program areas defined during assembly of
2133 The sorted list of symbols and/or labels contains the follow-
2136 1. Program area number (none if absolute value or exter-
2140 THE ASSEMBLER PAGE 1-31
2144 2. The symbol or label
2146 3. Directly assigned symbol is denoted with an (=) sign
2148 4. The value of a symbol, location of a label relative to
2149 the program area base address (=0), or a **** indicat-
2150 ing the symbol or label is undefined.
2152 5. The characters: G - global, R - relocatable, and X -
2156 The list of program areas provides the correspondence between
2157 the program area numbers and the defined program areas, the size
2158 of the program areas, and the area flags (attributes).
2164 The object file is an ascii file containing the information
2165 needed by the linker to bind multiple object modules into a com-
2166 plete loadable memory image. The object module contains the
2167 following designators:
2174 H Most significant byte first
2175 L Least significant byte first
2182 R Relocation information
2183 P Paging information
2185 Refer to the linker for a detailed description of each of the
2186 designators and the format of the information contained in the
2210 2.1 ASLINK RELOCATING LINKER
2213 ASLINK is the companion linker for the ASxxxx assemblers.
2215 The program ASLINK is a general relocating linker performing
2216 the following functions:
2218 1. Bind multiple object modules into a single memory image
2220 2. Resolve inter-module symbol references
2222 3. Combine code belonging to the same area from multiple
2223 object files into a single contiguous memory region
2225 4. Search and import object module libraries for undefined
2228 5. Perform byte and word program counter relative
2229 (pc or pcr) addressing calculations
2231 6. Define absolute symbol values at link time
2233 7. Define absolute area base address values at link time
2235 8. Produce Intel Hex or Motorola S19 output file
2237 9. Produce a map of the linked memory image
2239 10. Produce an updated listing file with the relocated ad-
2253 The linker may run in the command line mode or command file
2254 modes. The allowed startup linker commands are:
2256 -c/-f command line / command file modes
2258 -p/-n enable/disable echo file.lnk input to stdout
2260 If command line mode is selected, all linker commands come
2261 from stdin, if the command file mode is selected the commands
2262 are input from the specified file (extension must be .lnk).
2264 Most sytems require the initial options to be entered on the
2269 Some systems may request the arguments after the linker is
2270 started at a system specific prompt:
2275 After invoking the linker the valid options are:
2277 1. -i/-s Intel Hex (file.ihx) or Motorola S19 (file.s19)
2280 2. -z Specifies that symbol names are case sensitive.
2282 3. -m Generate a map file (file.map). This file con-
2283 tains a list of the symbols (by area) with absolute ad-
2284 dresses, sizes of linked areas, and other linking
2287 4. -w Specifies that a wide listing format be used
2290 5. -xdq Specifies the number radix for the map file
2291 (Hexidecimal, Decimal, or Octal).
2293 6. -u Generate an updated listing file (file.rst)
2294 derived from the relocated addresses and data from the
2297 7. fileN Files to be linked. Files may be on the same
2298 line as the above options or on a separate line(s) one
2299 file per line or multiple files separated by spaces or
2308 8. -b area = expression (one definition per line)
2309 This specifies an area base address where the expres-
2310 sion may contain constants and/or defined symbols from
2313 9. -g symbol = expression (one definition per line)
2314 This specifies the value for the symbol where the ex-
2315 pression may contain constants and/or defined symbols
2316 from the linked files.
2318 10. -k library directory path
2319 (one definition per line) This specifies one possible
2320 path to an object library. More than one path is al-
2323 11. -l library file specification
2324 (one definition per line) This specifies a possible
2325 library file. More than one file is allowed.
2327 12. -e or null line, terminates input to the linker.
2331 2.3 LIBRARY PATH(S) AND FILE(S)
2334 The process of resolving undefined symbols after scanning the
2335 input object files includes the scanning of object module
2336 libraries. The linker will search through all combinations of
2337 the library path specifications (input by the -k option) and the
2338 library file specifications (input by the -l option) that lead
2339 to an existing library file. Each library file contains a list
2340 (one file per line) of modules included in this particular
2341 library. Each existing object module is scanned for a match to
2342 the undefined symbol. The first module containing the symbol is
2343 then linked with the previous modules to resolve the symbol de-
2344 finition. The library object modules are rescanned until no
2345 more symbols can be resolved. The scanning algorithm allows
2346 resolution of back references. No errors are reported for non
2347 existant library files or object modules.
2349 The library file specification may be formed in one of two
2352 1. If the library file contained an absolute path/file
2353 specification then this is the object module's
2357 2. If the library file contains a relative path/file
2358 specification then the concatenation of the path and
2362 LIBRARY PATH(S) AND FILE(S)
2365 this file specification becomes the object module's
2370 As an example, assume there exists a library file termio.lib
2371 in the syslib directory specifying the following object modules:
2373 \6809\io_disk first object module
2374 d:\special\io_comm second object module
2376 and the following parameters were specified to the linker:
2378 -k c:\iosystem\ the first path
2379 -k c:\syslib\ the second path
2381 -l termio the first library file
2382 -l io the second library file (no such file)
2384 The linker will attempt to use the following object modules to
2385 resolve any undefined symbols:
2387 c:\syslib\6809\io_disk.rel (concatenated path/file)
2388 d:\special\io_comm.rel (absolute path/file)
2390 all other path(s)/file(s) don't exist. (No errors are reported
2391 for non existant path(s)/file(s).)
2394 2.4 ASLINK PROCESSING
2397 The linker processes the files in the order they are
2398 presented. The first pass through the input files is used to
2399 define all program areas, the section area sizes, and symbols
2400 defined or referenced. Undefined symbols will initiate a search
2401 of any specified library file(s) and the importing of the module
2402 containing the symbol definition. After the first pass the -b
2403 (area base address) definitions, if any, are processed and the
2406 The area linking proceeds by first examining the area types
2407 ABS, CON, REL, OVR and PAG. Absolute areas (ABS) from separate
2408 object modules are always overlayed and have been assembled at a
2409 specific address, these are not normally relocated (if a -b com-
2410 mand is used on an absolute area the area will be relocated).
2411 Relative areas (normally defined as REL|CON) have a base address
2412 of 0x0000 as read from the object files, the -b command speci-
2413 fies the beginning address of the area. All subsequent relative
2414 areas will be concatenated with proceeding relative areas.
2415 Where specific ordering is desired, the first linker input file
2416 should have the area definitions in the desired order. At the
2423 completion of the area linking all area addresses and lengths
2424 have been determined. The areas of type PAG are verified to be
2425 on a 256 byte boundary and that the length does not exceed 256
2426 bytes. Any errors are noted on stderr and in the map file.
2428 Next the global symbol definitions (-g option), if any, are
2429 processed. The symbol definitions have been delayed until this
2430 point because the absolute addresses of all internal symbols are
2431 known and can be used in the expression calculations.
2433 Before continuing with the linking process the symbol table
2434 is scanned to determine if any symbols have been referenced but
2435 not defined. Undefined symbols are listed on the stderr device.
2436 if a .module directive was included in the assembled file the
2437 module making the reference to this undefined variable will be
2440 Constants defined as global in more than one module will be
2441 flagged as multiple definitions if their values are not identi-
2444 After the preceeding processes are complete the linker may
2445 output a map file (-m option). This file provides the following
2448 1. Global symbol values and label absolute addresses
2450 2. Defined areas and there lengths
2452 3. Remaining undefined symbols
2454 4. List of modules linked
2456 5. List of library modules linked
2458 6. List of -b and -g definitions
2463 The final step of the linking process is performed during the
2464 second pass of the input files. As the xxx.rel files are read
2465 the code is relocated by substituting the physical addresses for
2466 the referenced symbols and areas and may be output in Intel or
2467 Motorola formats. The number of files linked and symbols de-
2468 fined/referenced is limited by the processor space available to
2469 build the area/symbol lists. If the -u option is specified then
2470 the listing files (file.lst) associated with the relocation
2471 files (file.rel) are scanned and used to create a new file
2472 (file.rst) which has all addresses and data relocated to their
2481 2.5 LINKER INPUT FORMAT
2484 The linkers' input object file is an ascii file containing
2485 the information needed by the linker to bind multiple object
2486 modules into a complete loadable memory image.
2488 The object module contains the following designators:
2495 H Most significant byte first
2496 L Least significant byte first
2503 R Relocation information
2504 P Paging information
2507 2.5.1 Object Module Format
2510 The first line of an object module contains the [XDQ][HL]
2511 format specifier (i.e. XH indicates a hexidecimal file with
2512 most significant byte first) for the following designators.
2517 H aa areas gg global symbols
2519 The header line specifies the number of areas(aa) and the
2520 number of global symbols(gg) defined or referenced in this ob-
2521 ject module segment.
2534 The module line specifies the module name from which this
2535 header segment was assembled. The module line will not appear
2536 if the .module directive was not used in the source program.
2547 The symbol line defines (Def) or references (Ref) the symbol
2548 'string' with the value nnnn. The defined value is relative to
2549 the current area base address. References to constants and ex-
2550 ternal global symbols will always appear before the first area
2551 definition. References to external symbols will have a value of
2557 A label size ss flags ff
2559 The area line defines the area label, the size (ss) of the
2560 area in bytes, and the area flags (ff). The area flags specify
2561 the ABS, REL, CON, OVR, and PAG parameters:
2563 OVR/CON (0x04/0x00 i.e. bit position 2)
2565 ABS/REL (0x08/0x00 i.e. bit position 3)
2567 PAG (0x10 i.e. bit position 4)
2572 T xx xx nn nn nn nn nn ...
2574 The T line contains the assembled code output by the assem-
2575 bler with xx xx being the offset address from the current area
2576 base address and nn being the assembled instructions and data in
2588 R 0 0 nn nn n1 n2 xx xx ...
2590 The R line provides the relocation information to the linker.
2591 The nn nn value is the current area index, i.e. which area the
2592 current values were assembled. Relocation information is en-
2593 coded in groups of 4 bytes:
2595 1. n1 is the relocation mode and object format, for the
2596 adhoc extension modes refer to asxxxx.h or aslink.h
2597 1. bit 0 word(0x00)/byte(0x01)
2598 2. bit 1 relocatable area(0x00)/symbol(0x02)
2599 3. bit 2 normal(0x00)/PC relative(0x04) relocation
2600 4. bit 3 1-byte(0x00)/2-byte(0x08) object format for
2602 5. bit 4 signed(0x00)/unsigned(0x10) byte data
2603 6. bit 5 normal(0x00)/page '0'(0x20) reference
2604 7. bit 6 normal(0x00)/page 'nnn'(0x40) reference
2605 8. bit 7 LSB byte(0x00)/MSB byte(0x80) with 2-byte
2608 2. n2 is a byte index into the corresponding (i.e. pre-
2609 ceeding) T line data (i.e. a pointer to the data to be
2610 updated by the relocation). The T line data may be
2611 1-byte or 2-byte byte data format or 2-byte word
2614 3. xx xx is the area/symbol index for the area/symbol be-
2615 ing referenced. the corresponding area/symbol is found
2616 in the header area/symbol lists.
2619 The groups of 4 bytes are repeated for each item requiring relo-
2620 cation in the preceeding T line.
2625 P 0 0 nn nn n1 n2 xx xx
2627 The P line provides the paging information to the linker as
2628 specified by a .setdp directive. The format of the relocation
2629 information is identical to that of the R line. The correspond-
2630 ing T line has the following information:
2633 Where aa aa is the area reference number which specifies the
2634 selected page area and bb bb is the base address of the page.
2635 bb bb will require relocation processing if the 'n1 n2 xx xx' is
2636 specified in the P line. The linker will verify that the base
2643 address is on a 256 byte boundary and that the page length of an
2644 area defined with the PAG type is not larger than 256 bytes.
2646 The linker defaults any direct page references to the first
2647 area defined in the input REL file. All ASxxxx assemblers will
2648 specify the _CODE area first, making this the default page area.
2651 2.6 LINKER ERROR MESSAGES
2654 The linker provides detailed error messages allowing the pro-
2655 grammer to quickly find the errant code. As the linker com-
2656 pletes pass 1 over the input file(s) it reports any page
2657 boundary or page length errors as follows:
2659 ?ASlink-Warning-Paged Area PAGE0 Boundary Error
2663 ?ASlink-Warning-Paged Area PAGE0 Length Error
2665 where PAGE0 is the paged area.
2667 During Pass two the linker reads the T, R, and P lines per-
2668 forming the necessary relocations and outputting the absolute
2669 code. Various errors may be reported during this process
2670 The P line processing can produce only one possible error:
2672 ?ASlink-Warning-Page Definition Boundary Error
2673 file module pgarea pgoffset
2674 PgDef t6809l t6809l PAGE0 0001
2676 The error message specifies the file and module where the .setdp
2677 direct was issued and indicates the page area and the page
2678 offset value determined after relocation.
2681 The R line processing produces various errors:
2683 ?ASlink-Warning-Byte PCR relocation error for symbol bra2
2684 file module area offset
2685 Refby t6809l t6809l TEST 00FE
2686 Defin tconst tconst . .ABS. 0080
2688 ?ASlink-Warning-Unsigned Byte error for symbol two56
2689 file module area offset
2690 Refby t6800l t6800l DIRECT 0015
2691 Defin tconst tconst . .ABS. 0100
2694 THE LINKER PAGE 2-10
2695 LINKER ERROR MESSAGES
2698 ?ASlink-Warning-Page0 relocation error for symbol ltwo56
2699 file module area offset
2700 Refby t6800l t6800l DIRECT 000D
2701 Defin tconst tconst DIRECT 0100
2703 ?ASlink-Warning-Page Mode relocation error for symbol two56
2704 file module area offset
2705 Refby t6809l t6809l DIRECT 0005
2706 Defin tconst tconst . .ABS. 0100
2708 ?ASlink-Warning-Page Mode relocation error
2709 file module area offset
2710 Refby t Pagetest PROGRAM 0006
2711 Defin t Pagetest DIRECT 0100
2713 These error messages specify the file, module, area, and offset
2714 within the area of the code referencing (Refby) and defining
2715 (Defin) the symbol. If the symbol is defined in the same module
2716 as the reference the linker is unable to report the symbol name.
2717 The assembler listing file(s) should be examined at the offset
2718 from the specified area to located the offending code.
2722 1. The byte PCR error is caused by exceeding the pc rela-
2723 tive byte branch range.
2725 2. The Unsigned byte error indicates an indexing value was
2726 negative or larger than 255.
2728 3. The Page0 error is generated if the direct page vari-
2729 able is not in the page0 range of 0 to 255.
2731 4. The page mode error is generated if the direct variable
2732 is not within the current direct page (6809).
2736 THE LINKER Page 2-11
2737 INTEL HEX OUTPUT FORMAT
2740 2.7 INTEL HEX OUTPUT FORMAT
2742 Record Mark Field - This field signifies the start of a
2743 record, and consists of an ascii colon
2746 Record Length Field - This field consists of two ascii
2747 characters which indicate the number of
2748 data bytes in this record. The
2749 characters are the result of converting
2750 the number of bytes in binary to two
2751 ascii characters, high digit first. An
2752 End of File record contains two ascii
2753 zeros in this field.
2755 Load Address Field - This field consists of the four ascii
2756 characters which result from converting
2757 the the binary value of the address in
2758 which to begin loading this record. The
2759 order is as follows:
2761 High digit of high byte of address.
2762 Low digit of high byte of address.
2763 High digit of low byte of address.
2764 Low digit of low byte of address.
2766 In an End of File record this field con-
2767 sists of either four ascii zeros or the
2768 program entry address. Currently the
2769 entry address option is not supported.
2771 Record Type Field - This field identifies the record type,
2772 which is either 0 for data records or 1
2773 for an End of File record. It consists
2774 of two ascii characters, with the high
2775 digit of the record type first, followed
2776 by the low digit of the record type.
2778 Data Field - This field consists of the actual data,
2779 converted to two ascii characters, high
2780 digit first. There are no data bytes in
2781 the End of File record.
2783 Checksum Field - The checksum field is the 8 bit binary
2784 sum of the record length field, the load
2785 address field, the record type field,
2786 and the data field. This sum is then
2787 negated (2's complement) and converted
2788 to two ascii characters, high digit
2792 THE LINKER Page 2-12
2793 MOTOROLA S1-S9 OUTPUT FORMAT
2796 2.8 MOTORLA S1-S9 OUTPUT FORMAT
2798 Record Type Field - This field signifies the start of a
2799 record and identifies the the record
2802 Ascii S1 - Data Record
2803 Ascii S9 - End of File Record
2805 Record Length Field - This field specifies the record length
2806 which includes the address, data, and
2807 checksum fields. The 8 bit record
2808 length value is converted to two ascii
2809 characters, high digit first.
2811 Load Address Field - This field consists of the four ascii
2812 characters which result from converting
2813 the the binary value of the address in
2814 which to begin loading this record. The
2815 order is as follows:
2817 High digit of high byte of address.
2818 Low digit of high byte of address.
2819 High digit of low byte of address.
2820 Low digit of low byte of address.
2822 In an End of File record this field con-
2823 sists of either four ascii zeros or the
2824 program entry address. Currently the
2825 entry address option is not supported.
2827 Data Field - This field consists of the actual data,
2828 converted to two ascii characters, high
2829 digit first. There are no data bytes in
2830 the End of File record.
2832 Checksum Field - The checksum field is the 8 bit binary
2833 sum of the record length field, the load
2834 address field, and the data field. This
2835 sum is then complemented (1's comple-
2836 ment) and converted to two ascii
2837 characters, high digit first.
2854 BUILDING ASXXXX AND ASLINK
2859 The assemblers and linker have been successfully compiled us-
2860 ing the DECUS C (PDP-11) compiler (patch level 9) with
2861 RT-11/TSX+, Eyring Research Institute, Inc. PDOS (680x0) C
2862 V5.4b compiler, and Symantec C/C++ V6.1/V7.2.
2864 The device specific header file (i.e. m6800.h, m6801.h,
2865 etc.) contains the DECUS C 'BUILD' directives for generating a
2866 command file to compile, assemble, and link the necessary files
2867 to prepare an executable image for a particular assembler.
2870 3.1 BUILDING AN ASSEMBLER
2873 The building of a typical assembler (6809 for example) re-
2874 quires the following files:
2892 The first five files are the 6809 processor dependent sec-
2893 tions which contain the following:
2898 BUILDING ASXXXX AND ASLINK PAGE 3-2
2899 BUILDING AN ASSEMBLER
2902 1. m6809.h - header file containing the machine specific
2903 definitions of constants, variables, structures, and
2906 2. m09ext - device description, byte order, and file ex-
2909 3. m09pst - a table of the assembler general directives,
2910 special device directives, and assembler mnemonics with
2911 associated operation codes
2913 4. m09mch / m09adr - machine specific code for processing
2914 the device mnemonics, addressing modes, and special
2918 The remaining nine files provide the device independent sec-
2919 tions which handle the details of file input/output, symbol
2920 table generation, program/data areas, expression analysis, and
2921 assembler directive processing.
2927 The building of the linker requires the following files:
2965 A.1 6800 REGISTER SET
2967 The following is a list of the 6800 registers used by AS6800:
2969 a,b - 8-bit accumulators
2973 A.2 6800 INSTRUCTION SET
2976 The following tables list all 6800/6802/6808 mnemonics recog-
2977 nized by the AS6800 assembler. The designation [] refers to a
2978 required addressing mode argument. The following list specifies
2979 the format for each addressing mode supported by AS6800:
2981 #data immediate data
2984 *dir direct page addressing
2985 (see .setdp directive)
2986 0 <= dir <= 255
2988 ,x register indirect addressing
2991 offset,x register indirect addressing
2992 0 <= offset <= 255
2994 ext extended addressing
2998 The terms data, dir, offset, ext, and label may all be expres-
3003 AS6800 ASSEMBLER PAGE A-2
3004 6800 INSTRUCTION SET
3007 Note that not all addressing modes are valid with every in-
3008 struction, refer to the 6800 technical data for valid modes.
3011 A.2.1 Inherent Instructions
3033 A.2.2 Branch Instructions
3046 AS6800 ASSEMBLER PAGE A-3
3047 6800 INSTRUCTION SET
3050 A.2.3 Single Operand Instructions
3101 AS6800 ASSEMBLER PAGE A-4
3102 6800 INSTRUCTION SET
3105 A.2.4 Double Operand Instructions
3141 A.2.5 Jump and Jump to Subroutine Instructions
3148 AS6800 ASSEMBLER PAGE A-5
3149 6800 INSTRUCTION SET
3152 A.2.6 Long Register Instructions
3179 B.1 .hd6303 DIRECTIVE
3185 The .hd6303 directive enables processing of the HD6303 specific
3186 mnemonics not included in the 6801 instruction set. HD6303
3187 mnemonics encountered without the .hd6303 directive will be
3188 flagged with an 'o' error.
3191 B.2 6801 REGISTER SET
3193 The following is a list of the 6801 registers used by AS6801:
3195 a,b - 8-bit accumulators
3196 d - 16-bit accumulator <a:b>
3200 B.3 6801 INSTRUCTION SET
3203 The following tables list all 6801/6303 mnemonics recognized
3204 by the AS6801 assembler. The designation [] refers to a re-
3205 quired addressing mode argument. The following list specifies
3206 the format for each addressing mode supported by AS6801:
3208 #data immediate data
3211 *dir direct page addressing
3212 (see .setdp directive)
3213 0 <= dir <= 255
3217 AS6801 ASSEMBLER PAGE B-2
3218 6801 INSTRUCTION SET
3221 ,x register indirect addressing
3224 offset,x register indirect addressing
3225 0 <= offset <= 255
3227 ext extended addressing
3231 The terms data, dir, offset, ext, and label may all be expres-
3234 Note that not all addressing modes are valid with every in-
3235 struction, refer to the 6801/6303 technical data for valid
3239 B.3.1 Inherent Instructions
3257 B.3.2 Branch Instructions
3271 AS6801 ASSEMBLER PAGE B-3
3272 6801 INSTRUCTION SET
3275 B.3.3 Single Operand Instructions
3329 AS6801 ASSEMBLER PAGE B-4
3330 6801 INSTRUCTION SET
3342 B.3.4 Double Operand Instructions
3347 adda [] addb [] addd []
3348 add a [] add b [] add d []
3371 suba [] subb [] subd []
3372 sub a [] sub b [] sub d []
3377 AS6801 ASSEMBLER PAGE B-5
3378 6801 INSTRUCTION SET
3381 B.3.5 Jump and Jump to Subroutine Instructions
3386 B.3.6 Long Register Instructions
3394 B.3.7 6303 Specific Instructions
3396 aim #data, [] eim #data, []
3397 oim #data, [] tim #data, []
3421 Requires the .setdp directive to specify the ram area.
3424 C.1 6804 REGISTER SET
3426 The following is a list of the 6804 registers used by AS6804:
3428 x,y - index registers
3431 C.2 6804 INSTRUCTION SET
3434 The following tables list all 6804 mnemonics recognized by
3435 the AS6804 assembler. The designation [] refers to a required
3436 addressing mode argument. The following list specifies the
3437 format for each addressing mode supported by AS6804:
3439 #data immediate data
3442 ,x register indirect addressing
3444 dir direct addressing
3445 (see .setdp directive)
3446 0 <= dir <= 255
3448 ext extended addressing
3452 The terms data, dir, and ext may be expressions. The label for
3453 the short branchs beq, bne, bcc, and bcs must not be external.
3455 Note that not all addressing modes are valid with every in-
3456 struction, refer to the 6804 technical data for valid modes.
3459 AS6804 ASSEMBLER PAGE C-2
3460 6804 INSTRUCTION SET
3463 C.2.1 Inherent Instructions
3474 C.2.2 Branch Instructions
3480 C.2.3 Single Operand Instructions
3492 C.2.4 Jump and Jump to Subroutine Instructions
3498 C.2.5 Bit Test Instructions
3500 brclr #data,[],label
3501 brset #data,[],label
3509 AS6804 ASSEMBLER PAGE C-3
3510 6804 INSTRUCTION SET
3513 C.2.6 Load Immediate data Instruction
3518 C.2.7 6804 Derived Instructions
3565 D.1 6805 REGISTER SET
3567 The following is a list of the 6805 registers used by AS6805:
3569 a - 8-bit accumulator
3573 D.2 6805 INSTRUCTION SET
3576 The following tables list all 6805 mnemonics recognized by
3577 the AS6805 assembler. The designation [] refers to a required
3578 addressing mode argument. The following list specifies the
3579 format for each addressing mode supported by AS6805:
3581 #data immediate data
3584 *dir direct page addressing
3585 (see .setdp directive)
3586 0 <= dir <= 255
3588 ,x register indirect addressing
3591 offset,x register indirect addressing
3592 0 <= offset <= 255 --- byte mode
3593 256 <= offset <= 65535 --- word mode
3594 (an externally defined offset uses the
3597 ext extended addressing
3603 AS6805 ASSEMBLER PAGE D-2
3604 6805 INSTRUCTION SET
3607 The terms data, dir, offset, and ext may all be expressions.
3609 Note that not all addressing modes are valid with every in-
3610 struction, refer to the 6805 technical data for valid modes.
3613 D.2.1 Control Instructions
3624 D.2.2 Bit Manipulation Instructions
3626 brset #data,*dir,label
3627 brclr #data,*dir,label
3633 D.2.3 Branch Instructions
3639 bhcc label bhcs label
3646 AS6805 ASSEMBLER PAGE D-3
3647 6805 INSTRUCTION SET
3650 D.2.4 Read-Modify-Write Instructions
3686 D.2.5 Register\Memory Instructions
3697 AS6805 ASSEMBLER PAGE D-4
3698 6805 INSTRUCTION SET
3701 D.2.6 Jump and Jump to Subroutine Instructions
3726 E.1 68HC08 REGISTER SET
3728 The following is a list of the 68HC08 registers used by
3731 a - 8-bit accumulator
3732 x - index register <H:X>
3736 E.2 68HC08 INSTRUCTION SET
3739 The following tables list all 68HC08 mnemonics recognized by
3740 the AS6808 assembler. The designation [] refers to a required
3741 addressing mode argument. The following list specifies the
3742 format for each addressing mode supported by AS6808:
3744 #data immediate data
3747 *dir direct page addressing
3748 (see .setdp directive)
3749 0 <= dir <= 255
3751 ,x register indexed addressing
3754 offset,x register indexed addressing
3755 0 <= offset <= 255 --- byte mode
3756 256 <= offset <= 65535 --- word mode
3757 (an externally defined offset uses the
3760 ,x+ register indexed addressing
3761 zero offset with post increment
3764 AS6808 ASSEMBLER PAGE E-2
3765 68HC08 INSTRUCTION SET
3769 offset,x+ register indexed addressing
3770 unsigned byte offset with post increment
3772 offset,s stack pointer indexed addressing
3773 0 <= offset <= 255 --- byte mode
3774 256 <= offset <= 65535 --- word mode
3775 (an externally defined offset uses the
3778 ext extended addressing
3782 The terms data, dir, offset, and ext may all be expressions.
3784 Note that not all addressing modes are valid with every in-
3785 struction, refer to the 68HC08 technical data for valid modes.
3788 E.2.1 Control Instructions
3799 E.2.2 Bit Manipulation Instructions
3801 brset #data,*dir,label
3802 brclr #data,*dir,label
3808 AS6808 ASSEMBLER PAGE E-3
3809 68HC08 INSTRUCTION SET
3812 E.2.3 Branch Instructions
3818 bhcc label bhcs label
3827 E.2.4 Complex Branch Instructions
3837 AS6808 ASSEMBLER PAGE E-4
3838 68HC08 INSTRUCTION SET
3841 E.2.5 Read-Modify-Write Instructions
3884 AS6808 ASSEMBLER PAGE E-5
3885 68HC08 INSTRUCTION SET
3888 E.2.6 Register\Memory Instructions
3899 E.2.7 Double Operand Move Instruction
3904 E.2.8 16-Bit <H:X> Index Register Instructions
3911 E.2.9 Jump and Jump to Subroutine Instructions
3936 F.1 6809 REGISTER SET
3938 The following is a list of the 6809 registers used by AS6809:
3940 a,b - 8-bit accumulators
3941 d - 16-bit accumulator <a:b>
3942 x,y - index registers
3943 s,u - stack pointers
3944 pc - program counter
3949 F.2 6809 INSTRUCTION SET
3952 The following tables list all 6809 mnemonics recognized by
3953 the AS6809 assembler. The designation [] refers to a required
3954 addressing mode argument. The following list specifies the
3955 format for each addressing mode supported by AS6809:
3957 #data immediate data
3960 *dir direct page addressing
3961 (see .setdp directive)
3962 0 <= dir <= 255
3967 cc,a,b,d,dp,x,y,s,u,pc
3969 ,-x ,--x register indexed
3974 AS6809 ASSEMBLER PAGE F-2
3975 6809 INSTRUCTION SET
3978 ,x+ ,x++ register indexed
3981 ,x register indexed addressing
3984 offset,x register indexed addressing
3985 -16 <= offset <= 15 --- 5-bit
3986 -128 <= offset <= -17 --- 8-bit
3987 16 <= offset <= 127 --- 8-bit
3988 -32768 <= offset <= -129 --- 16-bit
3989 128 <= offset <= 32767 --- 16-bit
3990 (external definition of offset
3993 a,x accumulator offset indexed addressing
3995 ext extended addressing
3997 ext,pc pc addressing ( pc <- pc + ext )
3999 ext,pcr pc relative addressing
4001 [,--x] register indexed indirect
4004 [,x++] register indexed indirect
4007 [,x] register indexed indirect addressing
4010 [offset,x] register indexed indirect addressing
4011 -128 <= offset <= 127 --- 8-bit
4012 -32768 <= offset <= -129 --- 16-bit
4013 128 <= offset <= 32767 --- 16-bit
4014 (external definition of offset
4017 [a,x] accumulator offset indexed
4020 [ext] extended indirect addressing
4022 [ext,pc] pc indirect addressing
4023 ( [pc <- pc + ext] )
4025 [ext,pcr] pc relative indirect addressing
4027 The terms data, dir, label, offset, and ext may all be expres-
4032 AS6809 ASSEMBLER PAGE F-3
4033 6809 INSTRUCTION SET
4036 Note that not all addressing modes are valid with every in-
4037 struction, refer to the 6809 technical data for valid modes.
4040 F.2.1 Inherent Instructions
4050 F.2.2 Short Branch Instructions
4055 bhis label bhs label
4057 blos label bls label
4065 F.2.3 Long Branch Instructions
4067 lbcc label lbcs label
4068 lbeq label lbge label
4069 lbgt label lbhi label
4070 lbhis label lbhs label
4071 lble label lblo label
4072 lblos label lbls label
4073 lblt label lbmi label
4074 lbne label lbpl label
4075 lbra label lbrn label
4076 lbvc label lbvs label
4080 AS6809 ASSEMBLER PAGE F-4
4081 6809 INSTRUCTION SET
4084 F.2.4 Single Operand Instructions
4123 AS6809 ASSEMBLER PAGE F-5
4124 6809 INSTRUCTION SET
4127 F.2.5 Double Operand Instructions
4152 F.2.6 D-register Instructions
4159 F.2.7 Index/Stack Register Instructions
4177 AS6809 ASSEMBLER PAGE F-6
4178 6809 INSTRUCTION SET
4181 F.2.8 Jump and Jump to Subroutine Instructions
4186 F.2.9 Register - Register Instructions
4191 F.2.10 Condition Code Register Instructions
4193 andcc #data orcc #data
4197 F.2.11 6800 Compatibility Instructions
4237 G.1 68HC11 REGISTER SET
4239 The following is a list of the 68HC11 registers used by AS6811:
4241 a,b - 8-bit accumulators
4242 d - 16-bit accumulator <a:b>
4243 x,y - index registers
4246 G.2 68HC11 INSTRUCTION SET
4249 The following tables list all 68HC11 mnemonics recognized by
4250 the AS6811 assembler. The designation [] refers to a required
4251 addressing mode argument. The following list specifies the
4252 format for each addressing mode supported by AS6811:
4254 #data immediate data
4257 *dir direct page addressing
4258 (see .setdp directive)
4259 0 <= dir <= 255
4261 ,x register indirect addressing
4264 offset,x register indirect addressing
4265 0 <= offset <= 255
4267 ext extended addressing
4271 The terms data, dir, offset, and ext may all be expressions.
4275 AS6811 ASSEMBLER PAGE G-2
4276 68HC11 INSTRUCTION SET
4279 Note that not all addressing modes are valid with every in-
4280 struction, refer to the 68HC11 technical data for valid modes.
4283 G.2.1 Inherent Instructions
4315 G.2.2 Branch Instructions
4329 AS6811 ASSEMBLER PAGE G-3
4330 68HC11 INSTRUCTION SET
4333 G.2.3 Single Operand Instructions
4384 AS6811 ASSEMBLER PAGE G-4
4385 68HC11 INSTRUCTION SET
4388 G.2.4 Double Operand Instructions
4393 adda [] addb [] addd []
4394 add a [] add b [] add d []
4420 suba [] subb [] subd []
4421 sub a [] sub b [] sub d []
4424 G.2.5 Bit Manupulation Instructions
4429 brclr [],#data,label
4430 brset [],#data,label
4435 AS6811 ASSEMBLER PAGE G-5
4436 68HC11 INSTRUCTION SET
4439 G.2.6 Jump and Jump to Subroutine Instructions
4444 G.2.7 Long Register Instructions
4475 H.1 68HC12 REGISTER SET
4477 The following is a list of the 68HC12 registers used by AS6812:
4479 a,b - 8-bit accumulators
4480 d - 16-bit accumulator <a:b>
4481 x,y - index registers
4482 sp,s - stack pointer
4483 pc - program counter
4484 ccr,cc - condition code register
4487 H.2 68HC12 INSTRUCTION SET
4490 The following tables list all 68HC12 mnemonics recognized by
4491 the AS6812 assembler. The designation [] refers to a required
4492 addressing mode argument. The following list specifies the
4493 format for each addressing mode supported by AS6812:
4495 #data immediate data
4498 ext extended addressing
4500 pg memory page number
4502 *dir direct page addressing
4503 (see .setdp directive)
4504 0 <= dir <= 255
4513 AS6812 ASSEMBLER PAGE H-2
4514 68HC12 INSTRUCTION SET
4517 -x x- register indexed, pre or
4518 ,-x ,x- post autodecrement by 1
4520 n,-x n,x- register indexed, pre or
4521 post autodecrement by 1 - 8
4523 +x x+ register indexed, pre or
4524 ,+x ,x+ post autoincrement by 1
4526 n,+x n,x+ register indexed, pre or
4527 post autoincrement by 1 - 8
4529 offset,x register indexed addressing
4530 -16 <= offset <= 15 --- 5-bit
4531 -256 <= offset <= -17 --- 9-bit
4532 16 <= offset <= 255 --- 9-bit
4533 -32768 <= offset <= -257 --- 16-bit
4534 256 <= offset <= 32767 --- 16-bit
4535 (external definition of offset
4538 [offset,x] register indexed indirect addressing
4539 -32768 <= offset <= 32767 --- 16-bit
4541 [,x] register indexed indirect addressing
4544 a,x accumulator offset indexed addressing
4546 [d,x] d accumulator offset indexed
4549 The terms data, dir, label, offset, and ext may all be expres-
4552 Note that not all addressing modes are valid with every in-
4553 struction, refer to the 68HC12 technical data for valid modes.
4556 AS6812 ASSEMBLER PAGE H-3
4557 68HC12 INSTRUCTION SET
4560 H.2.1 Inherent Instructions
4579 H.2.2 Short Branch Instructions
4584 bhis label bhs label
4586 blos label bls label
4594 H.2.3 Long Branch Instructions
4596 lbcc label lbcs label
4597 lbeq label lbge label
4598 lbgt label lbhi label
4599 lbhis label lbhs label
4600 lble label lblo label
4601 lblos label lbls label
4602 lblt label lbmi label
4603 lbne label lbpl label
4604 lbra label lbrn label
4605 lbvc label lbvs label
4608 AS6812 ASSEMBLER PAGE H-4
4609 68HC12 INSTRUCTION SET
4612 H.2.4 Branch on Decrement, Test, or Increment
4614 dbeq r,label dbne r,label
4615 ibeq r,label ibne r,label
4616 tbeq r,label tbne r,label
4619 H.2.5 Bit Clear and Set Instructions
4625 H.2.6 Branch on Bit Clear or Set
4627 brclr [],#data,label
4628 brset [],#data,label
4631 AS6812 ASSEMBLER PAGE H-5
4632 68HC12 INSTRUCTION SET
4635 H.2.7 Single Operand Instructions
4674 AS6812 ASSEMBLER PAGE H-6
4675 68HC12 INSTRUCTION SET
4678 H.2.8 Double Operand Instructions
4692 ldaa [] <=> lda []
4694 ldab [] <=> ldb []
4696 oraa [] <=> ora []
4698 orab [] <=> orb []
4702 staa [] <=> sta []
4704 stab [] <=> stb []
4709 H.2.9 Move Instructions
4711 movb [],[] movw [],[]
4714 H.2.10 D-register Instructions
4717 cpd [] <=> cmpd []
4721 AS6812 ASSEMBLER PAGE H-7
4722 68HC12 INSTRUCTION SET
4725 H.2.11 Index/Stack Register Instructions
4727 cps [] <=> cmps []
4728 cpx [] <=> cmpx []
4729 cpy [] <=> cmpy []
4741 H.2.12 Jump and Jump/Call to Subroutine Instructions
4747 H.2.13 Other Special Instructions
4758 H.2.14 Register - Register Instructions
4764 H.2.15 Condition Code Register Instructions
4766 andcc #data orcc #data
4769 AS6812 ASSEMBLER PAGE H-8
4770 68HC12 INSTRUCTION SET
4773 H.2.16 M68HC11 Compatibility Mode Instructions
4803 I.1 68HC16 REGISTER SET
4805 The following is a list of the 68HC16 registers used by AS6816:
4807 a,b - 8-bit accumulators
4808 d - 16-bit accumulator <a:b>
4809 e - 16-bit accumulator
4810 x,y,z - index registers
4811 k - address extension register
4813 ccr - condition code
4816 I.2 68HC16 INSTRUCTION SET
4819 The following tables list all 68HC16 mnemonics recognized by
4820 the AS6816 assembler. The designation [] refers to a required
4821 addressing mode argument. The following list specifies the
4822 format for each addressing mode supported by AS6816:
4824 #data immediate data
4827 #xo,#yo local immediate data (mac / rmac)
4834 ,x zero offset register indexed addressing
4838 offset,x register indexed addressing
4841 AS6816 ASSEMBLER PAGE I-2
4842 68HC16 INSTRUCTION SET
4845 0 <= offset <= 255 --- 8-bit
4846 -32768 <= offset <= -1 --- 16-bit
4847 256 <= offset <= 32767 --- 16-bit
4848 (external definition of offset
4851 offset,x8 unsigned 8-bit offset indexed addressing
4852 offset,x16 signed 16-bit offset indexed addressing
4854 e,x accumulator offset indexed addressing
4856 ext extended addressing
4858 bank 64K bank number (jmp / jsr)
4860 The terms data, label, offset, bank, and ext may all be expres-
4863 Note that not all addressing modes are valid with every in-
4864 struction, refer to the 6816 technical data for valid modes.
4867 I.2.1 Inherent Instructions
4873 ediv edivs emul emuls
4874 fdiv fmuls idiv ldhi
4876 pshb pshmac pula pulb
4893 AS6816 ASSEMBLER PAGE I-3
4894 68HC16 INSTRUCTION SET
4897 I.2.2 Push/Pull Multiple Register Instructions
4899 pshm r,... pulm r,...
4902 I.2.3 Short Branch Instructions
4907 bhis label bhs label
4909 blos label bls label
4917 I.2.4 Long Branch Instructions
4919 lbcc label lbcs label
4920 lbeq label lbge label
4921 lbgt label lbhi label
4922 lbhis label lbhs label
4923 lble label lblo label
4924 lblos label lbls label
4925 lblt label lbmi label
4926 lbne label lbpl label
4927 lbra label lbrn label
4928 lbvc label lbvs label
4932 I.2.5 Bit Manipulation Instructions
4937 brclr [],#data,label
4938 brset [],#data,label
4941 AS6816 ASSEMBLER PAGE I-4
4942 68HC16 INSTRUCTION SET
4945 I.2.6 Single Operand Instructions
4998 AS6816 ASSEMBLER PAGE I-5
4999 68HC16 INSTRUCTION SET
5002 I.2.7 Double Operand Instructions
5037 I.2.8 Index/Stack Register Instructions
5049 AS6816 ASSEMBLER PAGE I-6
5050 68HC16 INSTRUCTION SET
5053 I.2.9 Jump and Jump to Subroutine Instructions
5055 jmp bank,[] jsr bank,[]
5058 I.2.10 Condition Code Register Instructions
5060 andp #data orp #data
5063 I.2.11 Multiply and Accumulate Instructions
5065 mac #data rmac #data
5066 mac #xo,#yo rmac #xo,#yo
5089 J.1 H8/3XX REGISTER SET
5091 The following is a list of the H8 registers used by ASH8:
5093 r0 - r7,sp 16-bit accumulators
5094 r0L - r7L,spL 8-bit accumulators
5095 r0H - r7H,spH 8-bit accumulators
5096 spL,spH,sp stack pointers
5100 J.2 H8/3XX INSTRUCTION SET
5103 The following tables list all H8/3xx mnemonics recognized by
5104 the ASH8 assembler. The designation [] refers to a required ad-
5105 dressing mode argument. The following list specifies the format
5106 for each addressing mode supported by ASH8:
5108 #xx:3 immediate data (3 bit)
5109 #xx:8 immediate data (8 bit)
5110 #xx:16 immediate data (16 bit)
5112 *dir direct page addressing
5113 (see .setdp directive)
5114 0xFF00 <= dir <= 0xFFFF
5119 rn registers (16 bit)
5122 rnB registers (8 bit)
5123 r0H-r7H,r0L-r7L,spH,spL
5127 ASH8 ASSEMBLER PAGE J-2
5128 H8/3XX INSTRUCTION SET
5131 ccr condition code register
5133 @rn register indirect
5135 @-rn register indirect (auto pre-decrement)
5137 @rn+ register indirect (auto post-increment)
5139 @[offset,rn] register indirect, 16-bit displacement
5141 @@offset memory indirect, (8-bit address)
5143 ext extended addressing (16-bit)
5145 The terms data, dir, label, offset, and ext may all be expres-
5148 Note that not all addressing modes are valid with every in-
5149 struction, refer to the H8/3xx technical data for valid modes.
5152 J.2.1 Inherent Instructions
5161 J.2.2 Branch Instructions
5166 bhi label bhis label
5168 blo label blos label
5177 ASH8 ASSEMBLER PAGE J-3
5178 H8/3XX INSTRUCTION SET
5181 J.2.3 Single Operand Instructions
5210 rotxl.b rnB rotxr.b rnB
5212 rotl.b rnB rotr.b rnB
5214 shal.b rnB shar.b rnB
5216 shll.b rnB shlr.b rnB
5221 ASH8 ASSEMBLER PAGE J-4
5222 H8/3XX INSTRUCTION SET
5225 J.2.4 Double Operand Instructions
5229 add rnB,rnB add #xx:8,rnB
5231 adds #1,rn adds #2,rn
5232 addx rnB,rnB addx #xx:8,rnB
5234 cmp rnB,rnB cmp #xx:8,rnB
5239 subs #1,rn subs #2,rn
5240 subx rnB,rnB subx #xx:8,rnB
5242 and rnB,rnB and #xx:8,rnB
5245 or rnB,rnB or #xx:8,rnB
5248 xor rnB,rnB xor #xx:8,rnB
5254 add.b rnB,rnB add.b #xx:8,rnB
5257 cmp.b rnB,rnB cmp.b #xx:8,rnB
5263 addx.b rnB,rnB addx.b #xx:8,rnB
5265 and.b rnB,rnB and.b #xx:8,rnB
5268 or.b rnB,rnB or.b #xx:8,rnB
5271 subx.b rnB,rnB subx.b #xx:8,rnB
5273 xor.b rnB,rnB xor.b #xx:8,rnB
5277 ASH8 ASSEMBLER PAGE J-5
5278 H8/3XX INSTRUCTION SET
5281 J.2.5 Mov Instructions
5285 mov rnB,rnB mov rn,rn
5286 mov #xx:8,rnB mov #xx:16,rn
5287 mov @rn,rnB mov @rn,rn
5288 mov @[offset,rn],rnB mov @[offset,rn],rn
5289 mov @rn+,rnB mov @rn+,rn
5294 mov @label,rnB mov @label,rn
5295 mov label,rnB mov label,rn
5296 mov rnB,@rn mov rn,@rn
5297 mov rnB,@[offset,rn] mov rn,@[offset,rn]
5298 mov rnB,@-rn mov rn,@-rn
5303 mov rnB,@label mov rn,@label
5304 mov rnB,label mov rn,label
5309 mov.b rnB,rnB mov.w rn,rn
5310 mov.b #xx:8,rnB mov.w #xx:16,rn
5311 mov.b @rn,rnB mov.w @rn,rn
5312 mov.b @[offset,rn],rnB mov.w @[offset,rn],rn
5313 mov.b @rn+,rnB mov.w @rn+,rn
5318 mov.b @label,rnB mov.w @label,rn
5319 mov.b label,rnB mov.w label,rn
5320 mov.b rnB,@rn mov.w rn,@rn
5321 mov.b rnB,@[offset,rn] mov.w rn,@[offset,rn]
5322 mov.b rnB,@-rn mov.w rn,@-rn
5327 mov.b rnB,@label mov.w rn,@label
5328 mov.b rnB,label mov.w rn,label
5331 ASH8 ASSEMBLER PAGE J-6
5332 H8/3XX INSTRUCTION SET
5335 J.2.6 Bit Manipulation Instructions
5337 bld #xx:3,rnB bld #xx:3,@rn
5338 bld #xx:3,@dir bld #xx:3,dir
5339 bld #xx:3,*@dir bld #xx:3,*dir
5341 bild #xx:3,rnB bild #xx:3,@rn
5342 bild #xx:3,@dir bild #xx:3,dir
5343 bild #xx:3,*@dir bild #xx:3,*dir
5345 bst #xx:3,rnB bst #xx:3,@rn
5346 bst #xx:3,@dir bst #xx:3,dir
5347 bst #xx:3,*@dir bst #xx:3,*dir
5349 bist #xx:3,rnB bist #xx:3,@rn
5350 bist #xx:3,@dir bist #xx:3,dir
5351 bist #xx:3,*@dir bist #xx:3,*dir
5353 band #xx:3,rnB band #xx:3,@rn
5354 band #xx:3,@dir band #xx:3,dir
5355 band #xx:3,*@dir band #xx:3,*dir
5357 biand #xx:3,rnB biand #xx:3,@rn
5358 biand #xx:3,@dir biand #xx:3,dir
5359 biand #xx:3,*@dir biand #xx:3,*dir
5361 bor #xx:3,rnB bor #xx:3,@rn
5362 bor #xx:3,@dir bor #xx:3,dir
5363 bor #xx:3,*@dir bor #xx:3,*dir
5365 bior #xx:3,rnB bior #xx:3,@rn
5366 bior #xx:3,@dir bior #xx:3,dir
5367 bior #xx:3,*@dir bior #xx:3,*dir
5369 bxor #xx:3,rnB bxor #xx:3,@rn
5370 bxor #xx:3,@dir bxor #xx:3,dir
5371 bxor #xx:3,*@dir bxor #xx:3,*dir
5373 bixor #xx:3,rnB bixor #xx:3,@rn
5374 bixor #xx:3,@dir bixor #xx:3,dir
5375 bixor #xx:3,*@dir bixor #xx:3,*dir
5378 ASH8 ASSEMBLER PAGE J-7
5379 H8/3XX INSTRUCTION SET
5382 J.2.7 Extended Bit Manipulation Instructions
5384 bset #xx:3,rnB bset #xx:3,@rn
5385 bset #xx:3,@dir bset #xx:3,dir
5386 bset #xx:3,*@dir bset #xx:3,*dir
5387 bset rnB,rnB bset rnB,@rn
5388 bset rnB,@dir bset rnB,dir
5389 bset rnB,*@dir bset rnB,*dir
5391 bclr #xx:3,rnB bclr #xx:3,@rn
5392 bclr #xx:3,@dir bclr #xx:3,dir
5393 bclr #xx:3,*@dir bclr #xx:3,*dir
5394 bclr rnB,rnB bclr rnB,@rn
5395 bclr rnB,@dir bclr rnB,dir
5396 bclr rnB,*@dir bclr rnB,*dir
5398 bnot #xx:3,rnB bnot #xx:3,@rn
5399 bnot #xx:3,@dir bnot #xx:3,dir
5400 bnot #xx:3,*@dir bnot #xx:3,*dir
5401 bnot rnB,rnB bnot rnB,@rn
5402 bnot rnB,@dir bnot rnB,dir
5403 bnot rnB,*@dir bnot rnB,*dir
5405 btst #xx:3,rnB btst #xx:3,@rn
5406 btst #xx:3,@dir btst #xx:3,dir
5407 btst #xx:3,*@dir btst #xx:3,*dir
5408 btst rnB,rnB btst rnB,@rn
5409 btst rnB,@dir btst rnB,dir
5410 btst rnB,*@dir btst rnB,*dir
5413 J.2.8 Condition Code Instructions
5415 andc #xx:8,ccr andc #xx:8
5416 and #xx:8,ccr and.b #xx:8,ccr
5418 ldc #xx:8,ccr ldc #xx:8
5421 orc #xx:8,ccr orc #xx:8
5422 or #xx:8,ccr or.b #xx:8,ccr
5424 xorc #xx:8,ccr xorc #xx:8
5425 xor #xx:8,ccr xor.b #xx:8,ccr
5430 ASH8 ASSEMBLER PAGE J-8
5431 H8/3XX INSTRUCTION SET
5434 J.2.9 Other Instructions
5436 divxu rnB,rn divxu.b rnB,rn
5438 mulxu rnB,rn mulxu.b rnB,rn
5440 movfpe @label,rnB movfpe label,rnB
5441 movfpe.b @label,rnB movfpe.b label,rnB
5443 movtpe @label,rnB movtpe label,rnB
5444 movtpe.b @label,rnB movtpe.b label,rnB
5447 J.2.10 Jump and Jump to Subroutine Instructions
5450 jmp @label jmp label
5453 jsr @label jsr label
5479 Thanks to John Hartman for his contribution of the AS8051
5483 jhartman@compuserve.com
5486 K.2 8051 REGISTER SET
5488 The following is a list of the 8051 registers used by AS8051:
5490 a,b - 8-bit accumulators
5491 r0,r1,r2,r3 - 8-bit registers
5495 pc - program counter
5497 c - carry (bit in status word)
5500 AS8051 ASSEMBLER PAGE K-2
5504 K.3 8051 INSTRUCTION SET
5507 The following tables list all 8051 mnemonics recognized by
5508 the AS8051 assembler. The following list specifies the format
5509 for each addressing mode supported by AS8051:
5511 #data immediate data
5514 r,r1,r2 register r0,r1,r2,r3,r4,r5,r6, or r7
5516 @r indirect on register r0 or r1
5517 @dptr indirect on data pointer
5518 @a+dptr indirect on accumulator
5520 @a+pc indirect on accumulator
5521 plus program counter
5523 addr direct memory address
5527 label call or jump label
5529 The terms data, addr, bitaddr, and label may all be expressions.
5531 Note that not all addressing modes are valid with every in-
5532 struction. Refer to the 8051 technical data for valid modes.
5535 K.3.1 Inherent Instructions
5540 AS8051 ASSEMBLER PAGE K-3
5541 8051 INSTRUCTION SET
5544 K.3.2 Move Instructions
5546 mov a,#data mov a,addr
5549 mov r,#data mov r,addr
5552 mov addr,a mov addr,#data
5553 mov addr,r mov addr,@r
5554 mov addr1,addr2 mov bitaddr,c
5556 mov @r,#data mov @r,addr
5562 movc a,@a+dptr movc a,@a+pc
5563 movx a,@dptr movx a,@r
5564 movx @dptr,a movx @r,a
5567 K.3.3 Single Operand Instructions
5590 AS8051 ASSEMBLER PAGE K-4
5591 8051 INSTRUCTION SET
5594 K.3.4 Two Operand Instructions
5596 add a,#data add a,addr
5598 addc a,#data addc a,addr
5600 subb a,#data subb a,addr
5602 orl a,#data orl a,addr
5604 orl addr,a orl addr,#data
5605 orl c,bitaddr orl c,/bitaddr
5606 anl a,#data anl a,addr
5608 anl addr,a anl addr,#data
5609 anl c,bitaddr anl c,/bitaddr
5610 xrl a,#data xrl a,addr
5612 xrl addr,a xrl addr,#data
5613 xrl c,bitaddr xrl c,/bitaddr
5618 K.3.5 Call and Return Instructions
5620 acall label lcall label
5627 K.3.6 Jump Instructions
5630 cjne a,#data,label cjne a,addr,label
5631 cjne r,#data,label cjne @r,#data,label
5632 djnz r,label djnz addr,label
5634 jb bitadr,label jnb bitadr,label
5638 ljmp label sjmp label
5641 AS8051 ASSEMBLER PAGE K-5
5642 8051 INSTRUCTION SET
5645 K.3.7 Predefined Symbols: SFR Map
5647 --------- 4 Bytes ----------
5662 C8 [ T2CON RCAP2L RCAP2H ] CB
5678 88 TCON TMOD TL0 TL1 8B
5682 [...] Indicates Resident in 8052, not 8051
5685 AS8051 ASSEMBLER PAGE K-6
5686 8051 INSTRUCTION SET
5689 K.3.8 Predefined Symbols: SFR Bit Addresses
5691 ---------- 4 BITS ----------
5695 F4 B.4 B.5 B.6 B.7 F7
5696 F0 B.0 B.1 B.2 B.3 F3
5699 E4 ACC.4 ACC.5 ACC.6 ACC.7 E7
5700 E0 ACC.0 ACC.1 ACC.2 ACC.3 E3
5703 D4 PSW.4 PSW.5 PSW.6 PSW.7 D7
5704 D0 PSW.0 PSW.1 PSW.2 PSW.3 D3
5705 CC [ T2CON.4 T2CON.5 T2CON.6 T2CON.7 ] CF
5706 C8 [ T2CON.0 T2CON.1 T2CON.2 T2CON.3 ] CB
5709 BC IP.4 IP.5 IP.6 IP.7 BF
5710 B8 IP.0 IP.1 IP.2 IP.3 BB
5711 B4 P3.4 P3.5 P3.6 P3.7 B7
5712 B0 P3.0 P3.1 P3.2 P3.3 B3
5713 AC IE.4 IE.5 EI.6 IE.7 AF
5714 A8 IE.0 IE.1 IE.2 IE.3 AB
5715 A4 P2.4 P2.5 P2.6 P2.7 A7
5716 A0 P2.0 P2.1 P2.2 P2.3 A3
5717 9C SCON.4 SCON.5 SCON.6 SCON.7 9F
5718 98 SCON.0 SCON.1 SCON.2 SCON.3 9B
5719 94 P1.4 P1.5 P1.6 P1.7 97
5720 90 P1.0 P1.1 P1.2 P1.3 93
5721 8C TCON.4 TCON.5 TCON.6 TCON.7 8F
5722 88 TCON.0 TCON.1 TCON.2 TCON.3 8B
5723 84 P0.4 P0.5 P0.6 P0.7 87
5724 80 P0.0 P0.1 P0.2 P0.3 83
5726 [...] Indicates Resident in 8052, not 8051
5729 AS8051 ASSEMBLER PAGE K-7
5730 8051 INSTRUCTION SET
5733 K.3.9 Predefined Symbols: Control Bits
5735 ---------- 4 BITS ----------
5749 CC [ TLCK RCLK EXF2 TF2 ] CF
5750 C8 [ CPRL2 CT2 TR2 EXEN2 ] CB
5754 B8 PX0 PT0 PX1 PT1 BB
5756 B0 RXD TXD INT0 INT1 B3
5758 A8 EX0 ET0 EX1 ET1 AB
5761 9C REN SM2 SM1 SM0 9F
5765 8C TR0 TF0 TR1 TF1 8F
5766 88 IT0 IE0 IT1 IE1 8B
5770 [...] Indicates Resident in 8052, not 8051
5793 L.1 8085 REGISTER SET
5795 The following is a list of the 8080/8085 registers used by
5798 a,b,c,d,e,h,l - 8-bit accumulators
5799 m - memory through (hl)
5804 L.2 8085 INSTRUCTION SET
5807 The following tables list all 8080/8085 mnemonics recognized
5808 by the AS8085 assembler. The following list specifies the
5809 format for each addressing mode supported by AS8085:
5811 #data immediate data
5814 r,r1,r2 register or register pair
5818 m memory address using (hl)
5820 addr direct memory addressing
5822 label call or jump label
5824 The terms data, m, addr, and label may be expressions.
5826 Note that not all addressing modes are valid with every in-
5827 struction, refer to the 8080/8085 technical data for valid
5831 AS8085 ASSEMBLER PAGE L-2
5832 8085 INSTRUCTION SET
5835 L.2.1 Inherent Instructions
5849 L.2.2 Register/Memory/Immediate Instructions
5851 adc r adc m aci #data
5852 add r add m adi #data
5853 ana r ana m ani #data
5854 cmp r cmp m cpi #data
5855 ora r ora m ori #data
5856 sbb r sbb m sbi #data
5857 sub r sub m sui #data
5858 xra r xra m xri #data
5861 L.2.3 Call and Return Instructions
5874 L.2.4 Jump Instructions
5887 AS8085 ASSEMBLER PAGE L-3
5888 8085 INSTRUCTION SET
5891 L.2.5 Input/Output/Reset Instructions
5898 L.2.6 Move Instructions
5908 L.2.7 Other Instructions
5950 The .hd64 directive enables processing of the HD64180 specific
5951 mnemonics not included in the Z80 instruction set. HD64180
5952 mnemonics encountered without the .hd64 directive will be
5953 flagged with an 'o' error.
5956 M.2 Z80 REGISTER SET AND CONDITIONS
5959 The following is a complete list of register designations and
5960 condition mnemonics:
5962 byte registers - a,b,c,d,e,h,l,i,r
5963 register pairs - af,af',bc,de,hl
5964 word registers - pc,sp,ix,iy
5968 NC - carry bit clear
5978 ASZ80 ASSEMBLER PAGE M-2
5982 M.3 Z80 INSTRUCTION SET
5985 The following tables list all Z80/HD64180 mnemonics recog-
5986 nized by the ASZ80 assembler. The designation [] refers to a
5987 required addressing mode argument. The following list specifies
5988 the format for each addressing mode supported by ASZ80:
5990 #data immediate data
6001 (hl) implied addressing or
6002 register indirect addressing
6004 (label) direct addressing
6006 offset(ix) indexed addressing with
6009 label call/jmp/jr label
6011 The terms data, dir, offset, and ext may all be expressions.
6012 The terms dir and offset are not allowed to be external refer-
6015 Note that not all addressing modes are valid with every in-
6016 struction, refer to the Z80/HD64180 technical data for valid
6020 ASZ80 ASSEMBLER PAGE M-3
6024 M.3.1 Inherent Instructions
6039 M.3.2 Implicit Operand Instructions
6060 ASZ80 ASSEMBLER PAGE M-4
6064 M.3.3 Load Instruction
6069 ld (label),a ld a,(label)
6070 ld (label),rp ld rp,(label)
6074 ld sp,iy ld rp,#data
6080 M.3.4 Call/Return Instructions
6084 call NC,label ret NC
6085 call NZ,label ret NZ
6087 call PE,label ret PE
6088 call PO,label ret PO
6093 M.3.5 Jump and Jump to Subroutine Instructions
6095 jp C,label jp M,label
6096 jp NC,label jp NZ,label
6097 jp P,label jp PE,label
6098 jp PO,label jp Z,label
6105 jr C,label jr NC,label
6106 jr NZ,label jr Z,label
6110 ASZ80 ASSEMBLER PAGE M-5
6114 M.3.6 Bit Manipulation Instructions
6121 M.3.7 Interrupt Mode and Reset Instructions
6129 M.3.8 Input and Output Instructions
6135 out (n),a out (c),rg
6140 M.3.9 Register Pair Instructions
6147 ex (sp),hl ex (sp),ix
6155 ASZ80 ASSEMBLER PAGE M-6
6159 M.3.10 HD64180 Specific Instructions
6199 Thanks to Marko Makela for his contribution of the AS6500
6206 Internet: Marko.Makela@Helsinki.Fi
6207 EARN/BitNet: msmakela@finuh
6209 Several additions and modifications were made to his code to
6210 support the following families of 6500 processors:
6212 (1) 650X and 651X processor family
6213 (2) 65F11 and 65F12 processor family
6214 (3) 65C00/21 and 65C29 processor family
6215 (4) 65C02, 65C102, and 65C112 processor family
6217 The instruction syntax of this cross assembler contains two
6218 peculiarities: (1) the addressing indirection is denoted by the
6219 square brackets [] and (2) the `bbrx' and `bbsx' instructions
6220 are written `bbr0 memory,label'.
6225 AS6500 ASSEMBLER PAGE N-2
6229 N.2 6500 REGISTER SET
6231 The following is a list of the 6500 registers used by AS6500:
6233 a - 8-bit accumulator
6234 x,y - index registers
6237 N.3 6500 INSTRUCTION SET
6240 The following tables list all 6500 family mnemonics recog-
6241 nized by the AS6500 assembler. The designation [] refers to a
6242 required addressing mode argument. The following list specifies
6243 the format for each addressing mode supported by AS6500:
6245 #data immediate data
6248 *dir direct page addressing
6249 (see .setdp directive)
6250 0 <= dir <= 255
6252 offset,x indexed addressing
6253 offset,y indexed addressing
6254 address = (offset + (x or y))
6256 [offset,x] pre-indexed indirect addressing
6257 0 <= offset <= 255
6258 address = contents of location
6259 (offset + (x or y)) mod 256
6261 [offset],y post-indexed indirect addressing
6262 address = contents of location at offset
6263 plus the value of the y register
6265 [address] indirect addressing
6267 ext extended addressing
6271 address,label direct page memory location
6273 bbrx and bbsx instruction addressing
6275 The terms data, dir, offset, address, ext, and label may all be
6278 Note that not all addressing modes are valid with every in-
6279 struction, refer to the 65xx technical data for valid modes.
6282 AS6500 ASSEMBLER PAGE N-3
6283 6500 INSTRUCTION SET
6286 N.3.1 Processor Specific Directives
6289 The AS6500 cross assembler has four (4) processor specific
6290 assembler directives which define the target 65xx processor
6293 .r6500 Core 650X and 651X family (default)
6294 .r65f11 Core plus 65F11 and 65F12
6295 .r65c00 Core plus 65C00/21 and 65C29
6296 .r65c02 Core plus 65C02, 65C102, and 65C112
6299 N.3.2 65xx Core Inherent Instructions
6316 N.3.3 65xx Core Branch Instructions
6325 N.3.4 65xx Core Single Operand Instructions
6335 AS6500 ASSEMBLER PAGE N-4
6336 6500 INSTRUCTION SET
6339 N.3.5 65xx Core Double Operand Instructions
6352 N.3.6 65xx Core Jump and Jump to Subroutine Instructions
6357 N.3.7 65xx Core Miscellaneous X and Y Register Instructions
6367 AS6500 ASSEMBLER PAGE N-5
6368 6500 INSTRUCTION SET
6371 N.3.8 65F11 and 65F12 Specific Instructions
6373 bbr0 [],label bbr1 [],label
6374 bbr2 [],label bbr3 [],label
6375 bbr4 [],label bbr5 [],label
6376 bbr6 [],label bbr7 [],label
6378 bbs0 [],label bbs1 [],label
6379 bbs2 [],label bbs3 [],label
6380 bbs4 [],label bbs5 [],label
6381 bbs6 [],label bbs7 [],label
6394 N.3.9 65C00/21 and 65C29 Specific Instructions
6396 bbr0 [],label bbr1 [],label
6397 bbr2 [],label bbr3 [],label
6398 bbr4 [],label bbr5 [],label
6399 bbr6 [],label bbr7 [],label
6401 bbs0 [],label bbs1 [],label
6402 bbs2 [],label bbs3 [],label
6403 bbs4 [],label bbs5 [],label
6404 bbs6 [],label bbs7 [],label
6422 AS6500 ASSEMBLER PAGE N-6
6423 6500 INSTRUCTION SET
6426 N.3.10 65C02, 65C102, and 65C112 Specific Instructions
6428 bbr0 [],label bbr1 [],label
6429 bbr2 [],label bbr3 [],label
6430 bbr4 [],label bbr5 [],label
6431 bbr6 [],label bbr7 [],label
6433 bbs0 [],label bbs1 [],label
6434 bbs2 [],label bbs3 [],label
6435 bbs4 [],label bbs5 [],label
6436 bbs6 [],label bbs7 [],label
6457 Additional addressing modes for the following core instruc-
6458 tions are also available with the 65C02, 65C102, and 65C112 pro-
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