32 ASLINK Relocating Linker
35 CHAPTER 1 THE ASSEMBLER 1-1
36 1.1 THE ASXXXX ASSEMBLERS 1-1
37 1.1.1 Assembly Pass 1 1-2
38 1.1.2 Assembly Pass 2 1-2
39 1.1.3 Assembly Pass 3 1-2
40 1.2 SOURCE PROGRAM FORMAT 1-3
41 1.2.1 Statement Format 1-3
42 1.2.1.1 Label Field 1-3
43 1.2.1.2 Operator Field 1-5
44 1.2.1.3 Operand Field 1-5
45 1.2.1.4 Comment Field 1-6
46 1.3 SYMBOLS AND EXPRESSIONS 1-6
47 1.3.1 Character Set 1-6
48 1.3.2 User-Defined Symbols 1-10
49 1.3.3 Local Symbols 1-11
50 1.3.4 Current Location Counter 1-12
53 1.3.7 Expressions 1-15
54 1.4 GENERAL ASSEMBLER DIRECTIVES 1-16
55 1.4.1 .module Directive 1-16
56 1.4.2 .title Directive 1-17
57 1.4.3 .sbttl Directive 1-17
58 1.4.4 .page Directive 1-17
59 1.4.5 .byte and .db Directives 1-17
60 1.4.6 .word and .dw Directives 1-18
61 1.4.7 .blkb, .blkw, and .ds Directives 1-18
62 1.4.8 .ascii Directive 1-18
63 1.4.9 .ascis Directive 1-19
64 1.4.10 .asciz Directive 1-19
65 1.4.11 .radix Directive 1-20
66 1.4.12 .even Directive 1-20
67 1.4.13 .odd Directive 1-20
68 1.4.14 .area Directive 1-21
69 1.4.15 .org Directive 1-22
70 1.4.16 .globl Directive 1-23
71 1.4.17 .if, .else, and .endif Directives 1-23
72 1.4.18 .include Directive 1-24
73 1.4.19 .setdp Directive 1-25
74 1.5 INVOKING ASXXXX 1-27
77 1.8 SYMBOL TABLE FILE 1-30
80 CHAPTER 2 THE LINKER 2-1
81 2.1 ASLINK RELOCATING LINKER 2-1
82 2.2 INVOKING ASLINK 2-2
83 2.3 LIBRARY PATH(S) AND FILE(S) 2-3
84 2.4 ASLINK PROCESSING 2-4
85 2.5 LINKER INPUT FORMAT 2-5
86 2.5.1 Object Module Format 2-6
100 2.6 LINKER ERROR MESSAGES 2-8
101 2.7 INTEL HEX OUTPUT FORMAT 2-11
102 2.8 MOTORLA S1-S9 OUTPUT FORMAT 2-12
104 CHAPTER 3 BUILDING ASXXXX AND ASLINK 3-1
105 3.1 BUILDING AN ASSEMBLER 3-1
106 3.2 BUILDING ASLINK 3-2
108 APPENDIX A AS6800 ASSEMBLER A-1
109 A.1 6800 REGISTER SET A-1
110 A.2 6800 INSTRUCTION SET A-1
111 A.2.1 Inherent Instructions A-2
112 A.2.2 Branch Instructions A-2
113 A.2.3 Single Operand Instructions A-3
114 A.2.4 Double Operand Instructions A-4
115 A.2.5 Jump and Jump to Subroutine Instructions A-4
116 A.2.6 Long Register Instructions A-5
118 APPENDIX B AS6801 ASSEMBLER B-1
119 B.1 .hd6303 DIRECTIVE B-1
120 B.2 6801 REGISTER SET B-1
121 B.3 6801 INSTRUCTION SET B-1
122 B.3.1 Inherent Instructions B-2
123 B.3.2 Branch Instructions B-2
124 B.3.3 Single Operand Instructions B-3
125 B.3.4 Double Operand Instructions B-4
126 B.3.5 Jump and Jump to Subroutine Instructions B-5
127 B.3.6 Long Register Instructions B-5
128 B.3.7 6303 Specific Instructions B-5
130 APPENDIX C AS6804 ASSEMBLER C-1
131 C.1 6804 REGISTER SET C-1
132 C.2 6804 INSTRUCTION SET C-1
133 C.2.1 Inherent Instructions C-2
134 C.2.2 Branch Instructions C-2
135 C.2.3 Single Operand Instructions C-2
136 C.2.4 Jump and Jump to Subroutine Instructions C-2
137 C.2.5 Bit Test Instructions C-2
138 C.2.6 Load Immediate data Instruction C-3
139 C.2.7 6804 Derived Instructions C-3
141 APPENDIX D AS6805 ASSEMBLER D-1
142 D.1 6805 REGISTER SET D-1
143 D.2 6805 INSTRUCTION SET D-1
144 D.2.1 Control Instructions D-2
145 D.2.2 Bit Manipulation Instructions D-2
146 D.2.3 Branch Instructions D-2
147 D.2.4 Read-Modify-Write Instructions D-3
148 D.2.5 Register\Memory Instructions D-3
155 D.2.6 Jump and Jump to Subroutine Instructions D-4
157 APPENDIX E AS68HC08 ASSEMBLER E-1
158 E.1 68HC08 REGISTER SET E-1
159 E.2 68HC08 INSTRUCTION SET E-1
160 E.2.1 Control Instructions E-2
161 E.2.2 Bit Manipulation Instructions E-2
162 E.2.3 Branch Instructions E-3
163 E.2.4 Complex Branch Instructions E-3
164 E.2.5 Read-Modify-Write Instructions E-4
165 E.2.6 Register\Memory Instructions E-5
166 E.2.7 Double Operand Move Instruction E-5
167 E.2.8 16-Bit <H:X> Index Register Instructions E-5
168 E.2.9 Jump and Jump to Subroutine Instructions E-5
170 APPENDIX F AS6809 ASSEMBLER F-1
171 F.1 6809 REGISTER SET F-1
172 F.2 6809 INSTRUCTION SET F-1
173 F.2.1 Inherent Instructions F-3
174 F.2.2 Short Branch Instructions F-3
175 F.2.3 Long Branch Instructions F-3
176 F.2.4 Single Operand Instructions F-4
177 F.2.5 Double Operand Instructions F-5
178 F.2.6 D-register Instructions F-5
179 F.2.7 Index/Stack Register Instructions F-5
180 F.2.8 Jump and Jump to Subroutine Instructions F-6
181 F.2.9 Register - Register Instructions F-6
182 F.2.10 Condition Code Register Instructions F-6
183 F.2.11 6800 Compatibility Instructions F-6
185 APPENDIX G AS6811 ASSEMBLER G-1
186 G.1 6811 REGISTER SET G-1
187 G.2 6811 INSTRUCTION SET G-1
188 G.2.1 Inherent Instructions G-2
189 G.2.2 Branch Instructions G-2
190 G.2.3 Single Operand Instructions G-3
191 G.2.4 Double Operand Instructions G-4
192 G.2.5 Bit Manupulation Instructions G-4
193 G.2.6 Jump and Jump to Subroutine Instructions G-5
194 G.2.7 Long Register Instructions G-5
196 APPENDIX H AS6816 ASSEMBLER H-1
197 H.1 6816 REGISTER SET H-1
198 H.2 6816 INSTRUCTION SET H-1
199 H.2.1 Inherent Instructions H-2
200 H.2.2 Push/Pull Multiple Register Instructions H-3
201 H.2.3 Short Branch Instructions H-3
202 H.2.4 Long Branch Instructions H-3
203 H.2.5 Bit Manipulation Instructions H-3
204 H.2.6 Single Operand Instructions H-4
205 H.2.7 Double Operand Instructions H-5
206 H.2.8 Index/Stack Register Instructions H-5
213 H.2.9 Jump and Jump to Subroutine Instructions H-6
214 H.2.10 Condition Code Register Instructions H-6
215 H.2.11 Multiply and Accumulate Instructions H-6
217 APPENDIX I ASH8 ASSEMBLER I-1
218 I.1 H8/3XX REGISTER SET I-1
219 I.2 H8/3XX INSTRUCTION SET I-1
220 I.2.1 Inherent Instructions I-2
221 I.2.2 Branch Instructions I-2
222 I.2.3 Single Operand Instructions I-3
223 I.2.4 Double Operand Instructions I-4
224 I.2.5 Mov Instructions I-5
225 I.2.6 Bit Manipulation Instructions I-6
226 I.2.7 Extended Bit Manipulation Instructions I-7
227 I.2.8 Condition Code Instructions I-7
228 I.2.9 Other Instructions I-8
229 I.2.10 Jump and Jump to Subroutine Instructions I-8
231 APPENDIX J AS8085 ASSEMBLER J-1
232 J.1 8085 REGISTER SET J-1
233 J.2 8085 INSTRUCTION SET J-1
234 J.2.1 Inherent Instructions J-2
235 J.2.2 Register/Memory/Immediate Instructions J-2
236 J.2.3 Call and Return Instructions J-2
237 J.2.4 Jump Instructions J-2
238 J.2.5 Input/Output/Reset Instructions J-3
239 J.2.6 Move Instructions J-3
240 J.2.7 Other Instructions J-3
242 APPENDIX K ASZ80 ASSEMBLER K-1
243 K.1 .hd64 DIRECTIVE K-1
244 K.2 Z80 REGISTER SET AND CONDITIONS K-1
245 K.3 Z80 INSTRUCTION SET K-2
246 K.3.1 Inherent Instructions K-3
247 K.3.2 Implicit Operand Instructions K-3
248 K.3.3 Load Instruction K-4
249 K.3.4 Call/Return Instructions K-4
250 K.3.5 Jump and Jump to Subroutine Instructions K-4
251 K.3.6 Bit Manipulation Instructions K-5
252 K.3.7 Interrupt Mode and Reset Instructions K-5
253 K.3.8 Input and Output Instructions K-5
254 K.3.9 Register Pair Instructions K-5
255 K.3.10 HD64180 Specific Instructions K-6
257 APPENDIX L AS6500 ASSEMBLER L-1
258 L.1 ACKNOWLEDGMENT L-1
259 L.2 6500 REGISTER SET L-2
260 L.3 6500 INSTRUCTION SET L-2
261 L.3.1 Processor Specific Directives L-3
262 L.3.2 65xx Core Inherent Instructions L-3
263 L.3.3 65xx Core Branch Instructions L-3
264 L.3.4 65xx Core Single Operand Instructions L-3
271 L.3.5 65xx Core Double Operand Instructions L-4
272 L.3.6 65xx Core Jump and Jump to Subroutine
274 L.3.7 65xx Core Miscellaneous X and Y Register
276 L.3.8 65F11 and 65F12 Specific Instructions L-5
277 L.3.9 65C00/21 and 65C29 Specific Instructions L-5
278 L.3.10 65C02, 65C102, and 65C112 Specific
286 ASxxxx Cross Assemblers, Version 1.7
291 Kent State University
294 Operating System: TSX+, RT-11, PDOS, MS/DOS, Windows 3.x
295 or other supporting K&R C.
299 The ASxxxx Cross Assembler and Linker package (V1.7 November
300 1995) contains cross assemblers for the 6800(6802/6808),
301 6801(hd6303), 6804, 6805, 68HC08, 6809, 6811, 68HC16,
302 8085(8080), z80(hd64180), H8/3xx, and 6500 series microproces-
303 sors. Complete source code is provided with the assem-
304 bler/linker submission.
310 The ASxxxx Cross Assembler and Linker package is available
311 from Kent State University at shop-pdp.kent.edu by "anonymous"
330 The ASxxxx assemblers were written following the style of
331 several cross assemblers found in the Digital Equipment Corpora-
332 tion Users Society (DECUS) distribution of the C programming
333 language. The DECUS code was provided with no documentation as
334 to the input syntax or the output format. Study of the code
335 revealed that the unknown author of the code had attempted to
336 formulate an assembler with attributes similiar to those of the
337 PDP-11 MACRO assembler (without macro's). The incomplete code
338 from the DECUS C distribution has been largely rewritten, only
339 the program structure, and C source file organization remains
340 relatively unchanged. However, I wish to thank the author for
341 his contribution to this set of assemblers.
343 The ASLINK program was written as a companion to the ASxxxx
344 assemblers, its design and implementation was not derived from
347 The ASxxxx assemblers and the ASLINK relocating linker are
348 placed in the Public Domain. Publication or distribution of
349 these programs for non-commercial use is hereby granted with the
350 stipulation that the copyright notice be included with all
353 I would greatly appreciate receiving the details of any
354 changes, additions, or errors pertaining to these programs and
355 will attempt to incorporate any fixes or generally useful
356 changes in a future update to these programs.
361 Kent State University
366 baldwin@shop-pdp.kent.edu
391 1.1 THE ASXXXX ASSEMBLERS
394 The ASxxxx assemblers are a series of microprocessor assem-
395 blers written in the C programming language. Each assembler has
396 a device specific section which includes:
398 1. device description, byte order, and file extension in-
401 2. a table of the assembler general directives, special
402 device directives, assembler mnemonics and associated
405 3. machine specific code for processing the device mnemon-
406 ics, addressing modes, and special directives
408 The device specific information is detailed in the appendices.
410 The assemblers have a common device independent section which
411 handles the details of file input/output, symbol table genera-
412 tion, program/data areas, expression analysis, and assembler
413 directive processing.
415 The assemblers provide the following features:
417 1. Command string control of assembly functions
419 2. Alphabetized, formatted symbol table listing
421 3. Relocatable object modules
423 4. Global symbols for linking object modules
425 5. Conditional assembly directives
429 THE ASSEMBLER PAGE 1-2
430 THE ASXXXX ASSEMBLERS
433 6. Program sectioning directives
436 ASxxxx assembles one or more source files into a single relo-
437 catable ascii object file. The output of the ASxxxx assemblers
438 consists of an ascii relocatable object file(*.rel), an assembly
439 listing file(*.lst), and a symbol file(*.sym).
442 1.1.1 Assembly Pass 1
445 During pass 1, ASxxxx opens all source files and performs a
446 rudimenatry assembly of each source statement. During this pro-
447 cess all symbol tables are built, program sections defined, and
448 number of bytes for each assembled source line is estimated.
450 At the end of pass 1 all undefined symbols may be made global
451 (external) using the ASxxxx switch -g, otherwise undefined sym-
452 bols will be flagged as errors during succeeding passes.
455 1.1.2 Assembly Pass 2
458 During pass 2 the ASxxxx assembler resolves forward refer-
459 ences and determines the number of bytes for each assembled
460 line. The number of bytes used by a particular assembler in-
461 struction may depend upon the addressing mode, whether the in-
462 struction allows multiple forms based upon the relative distance
463 to the addressed location, or other factors. Pass 2 resolves
464 these cases and determines the address of all symbols.
467 1.1.3 Assembly Pass 3
470 Pass 3 by the assembler generates the listing file, the relo-
471 catable output file, and the symbol tables. Also during pass 3
472 the errors will be reported.
474 The relocatable object file is an ascii file containing sym-
475 bol references and definitions, program area definitions, and
476 the relocatable assembled code, the linker ASLINK will use this
477 information to generate an absolute load file (Motorola or Intel
483 THE ASSEMBLER PAGE 1-3
484 SOURCE PROGRAM FORMAT
487 1.2 SOURCE PROGRAM FORMAT
491 1.2.1 Statement Format
494 A source program is composed of assembly-language statements.
495 Each statement must be completed on one line. A line may con-
496 tain a maximum of 128 characters, longer lines are truncated and
499 An ASxxxx assembler statement may have as many as four
500 fields. These fields are identified by their order within the
501 statement and/or by separating characters between fields. The
502 general format of the ASxxxx statement is:
504 [label:] Operator Operand [;Comment(s)]
506 The label and comment fields are optional. The operator and
507 operand fields are interdependent. The operator field may be an
508 assembler directive or an assembly mnemonic. The operand field
509 may be optional or required as defined in the context of the
512 ASxxxx interprets and processes source statements one at a
513 time. Each statement causes a particular operation to be per-
517 1.2.1.1 Label Field -
519 A label is a user-defined symbol which is assigned the value
520 of the current location counter and entered into the user de-
521 fined symbol table. The current location counter is used by
522 ASxxxx to assign memory addresses to the source program state-
523 ments as they are encountered during the assembly process. Thus
524 a label is a means of symbolically referring to a specific
527 When a program section is absolute, the value of the current
528 location counter is absolute; its value references an absolute
529 memory address. Similarly, when a program section is relocat-
530 able, the value of the current location counter is relocatable.
531 A relocation bias calculated at link time is added to the ap-
532 parent value of the current location counter to establish its
533 effective absolute address at execution time. (The user can
534 also force the linker to relocate sections defined as absolute.
535 This may be required under special circumstances.)
537 If present, a label must be the first field in a source
538 statement and must be terminated by a colon (:). For example,
541 THE ASSEMBLER PAGE 1-4
542 SOURCE PROGRAM FORMAT
545 if the value of the current location counter is absolute
546 01F0(H), the statement:
550 assigns the value 01F0(H) to the label abcd. If the location
551 counter value were relocatable, the final value of abcd would be
552 01F0(H)+K, where K represents the relocation bias of the program
553 section, as calculated by the linker at link time.
555 More than one label may appear within a single label field.
556 Each label so specified is assigned the same address value. For
557 example, if the value of the current location counter is
558 1FF0(H), the multiple labels in the following statement are each
559 assigned the value 1FF0(H):
563 Multiple labels may also appear on successive lines. For ex-
564 ample, the statements
570 likewise cause the same value to be assigned to all three la-
573 A double colon (::) defines the label as a global symbol.
574 For example, the statement
578 establishes the label abcd as a global symbol. The distinguish-
579 ing attribute of a global symbol is that it can be referenced
580 from within an object module other than the module in which the
581 symbol is defined. References to this label in other modules
582 are resolved when the modules are linked as a composite execut-
585 The legal characters for defining labels are:
594 A label may be any length, however, only the first eight (8)
595 characters are significant and, therefore must be unique among
596 all labels in the source program (not necessarily among
599 THE ASSEMBLER PAGE 1-5
600 SOURCE PROGRAM FORMAT
603 separately compiled modules). An error code(s) (m or p) will be
604 generated in the assembly listing if the first eight characters
605 in two or more labels are the same. The m code is caused by the
606 redeclaration of the symbol or its reference by another state-
607 ment. The p code is generated because the symbols location is
608 changing on each pass through the source file.
610 The label must not start with the characters 0-9, as this
611 designates a local symbol with special attributes described in a
614 The label must not start with the sequence $$, as this
615 represents the temporary radix 16 for constants.
618 1.2.1.2 Operator Field -
620 The operator field specifies the action to be performed. It
621 may consist of an instruction mnemonic (op code) or an assembler
624 When the operator is an instruction mnemonic, a machine in-
625 struction is generated and the assembler evaluates the addresses
626 of the operands which follow. When the operator is a directive
627 ASxxxx performs certain control actions or processing operations
628 during assembly of the source program.
630 Leading and trailing spaces or tabs in the operator field
631 have no significance; such characters serve only to separate
632 the operator field from the preceeding and following fields.
634 An operator is terminated by a space, tab or end of line.
637 1.2.1.3 Operand Field -
639 When the operator is an instruction mnemonic (op code), the
640 operand field contains program variables that are to be
641 evaluated/manipulated by the operator.
643 Operands may be expressions or symbols, depending on the
644 operator. Multiple expressions used in the operand fields may
645 be separated by a comma. An operand should be preceeded by an
646 operator field; if it is not, the statement will give an error
647 (q or o). All operands following instruction mnemonics are
648 treated as expressions.
650 The operand field is terminated by a semicolon when the field
651 is followed by a comment. For example, in the following
654 label: lda abcd,x ;Comment field
657 THE ASSEMBLER PAGE 1-6
658 SOURCE PROGRAM FORMAT
662 the tab between lda and abcd terminates the operator field and
663 defines the beginning of the operand field; a comma separates
664 the operands abcd and x; and a semicolon terminates the operand
665 field and defines the beginning of the comment field. When no
666 comment field follows, the operand field is terminated by the
667 end of the source line.
670 1.2.1.4 Comment Field -
672 The comment field begins with a semicolon and extends through
673 the end of the line. This field is optional and may contain any
674 7-bit ascii character except null.
676 Comments do not affect assembly processing or program execu-
680 1.3 SYMBOLS AND EXPRESSIONS
683 This section describes the generic components of the ASxxxx
684 assemblers: the character set, the conventions observed in con-
685 structing symbols, and the use of numbers, operators, and ex-
692 The following characters are legal in ASxxxx source programs:
694 1. The letters A through Z. Both upper- and lower-case
695 letters are acceptable. The assemblers are case sensi-
696 tive, i.e. ABCD and abcd are different symbols. (The
697 assemblers can be made case insensitive by recompiling
698 with the appropriate switches.)
700 2. The digits 0 through 9
702 3. The characters . (period), $ (dollar sign), and _ (un-
705 4. The special characters listed in Tables 1 through 6.
708 Tables 1 through 6 describe the various ASxxxx label and
709 field terminators, assignment operators, operand separators, as-
710 sembly, unary, binary, and radix operators.
713 THE ASSEMBLER PAGE 1-7
714 SYMBOLS AND EXPRESSIONS
717 Table 1 Label Terminators and Assignment Operators
718 ----------------------------------------------------------------
720 : Colon Label terminator.
722 :: Double colon Label Terminator; defines the
723 label as a global label.
725 = Equal sign Direct assignment operator.
727 == Double equal Direct assignment operator;
728 sign defines the symbol as a global
731 ----------------------------------------------------------------
737 Table 2 Field Terminators and Operand Separators
738 ----------------------------------------------------------------
740 Tab Item or field terminator.
742 Space Item or field terminator.
744 , Comma Operand field separator.
746 ; Semicolon Comment field indicator.
748 ----------------------------------------------------------------
754 Table 3 Assembler Operators
755 ----------------------------------------------------------------
757 # Number sign Immediate expression indicator.
759 . Period Current location counter.
761 ( Left parenthesis Expression delimiter.
763 ) Right parenthesis Expression delimeter.
765 ----------------------------------------------------------------
768 THE ASSEMBLER PAGE 1-8
769 SYMBOLS AND EXPRESSIONS
777 Table 4 Unary Operators
778 ----------------------------------------------------------------
780 < Left bracket <FEDC Produces the lower byte
781 value of the expression.
784 > Right bracket >FEDC Produces the upper byte
785 value of the expression.
788 + Plus sign +A Positive value of A
790 - Minus sign -A Produces the negative
791 (2's complement) of A.
793 ~ Tilde ~A Produces the 1's comple-
796 ' Single quote 'D Produces the value of
799 " Double quote "AB Produces the double byte
802 \ Backslash '\n Unix style characters
804 or '\001 or octal byte values.
806 ----------------------------------------------------------------
814 THE ASSEMBLER PAGE 1-9
815 SYMBOLS AND EXPRESSIONS
818 Table 5 Binary Operators
819 ----------------------------------------------------------------
821 << Double 0800 << 4 Produces the 4 bit
822 Left bracket left-shifted value of
825 >> Double 0800 >> 4 Produces the 4 bit
826 Right bracket right-shifted value of
829 + Plus sign A + B Arithmetic Addition
832 - Minus sign A - B Arithmetic Subtraction
835 * Asterisk A * B Arithmetic Multiplica-
836 tion operator. (signed
839 / Slash A / B Arithmetic Division
843 & Ampersand A & B Logical AND operator.
845 | Bar A | B Logical OR operator.
847 % Percent sign A % B Modulus operator.
850 ^ Up arrow or A ^ B EXCLUSIVE OR operator.
853 ----------------------------------------------------------------
861 THE ASSEMBLER PAGE 1-10
862 SYMBOLS AND EXPRESSIONS
865 Table 6 Temporary Radix Operators
866 ----------------------------------------------------------------
868 $%, 0b, 0B Binary radix operator.
870 $&, 0o, 0O, 0q, 0Q Octal radix operator.
872 $#, 0d, 0D Decimal radix operator.
874 $$, 0h, 0H, 0x, 0X Hexidecimal radix operator.
877 Potential ambiguities arising from the use of 0b and 0d
878 as temporary radix operators may be circumvented by pre-
879 ceding all non-prefixed hexidecimal numbers with 00.
880 Leading 0's are required in any case where the first
881 hexidecimal digit is abcdef as the assembler will treat
882 the letter sequence as a label.
884 ----------------------------------------------------------------
892 1.3.2 User-Defined Symbols
895 User-defined symbols are those symbols that are equated to a
896 specific value through a direct assignment statement or appear
897 as labels. These symbols are added to the User Symbol Table as
898 they are encountered during assembly.
900 The following rules govern the creation of user-defined symbols:
902 1. Symbols can be composed of alphanumeric characters,
903 dollar signs ($), periods (.), and underscores (_)
906 2. The first character of a symbol must not be a number
907 (except in the case of local symbols).
909 3. The first eight characters of a symbol must be unique.
910 A symbol can be written with more than eight legal
911 characters, but the ninth and subsequent characters are
914 4. Spaces and Tabs must not be embedded within a symbol.
919 THE ASSEMBLER PAGE 1-11
920 SYMBOLS AND EXPRESSIONS
926 Local symbols are specially formatted symbols used as labels
927 within a block of coding that has been delimited as a local sym-
928 bol block. Local symbols are of the form n$, where n is a
929 decimal integer from 0 to 255, inclusive. Examples of local
937 The range of a local symbol block consists of those state-
938 ments between two normally constructed symbolic labels. Note
939 that a statement of the form:
943 is a direct assignment statement but does not create a label and
944 thus does not delimit the range of a local symbol block.
946 Note that the range of a local symbol block may extend across
949 Local symbols provide a convenient means of generating labels
950 for branch instructions and other such references within local
951 symbol blocks. Using local symbols reduces the possibility of
952 symbols with multiple definitions appearing within a user pro-
953 gram. In addition, the use of local symbols differentiates
954 entry-point labels from local labels, since local labels cannot
955 be referenced from outside their respective local symbol blocks.
956 Thus, local symbols of the same name can appear in other local
957 symbol blocks without conflict. Local symbols require less sym-
958 bol table space than normal symbols. Their use is recommended.
960 The use of the same local symbol within a local symbol block
961 will generate one or both of the m or p errors.
964 THE ASSEMBLER PAGE 1-12
965 SYMBOLS AND EXPRESSIONS
968 Example of local symbols:
970 a: ldx #atable ;get table address
971 lda #0d48 ;table length
976 b: ldx #btable ;get table address
977 lda #0d48 ;table length
983 1.3.4 Current Location Counter
986 The period (.) is the symbol for the current location coun-
987 ter. When used in the operand field of an instruction, the
988 period represents the address of the first byte of the
991 AS: ldx #. ;The period (.) refers to
992 ;the address of the ldx
995 When used in the operand field of an ASxxxx directive, it
996 represents the address of the current byte or word:
1000 .word 0xFFFE,.+4,QK ;The operand .+4 in the .word
1001 ;directive represents a value
1002 ;stored in the second of the
1003 ;three words during assembly.
1005 If we assume the current value of the program counter is
1006 0H0200, then during assembly, ASxxxx reserves three words of
1007 storage starting at location 0H0200. The first value, a hex-
1008 idecimal constant FFFE, will be stored at location 0H0200. The
1009 second value represented by .+4 will be stored at location
1010 0H0202, its value will be 0H0206 ( = 0H0202 + 4). The third
1011 value defined by the symbol QK will be placed at location
1014 At the beginning of each assembly pass, ASxxxx resets the lo-
1015 cation counter. Normally, consecutive memory locations are as-
1016 signed to each byte of object code generated. However, the
1017 value of the location counter can be changed through a direct
1018 assignment statement of the following form:
1022 THE ASSEMBLER PAGE 1-13
1023 SYMBOLS AND EXPRESSIONS
1029 The new location counter can only be specified relative to
1030 the current location counter. Neglecting to specify the current
1031 program counter along with the expression on the right side of
1032 the assignment operator will generate the (.) error. (Absolute
1033 program areas may use the .org directive to specify the absolute
1034 location of the current program counter.)
1036 The following coding illustrates the use of the current location
1039 .area CODE1 (ABS) ;program area CODE1
1042 .org 0H100 ;set location to
1045 num1: ldx #.+0H10 ;The label num1 has
1050 .org 0H130 ;location counter
1053 num2: ldy #. ;The label num2 has
1059 .area CODE2 (REL) ;program area CODE2
1062 . = . + 0H20 ;Set location counter
1063 ;to relocatable 0H20 of
1064 ;the program section.
1066 num3: .word 0 ;The label num3 has
1068 ;of relocatable 0H20.
1070 . = . + 0H40 ;will reserve 0H40
1071 ;bytes of storage as will
1075 The .blkb and .blkw directives are the preferred methods of
1080 THE ASSEMBLER PAGE 1-14
1081 SYMBOLS AND EXPRESSIONS
1087 ASxxxx assumes that all numbers in the source program are to
1088 be interpreted in decimal radix unless otherwise specified. The
1089 .radix directive may be used to specify the default as octal,
1090 decimal, or hexidecimal. Individual numbers can be designated
1091 as binary, octal, decimal, or hexidecimal through the temporary
1092 radix prefixes shown in table 6.
1094 Negative numbers must be preceeded by a minus sign; ASxxxx
1095 translates such numbers into two's complement form. Positive
1096 numbers may (but need not) be preceeded by a plus sign.
1098 Numbers are always considered to be absolute values, therefor
1099 they are never relocatable.
1105 A term is a component of an expression and may be one of the
1112 1. A period (.) specified in an expression causes the
1113 current location counter to be used.
1114 2. A User-defined symbol.
1115 3. An undefined symbol is assigned a value of zero and
1116 inserted in the User-Defined symbol table as an un-
1119 3. A single quote followed by a single ascii character, or
1120 a double quote followed by two ascii characters.
1122 4. An expression enclosed in parenthesis. Any expression
1123 so enclosed is evaluated and reduced to a single term
1124 before the remainder of the expression in which it ap-
1125 pears is evaluated. Parenthesis, for example, may be
1126 used to alter the left-to-right evaluation of expres-
1127 sions, (as in A*B+C versus A*(B+C)), or to apply a un-
1128 ary operator to an entire expression (as in -(A+B)).
1130 5. A unary operator followed by a symbol or number.
1136 THE ASSEMBLER PAGE 1-15
1137 SYMBOLS AND EXPRESSIONS
1143 Expressions are combinations of terms joined together by
1144 binary operators. Expressions reduce to a 16-bit value. The
1145 evaluation of an expression includes the determination of its
1146 attributes. A resultant expression value may be one of three
1147 types (as described later in this section): relocatable, ab-
1148 solute, and external.
1150 Expressions are evaluate with an operand hierarchy as follows:
1152 * / % multiplication,
1159 << >> left shift and
1162 ^ exclusive or fourth.
1164 & logical and fifth.
1168 except that unary operators take precedence over binary
1172 A missing or illegal operator terminates the expression
1173 analysis, causing error codes (o) and/or (q) to be generated
1174 depending upon the context of the expression itself.
1176 At assembly time the value of an external (global) expression
1177 is equal to the value of the absolute part of that expression.
1178 For example, the expression external+4, where 'external' is an
1179 external symbol, has the value of 4. This expression, however,
1180 when evaluated at link time takes on the resolved value of the
1181 symbol 'external', plus 4.
1183 Expressions, when evaluated by ASxxxx, are one of three
1184 types: relocatable, absolute, or external. The following dis-
1185 tinctions are important:
1187 1. An expression is relocatable if its value is fixed re-
1188 lative to the base address of the program area in which
1189 it appears; it will have an offset value added at link
1190 time. Terms that contain labels defined in relocatable
1191 program areas will have a relocatable value;
1194 THE ASSEMBLER PAGE 1-16
1195 SYMBOLS AND EXPRESSIONS
1198 similarly, a period (.) in a relocatable program area,
1199 representing the value of the current program location
1200 counter, will also have a relocatable value.
1202 2. An expression is absolute if its value is fixed. An
1203 expression whose terms are numbers and ascii characters
1204 will reduce to an absolute value. A relocatable ex-
1205 pression or term minus a relocatable term, where both
1206 elements being evaluated belong to the same program
1207 area, is an absolute expression. This is because every
1208 term in a program area has the same relocation bias.
1209 When one term is subtracted from the other the reloca-
1212 3. An expression is external (or global) if it contains a
1213 single global reference (plus or minus an absolute ex-
1214 pression value) that is not defined within the current
1215 program. Thus, an external expression is only par-
1216 tially defined following assembly and must be resolved
1221 1.4 GENERAL ASSEMBLER DIRECTIVES
1224 An ASxxxx directive is placed in the operator field of the
1225 source line. Only one directive is allowed per source line.
1226 Each directive may have a blank operand field or one or more
1227 operands. Legal operands differ with each directive.
1230 1.4.1 .module Directive
1236 The .module directive causes the string to be included in the
1237 assemblers output file as an identifier for this particular ob-
1238 ject module. The string may be from 1 to 8 characters in
1239 length. Only one identifier is allowed per assembled module.
1240 The main use of this directive is to allow the linker to report
1241 a modules' use of undefined symbols. At link time all undefined
1242 symbols are reported and the modules referencing them are
1248 THE ASSEMBLER PAGE 1-17
1249 GENERAL ASSEMBLER DIRECTIVES
1252 1.4.2 .title Directive
1258 The .title directive provides a character string to be placed
1259 on the second line of each page during listing.
1262 1.4.3 .sbttl Directive
1268 The .sbttl directive provides a character string to be placed
1269 on the third line of each page during listing.
1272 1.4.4 .page Directive
1278 The .page directive causes a page ejection with a new heading
1279 to be printed. The new page occurs after the next line of the
1280 source program is processed, this allows an immediately follow-
1281 ing .sbttl directive to appear on the new page. The .page
1282 source line will not appear in the file listing. Paging may be
1283 disabled by invoking the -p directive.
1286 1.4.5 .byte and .db Directives
1290 .byte exp ;Stores the binary value
1291 .db exp ;of the expression in the
1294 .byte exp1,exp2,expn ;Stores the binary values
1295 .db exp1,exp2,expn ;of the list of expressions
1296 ;in successive bytes.
1298 where: exp, represent expressions that will be
1299 exp1, truncated to 8-bits of data.
1300 . Each expression will be calculated
1301 . as a 16-bit word expression,
1302 . the high-order byte will be truncated.
1303 . Multiple expressions must be
1306 THE ASSEMBLER PAGE 1-18
1307 GENERAL ASSEMBLER DIRECTIVES
1310 expn separated by commas.
1312 The .byte or .db directives are used to generate successive
1313 bytes of binary data in the object module.
1316 1.4.6 .word and .dw Directives
1320 .word exp ;Stores the binary value
1321 .dw exp ;of the expression in
1324 .word exp1,exp2,expn ;Stores the binary values
1325 .dw exp1,exp2,expn ;of the list of expressions
1326 ;in successive words.
1328 where: exp, represent expressions that will occupy two
1329 exp1, bytes of data. Each expression will be
1330 . calculated as a 16-bit word expression.
1331 . Multiple expressions must be
1332 expn separated by commas.
1334 The .word or .dw directives are used to generate successive
1335 words of binary data in the object module.
1338 1.4.7 .blkb, .blkw, and .ds Directives
1342 .blkb N ;reserve N bytes of space
1343 .blkw N ;reserve N words of space
1344 .ds N ;reserve N bytes of space
1346 The .blkb and .ds directives reserve byte blocks in the ob-
1347 ject module; the .blkw directive reserves word blocks.
1350 1.4.8 .ascii Directive
1356 where: string is a string of printable ascii characters.
1358 / / represent the delimiting characters. These
1359 delimiters may be any paired printing
1360 characters, as long as the characters are not
1361 contained within the string itself. If the
1364 THE ASSEMBLER PAGE 1-19
1365 GENERAL ASSEMBLER DIRECTIVES
1368 delimiting characters do not match, the .ascii
1369 directive will give the (q) error.
1371 The .ascii directive places one binary byte of data for each
1372 character in the string into the object module.
1375 1.4.9 .ascis Directive
1381 where: string is a string of printable ascii characters.
1383 / / represent the delimiting characters. These
1384 delimiters may be any paired printing
1385 characters, as long as the characters are not
1386 contained within the string itself. If the
1387 delimiting characters do not match, the .ascis
1388 directive will give the (q) error.
1390 The .ascis directive places one binary byte of data for each
1391 character in the string into the object module. The last
1392 character in the string will have the high order bit set.
1395 1.4.10 .asciz Directive
1401 where: string is a string of printable ascii characters.
1403 / / represent the delimiting characters. These
1404 delimiters may be any paired printing
1405 characters, as long as the characters are not
1406 contained within the string itself. If the
1407 delimiting characters do not match, the .asciz
1408 directive will give the (q) error.
1410 The .asciz directive places one binary byte of data for each
1411 character in the string into the object module. Following all
1412 the character data a zero byte is inserted to terminate the
1418 THE ASSEMBLER PAGE 1-20
1419 GENERAL ASSEMBLER DIRECTIVES
1422 1.4.11 .radix Directive
1428 where: character represents a single character specifying the
1429 default radix to be used for succeeding numbers.
1430 The character may be any one of the following:
1444 1.4.12 .even Directive
1450 The .even directive ensures that the current location counter
1451 contains an even boundary value by adding 1 if the current loca-
1455 1.4.13 .odd Directive
1461 The .odd directive ensures that the current location counter
1462 contains an odd boundary value by adding one if the current lo-
1468 THE ASSEMBLER PAGE 1-21
1469 GENERAL ASSEMBLER DIRECTIVES
1472 1.4.14 .area Directive
1476 .area name [(options)]
1478 where: name represents the symbolic name of the program sec-
1479 tion. This name may be the same as any
1480 user-defined symbol as the area names are in-
1481 dependent of all symbols and labels.
1483 options specify the type of program or data area:
1484 ABS absolute (automatically invokes OVR)
1491 The .area directive provides a means of defining and separat-
1492 ing multiple programming and data sections. The name is the
1493 area label used by the assembler and the linker to collect code
1494 from various separately assembled modules into one section. The
1495 name may be from 1 to 8 characters in length.
1497 The options are specified within parenthesis and separated by
1498 commas as shown in the following example:
1500 .area TEST (REL,CON) ;This section is relocatable
1501 ;and concatenated with other
1502 ;sections of this program area.
1504 .area DATA (REL,OVR) ;This section is relocatable
1505 ;and overlays other sections
1506 ;of this program area.
1508 .area SYS (ABS,OVR) ;(CON not allowed with ABS)
1509 ;This section is defined as
1510 ;absolute. Absolute sections
1511 ;are always overlayed with
1512 ;other sections of this program
1515 .area PAGE (PAG) ;This is a paged section. The
1516 ;section must be on a 256 byte
1517 ;boundary and its length is
1518 ;checked by the linker to be
1519 ;no larger than 256 bytes.
1520 ;This is useful for direct page
1525 THE ASSEMBLER PAGE 1-22
1526 GENERAL ASSEMBLER DIRECTIVES
1529 The default area type is REL|CON; i.e. a relocatable sec-
1530 tion which is concatenated with other sections of code with the
1531 same area name. The ABS option indicates an absolute area. The
1532 OVR and CON options indicate if program sections of the same
1533 name will overlay each other (start at the same location) or be
1534 concatenated with each other (appended to each other).
1536 Multiple invocations of the .area directive with the same
1537 name must specify the same options or leave the options field
1538 blank, this defaults to the previously specified options for
1540 The ASxxxx assemblers automatically provide two program
1543 '. .ABS.' This dumby section contains all absolute
1544 symbols and their values.
1546 '_CODE' This is the default program/data area.
1547 This program area is of type (REL,CON).
1548 The ASxxxx assemblers also automatically generate two symbols
1549 for each program area:
1551 's_<area>' This is the starting address of the pro-
1554 indent -16 'l_<area>' This is the
1555 length of the program area.
1558 1.4.15 .org Directive
1564 where: exp is an absolute expression that becomes the cur-
1565 rent location counter.
1567 The .org directive is valid only in an absolute program section
1568 and will give a (q) error if used in a relocatable program area.
1569 The .org directive specifies that the current location counter
1570 is to become the specified absolute value.
1575 THE ASSEMBLER PAGE 1-23
1576 GENERAL ASSEMBLER DIRECTIVES
1579 1.4.16 .globl Directive
1583 .globl sym1,sym2,...,symn
1585 where: sym1, represent legal symbolic names. When
1586 sym2,... When multiple symbols are specified,
1587 symn they are separated by commas.
1589 A .globl directive may also have a label field and/or a com-
1592 The .globl directive is provided to define (and thus provide
1593 linkage to) symbols not otherwise defined as global symbols
1594 within a module. In defining global symbols the directive
1595 .globl J is similar to:
1597 J == expression or J::
1599 Because object modules are linked by global symbols, these
1600 symbols are vital to a program. All internal symbols appearing
1601 within a given program must be defined at the end of pass 1 or
1602 they will be considered undefined. The assembly directive (-g)
1603 can be be invoked to make all undefined symbols global at the
1607 1.4.17 .if, .else, and .endif Directives
1613 . ;} range of true condition
1617 . ;} range of false condition
1621 The conditional assembly directives allow you to include or
1622 exclude blocks of source code during the assembly process, based
1623 on the evaluation of the condition test.
1625 The range of true condition will be processed if the expres-
1626 sion 'expr' is not zero (i.e. true) and the range of false con-
1627 dition will be processed if the expression 'expr' is zero (i.e
1628 false). The range of true condition is optional as is the .else
1629 directive and the range of false condition. The following are
1630 all valid .if/.else/.endif constructions:
1633 THE ASSEMBLER PAGE 1-24
1634 GENERAL ASSEMBLER DIRECTIVES
1638 .if A-4 ;evaluate A-4
1639 .byte 1,2 ;insert bytes if A-4 is
1642 .if K+3 ;evaluate K+3
1644 .byte 3,4 ;insert bytes if K+3
1647 .if J&3 ;evaluate J masked by 3
1648 .byte 12 ;insert this byte if J&3
1650 .byte 13 ;insert this byte if J&3
1654 The .if/.else/.endif directives may be nested upto 10 levels.
1656 The .page directive is processed within a false condition
1657 range to allow extended textual information to be incorporated
1658 in the source program with out the need to use the comment
1664 This text will be bypassed during assembly
1665 but appear in the listing file.
1673 1.4.18 .include Directive
1679 where: string represents a delimited string that is the file
1680 specification of an ASxxxx source file.
1682 The .include directive is used to insert a source file within
1683 the source file currently being assembled. When this directive
1684 is encountered, an implicit .page directive is issued. When the
1685 end of the specified source file is reached, an implicit .page
1686 directive is issued and input continues from the previous source
1687 file. The maximum nesting level of source files specified by a
1688 .include directive is five.
1691 THE ASSEMBLER PAGE 1-25
1692 GENERAL ASSEMBLER DIRECTIVES
1695 The total number of separately specified .include files is
1696 unlimited as each .include file is opened and then closed during
1697 each pass made by the assembler.
1700 1.4.19 .setdp Directive
1704 .setdp [base [,area]]
1706 The set direct page directive has a common format in all the
1707 AS68xx assemblers. The .setdp directive is used to inform the
1708 assembler of the current direct page region and the offset ad-
1709 dress within the selected area. The normal invocation methods
1719 for all the 68xx microprocessors (the 6804 has only the paged
1720 ram area). The commands specify that the direct page is in area
1721 DIRECT and its offset address is 0 (the only valid value for all
1722 but the 6809 microprocessor). Be sure to place the DIRECT area
1723 at address 0 during linking. When the base address and area are
1724 not specified, then zero and the current area are the defaults.
1725 If a .setdp directive is not issued the assembler defaults the
1726 direct page to the area "_CODE" at offset 0.
1728 The assembler verifies that any local variable used in a
1729 direct variable reference is located in this area. Local vari-
1730 able and constant value direct access addresses are checked to
1731 be within the address range from 0 to 255.
1733 External direct references are assumed by the assembler to be
1734 in the correct area and have valid offsets. The linker will
1735 check all direct page relocations to verify that they are within
1738 The 6809 microprocessor allows the selection of the direct
1739 page to be on any 256 byte boundary by loading the appropriate
1740 value into the dp register. Typically one would like to select
1741 the page boundary at link time, one method follows:
1744 THE ASSEMBLER PAGE 1-26
1745 GENERAL ASSEMBLER DIRECTIVES
1748 .area DIRECT (PAG) ; define the direct page
1755 ldd #DIRECT ; load the direct page register
1756 tfr a,dp ; for access to the direct page
1758 At link time specify the base and global equates to locate the
1764 Both the area address and offset value must be specified (area
1765 and variable names are independent). The linker will verify
1766 that the relocated direct page accesses are within the direct
1768 The preceeding sequence could be repeated for multiple paged
1769 areas, however an alternate method is to define a non-paged area
1770 and use the .setdp directive to specify the offset value:
1772 .area DIRECT ; define non-paged area
1778 .setdp 0,DIRECT ; direct page area
1779 ldd #DIRECT ; load the direct page register
1780 tfr a,dp ; for access to the direct page
1783 .setdp 0x100,DIRECT ; direct page area
1784 ldd #DIRECT+0x100 ; load the direct page register
1785 tfr a,dp ; for access to the direct page
1787 The linker will verify that subsequent direct page references
1788 are in the specified area and offset address range. It is the
1789 programmers responsibility to load the dp register with the cor-
1790 rect page segment corresponding to the .setdp base address
1793 For those cases where a single piece of code must access a
1794 defined data structure within a direct page and there are many
1795 pages, define a dumby direct page linked at address 0. This
1796 dumby page is used only to define the variable labels. Then
1797 load the dp register with the real base address but donot use a
1798 .setdp directive. This method is equivalent to indexed
1801 THE ASSEMBLER PAGE 1-27
1802 GENERAL ASSEMBLER DIRECTIVES
1805 addressing, where the dp register is the index register and the
1806 direct addressing is the offset.
1812 The ASxxxx assemblers are command line oriented. After the
1813 assembler is started, enter the option(s) and file(s) to assem-
1814 ble following the 'argv:' prompt:
1816 argv: [-dqxjgalcposf] file1 [file2 file3 ... file6]
1822 x hex listing (default)
1824 The listing radix affects the
1825 .lst, .rel, and .sym files.
1827 j add line number and debug information to file
1828 g undefined symbols made global
1829 a all user symbols made global
1831 l create list output file1.lst
1832 o create object output file1.rel
1833 s create symbol output file1.sym
1835 p disable listing pagination
1837 relocatable reference flagging:
1839 f by ` in the listing file
1840 ff by mode in the listing file
1842 asx8051 specific command line option:
1843 -I<dir> Add the named directory to the include file
1844 search path. This option may be used more than once.
1845 Directories are searched in the order given.
1847 The file name for the .lst, .rel, and .sym files is the first
1848 file name specified in the command line. All output files are
1849 ascii text files which may be edited, copied, etc. The output
1850 files are the concatenation of all the input files, if files are
1851 to be assembled independently invoke the assembler for each
1854 The .rel file contains a radix directive so that the linker
1855 will use the proper conversion for this file. Linked files may
1856 have different radices.
1858 If the list (l) option is specified without the symbol table
1859 (s) option, the symbol table is placed at the end of the listing
1862 ASXXXX assembles supported by and distributed with SDCC are:
1863 asx8051 (Intel 8051)
1864 as-z80 (Zilog Z80 / Hitachi HD64180)
1865 as-gbz80 (GameBoy Z80-like CPU)
1866 as-hc08 (Motorola 68HC08)
1869 THE ASSEMBLER PAGE 1-28
1876 The ASxxxx assemblers provide limited diagnostic error codes
1877 during the assembly process, these errors will be noted in the
1878 listing file and printed on the stderr device.
1880 The assembler reports the errors on the stderr device as
1882 ?ASxxxx-Error-<*> in line nnn of filename
1884 where * is the error code, nnn is the line number, and filename
1885 is the source/include file.
1889 (.) This error is caused by an absolute direct assign-
1890 ment of the current location counter
1891 . = expression (incorrect)
1892 rather than the correct
1895 (a) Indicates a machine specific addressing or address-
1898 (b) Indicates a direct page boundary error.
1900 (d) Indicates a direct page addressing error.
1902 (i) Caused by an .include file error or an .if/.endif
1905 (m) Multiple definitions of the same label, multiple
1906 .module directives, or multiple conflicting attri-
1907 butes in an .area directive.
1909 (o) Directive or mnemonic error or the use of the .org
1910 directive in a relocatable area.
1912 (p) Phase error: label location changing between passes
1913 2 and 3. Normally caused by having more than one
1914 level of forward referencing.
1916 (q) Questionable syntax: missing or improper operators,
1917 terminators, or delimiters.
1919 (r) Relocation error: logic operation attempted on a
1920 relocatable term, addition of two relocatable terms,
1921 subtraction of two relocatable terms not within the
1922 same programming area or external symbols.
1924 (u) Undefined symbol encountered during assembly.
1927 THE ASSEMBLER PAGE 1-29
1934 The (-l) option produces an ascii output listing file. Each
1935 page of output contains a four line header:
1938 1. The ASxxxx program name and page number
1940 2. Title from a .title directive (if any)
1942 3. Subtitle from a .sbttl directive (if any)
1948 Each succeeding line contains five fields:
1951 1. Error field (first three characters of line)
1953 2. Current location counter
1955 3. Generated code in byte format
1957 4. Source text line number
1962 The error field may contain upto 2 error flags indicating any
1963 errors encountered while assembling this line of source code.
1965 The current location counter field displays the 16-bit pro-
1966 gram position. This field will be in the selected radix.
1968 The generated code follows the program location. The listing
1969 radix determines the number of bytes that will be displayed in
1970 this field. Hexidecimal listing allows six bytes of data within
1971 the field, decimal and octal allow four bytes within the field.
1972 If more than one field of data is generated from the assembly of
1973 a single line of source code, then the data field is repeated on
1976 The source text line number is printed in decimal and is fol-
1977 lowed by the source text.
1979 Two special cases will disable the listing of a line of
1984 THE ASSEMBLER PAGE 1-30
1988 1. Source line with a .page directive is never listed.
1990 2. Source line with a .include file directive is not
1991 listed unless the .include file cannot be opened.
1994 Two data field options are available to flag those bytes
1995 which will be relocated by the linker. If the -f option is
1996 specified then each byte to be relocated will be preceeded by
1997 the '`' character. If the -ff option is specified then each
1998 byte to be relocated will be preceeded by one of the following
2001 1. * paged relocation
2003 2. u low byte of unsigned word or unsigned byte
2005 3. v high byte of unsigned word
2007 4. p PCR low byte of word relocation or PCR byte
2009 5. q PCR high byte of word relocation
2011 6. r low byte relocation or byte relocation
2013 7. s high byte relocation
2017 1.8 SYMBOL TABLE FILE
2020 The symbol table has two parts:
2022 1. The alphabetically sorted list of symbols and/or labels
2023 defined or referenced in the source program.
2025 2. A list of the program areas defined during assembly of
2029 The sorted list of symbols and/or labels contains the follow-
2032 1. Program area number (none if absolute value or exter-
2035 2. The symbol or label
2037 3. Directly assigned symbol is denoted with an (=) sign
2041 THE ASSEMBLER PAGE 1-31
2045 4. The value of a symbol, location of a label relative to
2046 the program area base address (=0), or a **** indicat-
2047 ing the symbol or label is undefined.
2049 5. The characters: G - global, R - relocatable, and X -
2053 The list of program areas provides the correspondence between
2054 the program area numbers and the defined program areas, the size
2055 of the program areas, and the area flags (attributes).
2061 The object file is an ascii file containing the information
2062 needed by the linker to bind multiple object modules into a com-
2063 plete loadable memory image. The object module contains the
2064 following designators:
2071 H Most significant byte first
2072 L Least significant byte first
2079 R Relocation information
2080 P Paging information
2082 Refer to the linker for a detailed description of each of the
2083 designators and the format of the information contained in the
2107 2.1 ASLINK RELOCATING LINKER
2110 ASLINK is the companion linker for the ASxxxx assemblers.
2112 The program ASLINK is a general relocating linker performing
2113 the following functions:
2115 1. Bind multiple object modules into a single memory image
2117 2. Resolve inter-module symbol references
2119 3. Combine code belonging to the same area from multiple
2120 object files into a single contiguous memory region
2122 4. Search and import object module libraries for undefined
2125 5. Perform byte and word program counter relative
2126 (pc or pcr) addressing calculations
2128 6. Define absolute symbol values at link time
2130 7. Define absolute area base address values at link time
2132 8. Produce Intel Hex or Motorola S19 output file
2134 9. Produce a map of the linked memory image
2136 10. Produce an updated listing file with the relocated ad-
2150 The linker may run in the command line mode or command file
2151 modes. The allowed startup linker commands are:
2153 -c/-f command line / command file modes
2155 -p/-n enable/disable echo file.lnk input to stdout
2157 If command line mode is selected, all linker commands come
2158 from stdin, if the command file mode is selected the commands
2159 are input from the specified file (extension must be .lnk).
2161 The linker is started via
2165 After invoking the linker the valid options are:
2167 1. -i/-s Intel Hex (file.ihx) or Motorola S19 (file.s19)
2170 2. -m Generate a map file (file.map). This file con-
2171 tains a list of the symbols (by area) with absolute ad-
2172 dresses, sizes of linked areas, and other linking
2175 3. -u Generate an updated listing file (file.rst)
2176 derived from the relocated addresses and data from the
2179 4. -xdq Specifies the number radix for the map file
2180 (Hexidecimal, Decimal, or Octal).
2182 5. fileN Files to be linked. Files may be on the same
2183 line as the above options or on a separate line(s) one
2184 file per line or multiple files separated by spaces or
2187 6. -b area = expression (one definition per line)
2188 This specifies an area base address where the expres-
2189 sion may contain constants and/or defined symbols from
2192 7. -g symbol = expression (one definition per line)
2193 This specifies the value for the symbol where the ex-
2194 pression may contain constants and/or defined symbols
2195 from the linked files.
2197 8. -k library directory path
2198 (one definition per line) This specifies one possible
2206 path to an object library. More than one path is al-
2209 9. -l library file specification
2210 (one definition per line) This specifies a possible
2211 library file. More than one file is allowed.
2213 10. -e or null line, terminates input to the linker.
2215 ASLINK linkers supported by and distributed with SDCC are:
2217 link-z90 (Zilog Z80 / Hitachi HD64180)
2218 link-gbz80 (GameBoy Z80-like CPU)
2219 link-hc08 (Motorola 68HC08)
2221 aslink (Intel 8051) specific options:
2224 -j Produce NoICE debug as file[NOI]
2225 -z Produce SDCdb debug as file[cdb]
2226 -u Update listing file(s) with link data as file(s)[.RST]
2228 -a [iram-size] Check for internal RAM overflow
2229 -v [xram-size] Check for external RAM overflow
2230 -w [code-size] Check for code overflow
2231 -y Generate memory usage summary file[mem]
2232 -Y Pack internal ram
2233 -A [stack-size] Allocate space for stack
2236 link-z80 (Zilog Z80 / Hitachi HD64180) specific options:
2239 -j no$gmb symbol file generated as file[SYM]
2241 -z Produce SDCdb debug as file[cdb]
2242 -Z Gameboy image as file[GB]
2244 -u Update listing file(s) with link data as file(s)[.RST]
2247 link-gbz80 (GameBoy Z80-like CPU) specific options:
2250 -yo Number of rom banks (default: 2)
2251 -ya Number of ram banks (default: 0)
2252 -yt MBC type (default: no MBC)
2253 -yn Name of program (default: name of output file)
2254 -yp# Patch one byte in the output GB file (# is: addr=byte)
2256 -j no$gmb symbol file generated as file[SYM]
2258 -Z Gameboy image as file[GB]
2260 -u Update listing file(s) with link data as file(s)[.RST]
2263 link-hc08 (Motorola 68HC08) specific options:
2265 -t ELF executable as file[elf]
2266 -j Produce NoICE debug as file[NOI]
2267 -z Produce SDCdb debug as file[cdb]
2268 -u Update listing file(s) with link data as file(s)[.RST]
2270 -a [iram-size] Check for internal RAM overflow
2271 -v [xram-size] Check for external RAM overflow
2272 -w [code-size] Check for code overflow
2276 2.3 LIBRARY PATH(S) AND FILE(S)
2279 The process of resolving undefined symbols after scanning the
2280 input object files includes the scanning of object module
2281 libraries. The linker will search through all combinations of
2282 the library path specifications (input by the -k option) and the
2283 library file specifications (input by the -l option) that lead
2284 to an existing library file. Each library file contains a list
2285 (one file per line) of modules included in this particular
2286 library. Each existing object module is scanned for a match to
2287 the undefined symbol. The first module containing the symbol is
2288 then linked with the previous modules to resolve the symbol de-
2289 finition. The library object modules are rescanned until no
2290 more symbols can be resolved. The scanning algorithm allows
2291 resolution of back references. No errors are reported for non
2292 existant library files or object modules.
2294 The library file specification may be formed in one of two
2297 1. If the library file contained an absolute path/file
2298 specification then this is the object module's
2302 2. If the library file contains a relative path/file
2303 specification then the concatenation of the path and
2304 this file specification becomes the object module's
2309 As an example, assume there exists a library file termio.lib
2310 in the syslib directory specifying the following object modules:
2312 \6809\io_disk first object module
2313 d:\special\io_comm second object module
2315 and the following parameters were specified to the linker:
2320 LIBRARY PATH(S) AND FILE(S)
2323 -k c:\iosystem\ the first path
2324 -k c:\syslib\ the second path
2326 -l termio the first library file
2327 -l io the second library file (no such file)
2329 The linker will attempt to use the following object modules to
2330 resolve any undefined symbols:
2332 c:\syslib\6809\io_disk.rel (concatenated path/file)
2333 d:\special\io_comm.rel (absolute path/file)
2335 all other path(s)/file(s) don't exist. (No errors are reported
2336 for non existant path(s)/file(s).)
2339 2.4 ASLINK PROCESSING
2342 The linker processes the files in the order they are
2343 presented. The first pass through the input files is used to
2344 define all program areas, the section area sizes, and symbols
2345 defined or referenced. Undefined symbols will initiate a search
2346 of any specified library file(s) and the importing of the module
2347 containing the symbol definition. After the first pass the -b
2348 (area base address) definitions, if any, are processed and the
2351 The area linking proceeds by first examining the area types
2352 ABS, CON, REL, OVR and PAG. Absolute areas (ABS) from separate
2353 object modules are always overlayed and have been assembled at a
2354 specific address, these are not normally relocated (if a -b com-
2355 mand is used on an absolute area the area will be relocated).
2356 Relative areas (normally defined as REL|CON) have a base address
2357 of 0x0000 as read from the object files, the -b command speci-
2358 fies the beginning address of the area. All subsequent relative
2359 areas will be concatenated with proceeding relative areas.
2360 Where specific ordering is desired, the first linker input file
2361 should have the area definitions in the desired order. At the
2362 completion of the area linking all area addresses and lengths
2363 have been determined. The areas of type PAG are verified to be
2364 on a 256 byte boundary and that the length does not exceed 256
2365 bytes. Any errors are noted on stderr and in the map file.
2367 Next the global symbol definitions (-g option), if any, are
2368 processed. The symbol definitions have been delayed until this
2369 point because the absolute addresses of all internal symbols are
2370 known and can be used in the expression calculations.
2372 Before continuing with the linking process the symbol table
2373 is scanned to determine if any symbols have been referenced but
2374 not defined. Undefined symbols are listed on the stderr device.
2381 if a .module directive was included in the assembled file the
2382 module making the reference to this undefined variable will be
2385 Constants defined as global in more than one module will be
2386 flagged as multiple definitions if their values are not identi-
2389 After the preceeding processes are complete the linker may
2390 output a map file (-m option). This file provides the following
2393 1. Global symbol values and label absolute addresses
2395 2. Defined areas and there lengths
2397 3. Remaining undefined symbols
2399 4. List of modules linked
2401 5. List of library modules linked
2403 6. List of -b and -g definitions
2408 The final step of the linking process is performed during the
2409 second pass of the input files. As the xxx.rel files are read
2410 the code is relocated by substituting the physical addresses for
2411 the referenced symbols and areas and may be output in Intel or
2412 Motorola formats. The number of files linked and symbols de-
2413 fined/referenced is limited by the processor space available to
2414 build the area/symbol lists. If the -u option is specified then
2415 the listing files (file.lst) associated with the relocation
2416 files (file.rel) are scanned and used to create a new file
2417 (file.rst) which has all addresses and data relocated to their
2421 2.5 LINKER INPUT FORMAT
2424 The linkers' input object file is an ascii file containing
2425 the information needed by the linker to bind multiple object
2426 modules into a complete loadable memory image.
2428 The object module contains the following designators:
2441 H Most significant byte first
2442 L Least significant byte first
2449 R Relocation information
2450 P Paging information
2453 2.5.1 Object Module Format
2456 The first line of an object module contains the [XDQ][HL]
2457 format specifier (i.e. XH indicates a hexidecimal file with
2458 most significant byte first) for the following designators.
2463 H aa areas gg global symbols
2465 The header line specifies the number of areas(aa) and the
2466 number of global symbols(gg) defined or referenced in this ob-
2467 ject module segment.
2474 The module line specifies the module name from which this
2475 header segment was assembled. The module line will not appear
2476 if the .module directive was not used in the source program.
2487 The symbol line defines (Def) or references (Ref) the symbol
2488 'string' with the value nnnn. The defined value is relative to
2489 the current area base address. References to constants and
2490 external global symbols will always appear before the first area
2497 definition. References to external symbols will have a value of
2503 A label size ss flags ff
2505 The area line defines the area label, the size (ss) of the
2506 area in bytes, and the area flags (ff). The area flags specify
2507 the ABS, REL, CON, OVR, and PAG parameters:
2509 OVR/CON (0x04/0x00 i.e. bit position 2)
2511 ABS/REL (0x08/0x00 i.e. bit position 3)
2513 PAG (0x10 i.e. bit position 4)
2518 T xx xx nn nn nn nn nn ...
2520 The T line contains the assembled code output by the assem-
2521 bler with xx xx being the offset address from the current area
2522 base address and nn being the assembled instructions and data in
2528 R 0 0 nn nn n1 n2 xx xx ...
2530 The R line provides the relocation information to the linker.
2531 The nn nn value is the current area index, i.e. which area the
2532 current values were assembled. Relocation information is en-
2533 coded in groups of 4 bytes:
2535 1. n1 is the relocation mode and object format
2536 1. bit 0 word(0x00)/byte(0x01)
2537 2. bit 1 relocatable area(0x00)/symbol(0x02)
2538 3. bit 2 normal(0x00)/PC relative(0x04) relocation
2539 4. bit 3 1-byte(0x00)/2-byte(0x08) object format for
2541 5. bit 4 signed(0x00)/unsigned(0x10) byte data
2542 6. bit 5 normal(0x00)/page '0'(0x20) reference
2543 7. bit 6 normal(0x00)/page 'nnn'(0x40) reference
2544 8. bit 7 LSB byte(0x00)/MSB byte(0x80) with 2-byte
2547 2. n2 is a byte index into the corresponding (i.e. pre-
2548 ceeding) T line data (i.e. a pointer to the data to be
2555 updated by the relocation). The T line data may be
2556 1-byte or 2-byte byte data format or 2-byte word
2559 3. xx xx is the area/symbol index for the area/symbol be-
2560 ing referenced. the corresponding area/symbol is found
2561 in the header area/symbol lists.
2564 The groups of 4 bytes are repeated for each item requiring relo-
2565 cation in the preceeding T line.
2570 P 0 0 nn nn n1 n2 xx xx
2572 The P line provides the paging information to the linker as
2573 specified by a .setdp directive. The format of the relocation
2574 information is identical to that of the R line. The correspond-
2575 ing T line has the following information:
2578 Where aa aa is the area reference number which specifies the
2579 selected page area and bb bb is the base address of the page.
2580 bb bb will require relocation processing if the 'n1 n2 xx xx' is
2581 specified in the P line. The linker will verify that the base
2582 address is on a 256 byte boundary and that the page length of an
2583 area defined with the PAG type is not larger than 256 bytes.
2585 The linker defaults any direct page references to the first
2586 area defined in the input REL file. All ASxxxx assemblers will
2587 specify the _CODE area first, making this the default page area.
2590 2.6 LINKER ERROR MESSAGES
2593 The linker provides detailed error messages allowing the pro-
2594 grammer to quickly find the errant code. As the linker com-
2595 pletes pass 1 over the input file(s) it reports any page
2596 boundary or page length errors as follows:
2598 ?ASlink-Warning-Paged Area PAGE0 Boundary Error
2602 ?ASlink-Warning-Paged Area PAGE0 Length Error
2604 where PAGE0 is the paged area.
2609 LINKER ERROR MESSAGES
2612 During Pass two the linker reads the T, R, and P lines per-
2613 forming the necessary relocations and outputting the absolute
2614 code. Various errors may be reported during this process
2615 The P line processing can produce only one possible error:
2617 ?ASlink-Warning-Page Definition Boundary Error
2618 file module pgarea pgoffset
2619 PgDef t6809l t6809l PAGE0 0001
2621 The error message specifies the file and module where the .setdp
2622 direct was issued and indicates the page area and the page
2623 offset value determined after relocation.
2626 The R line processing produces various errors:
2628 ?ASlink-Warning-Byte PCR relocation error for symbol bra2
2629 file module area offset
2630 Refby t6809l t6809l TEST 00FE
2631 Defin tconst tconst . .ABS. 0080
2633 ?ASlink-Warning-Unsigned Byte error for symbol two56
2634 file module area offset
2635 Refby t6800l t6800l DIRECT 0015
2636 Defin tconst tconst . .ABS. 0100
2638 ?ASlink-Warning-Page0 relocation error for symbol ltwo56
2639 file module area offset
2640 Refby t6800l t6800l DIRECT 000D
2641 Defin tconst tconst DIRECT 0100
2643 ?ASlink-Warning-Page Mode relocation error for symbol two56
2644 file module area offset
2645 Refby t6809l t6809l DIRECT 0005
2646 Defin tconst tconst . .ABS. 0100
2648 ?ASlink-Warning-Page Mode relocation error
2649 file module area offset
2650 Refby t Pagetest PROGRAM 0006
2651 Defin t Pagetest DIRECT 0100
2653 These error messages specify the file, module, area, and offset
2654 within the area of the code referencing (Refby) and defining
2655 (Defin) the symbol. If the symbol is defined in the same module
2656 as the reference the linker is unable to report the symbol name.
2657 The assembler listing file(s) should be examined at the offset
2658 from the specified area to located the offending code.
2662 1. The byte PCR error is caused by exceeding the pc rela-
2663 tive byte branch range.
2666 THE LINKER PAGE 2-10
2667 LINKER ERROR MESSAGES
2670 2. The Unsigned byte error indicates an indexing value was
2671 negative or larger than 255.
2673 3. The Page0 error is generated if the direct page vari-
2674 able is not in the page0 range of 0 to 255.
2676 4. The page mode error is generated if the direct variable
2677 is not within the current direct page (6809).
2681 THE LINKER Page 2-11
2682 INTEL HEX OUTPUT FORMAT
2685 2.7 INTEL HEX OUTPUT FORMAT
2687 Record Mark Field - This field signifies the start of a
2688 record, and consists of an ascii colon
2691 Record Length Field - This field consists of two ascii
2692 characters which indicate the number of
2693 data bytes in this record. The
2694 characters are the result of converting
2695 the number of bytes in binary to two
2696 ascii characters, high digit first. An
2697 End of File record contains two ascii
2698 zeros in this field.
2700 Load Address Field - This field consists of the four ascii
2701 characters which result from converting
2702 the the binary value of the address in
2703 which to begin loading this record. The
2704 order is as follows:
2706 High digit of high byte of address.
2707 Low digit of high byte of address.
2708 High digit of low byte of address.
2709 Low digit of low byte of address.
2711 In an End of File record this field con-
2712 sists of either four ascii zeros or the
2713 program entry address. Currently the
2714 entry address option is not supported.
2716 Record Type Field - This field identifies the record type,
2717 which is either 0 for data records or 1
2718 for an End of File record. It consists
2719 of two ascii characters, with the high
2720 digit of the record type first, followed
2721 by the low digit of the record type.
2723 Data Field - This field consists of the actual data,
2724 converted to two ascii characters, high
2725 digit first. There are no data bytes in
2726 the End of File record.
2728 Checksum Field - The checksum field is the 8 bit binary
2729 sum of the record length field, the load
2730 address field, the record type field,
2731 and the data field. This sum is then
2732 negated (2's complement) and converted
2733 to two ascii characters, high digit
2737 THE LINKER Page 2-12
2738 MOTOROLA S1-S9 OUTPUT FORMAT
2741 2.8 MOTORLA S1-S9 OUTPUT FORMAT
2743 Record Type Field - This field signifies the start of a
2744 record and identifies the the record
2747 Ascii S1 - Data Record
2748 Ascii S9 - End of File Record
2750 Record Length Field - This field specifies the record length
2751 which includes the address, data, and
2752 checksum fields. The 8 bit record
2753 length value is converted to two ascii
2754 characters, high digit first.
2756 Load Address Field - This field consists of the four ascii
2757 characters which result from converting
2758 the the binary value of the address in
2759 which to begin loading this record. The
2760 order is as follows:
2762 High digit of high byte of address.
2763 Low digit of high byte of address.
2764 High digit of low byte of address.
2765 Low digit of low byte of address.
2767 In an End of File record this field con-
2768 sists of either four ascii zeros or the
2769 program entry address. Currently the
2770 entry address option is not supported.
2772 Data Field - This field consists of the actual data,
2773 converted to two ascii characters, high
2774 digit first. There are no data bytes in
2775 the End of File record.
2777 Checksum Field - The checksum field is the 8 bit binary
2778 sum of the record length field, the load
2779 address field, and the data field. This
2780 sum is then complemented (1's comple-
2781 ment) and converted to two ascii
2782 characters, high digit first.
2799 BUILDING ASXXXX AND ASLINK
2804 The assemblers and linker have been successfully compiled us-
2805 ing the DECUS C (PDP-11) compiler (patch level 9) with
2806 RT-11/TSX+, Eyring Research Institute, Inc. PDOS (680x0) C
2807 V5.4b compiler, and Symantec C/C++ V6.1/V7.0.
2809 The device specific header file (i.e. m6800.h, m6801.h,
2810 etc.) contains the DECUS C 'BUILD' directives for generating a
2811 command file to compile, assemble, and link the necessary files
2812 to prepare an executable image for a particular assembler.
2815 3.1 BUILDING AN ASSEMBLER
2818 The building of a typical assembler (6809 for example) re-
2819 quires the following files:
2837 The first five files are the 6809 processor dependent sec-
2838 tions which contain the following:
2843 BUILDING ASXXXX AND ASLINK PAGE 3-2
2844 BUILDING AN ASSEMBLER
2847 1. m6809.h - header file containing the machine specific
2848 definitions of constants, variables, structures, and
2851 2. m09ext - device description, byte order, and file ex-
2854 3. m09pst - a table of the assembler general directives,
2855 special device directives, and assembler mnemonics with
2856 associated operation codes
2858 4. m09mch / m09adr - machine specific code for processing
2859 the device mnemonics, addressing modes, and special
2863 The remaining nine files provide the device independent sec-
2864 tions which handle the details of file input/output, symbol
2865 table generation, program/data areas, expression analysis, and
2866 assembler directive processing.
2868 The assembler defaults to the not case sensitive mode. This
2869 may be altered by changing the case sensitivity flag in asm.h to
2872 * Case Sensitivity Flag
2874 #define CASE_SENSITIVE 1
2876 The assemblers and linker should be compiled with the same
2877 case sensitivity option.
2883 The building of the linker requires the following files:
2901 BUILDING ASXXXX AND ASLINK PAGE 3-3
2905 The linker defaults to the not case sensitive mode. This may
2906 be altered by changing the case sensitivity flag in aslink.h to
2909 * Case Sensitivity Flag
2911 #define CASE_SENSITIVE 1
2913 The linker and assemblers should be compiled with the same
2914 case sensitivity option.
2937 A.1 6800 REGISTER SET
2939 The following is a list of the 6800 registers used by AS6800:
2941 a,b - 8-bit accumulators
2945 A.2 6800 INSTRUCTION SET
2948 The following tables list all 6800/6802/6808 mnemonics recog-
2949 nized by the AS6800 assembler. The designation [] refers to a
2950 required addressing mode argument. The following list specifies
2951 the format for each addressing mode supported by AS6800:
2953 #data immediate data
2956 *dir direct page addressing
2957 (see .setdp directive)
2960 ,x register indirect addressing
2963 offset,x register indirect addressing
2966 ext extended addressing
2970 The terms data, dir, offset, ext, and label may all be expres-
2975 AS6800 ASSEMBLER PAGE A-2
2976 6800 INSTRUCTION SET
2979 Note that not all addressing modes are valid with every in-
2980 struction, refer to the 6800 technical data for valid modes.
2983 A.2.1 Inherent Instructions
3005 A.2.2 Branch Instructions
3018 AS6800 ASSEMBLER PAGE A-3
3019 6800 INSTRUCTION SET
3022 A.2.3 Single Operand Instructions
3073 AS6800 ASSEMBLER PAGE A-4
3074 6800 INSTRUCTION SET
3077 A.2.4 Double Operand Instructions
3113 A.2.5 Jump and Jump to Subroutine Instructions
3120 AS6800 ASSEMBLER PAGE A-5
3121 6800 INSTRUCTION SET
3124 A.2.6 Long Register Instructions
3151 B.1 .hd6303 DIRECTIVE
3157 The .hd6303 directive enables processing of the HD6303 specific
3158 mnemonics not included in the 6801 instruction set. HD6303
3159 mnemonics encountered without the .hd6303 directive will be
3160 flagged with an 'o' error.
3163 B.2 6801 REGISTER SET
3165 The following is a list of the 6801 registers used by AS6801:
3167 a,b - 8-bit accumulators
3168 d - 16-bit accumulator <a:b>
3172 B.3 6801 INSTRUCTION SET
3175 The following tables list all 6801/6303 mnemonics recognized
3176 by the AS6801 assembler. The designation [] refers to a re-
3177 quired addressing mode argument. The following list specifies
3178 the format for each addressing mode supported by AS6801:
3180 #data immediate data
3183 *dir direct page addressing
3184 (see .setdp directive)
3189 AS6801 ASSEMBLER PAGE B-2
3190 6801 INSTRUCTION SET
3193 ,x register indirect addressing
3196 offset,x register indirect addressing
3199 ext extended addressing
3203 The terms data, dir, offset, ext, and label may all be expres-
3206 Note that not all addressing modes are valid with every in-
3207 struction, refer to the 6801/6303 technical data for valid
3211 B.3.1 Inherent Instructions
3229 B.3.2 Branch Instructions
3243 AS6801 ASSEMBLER PAGE B-3
3244 6801 INSTRUCTION SET
3247 B.3.3 Single Operand Instructions
3301 AS6801 ASSEMBLER PAGE B-4
3302 6801 INSTRUCTION SET
3314 B.3.4 Double Operand Instructions
3319 adda [] addb [] addd []
3320 add a [] add b [] add d []
3343 suba [] subb [] subd []
3344 sub a [] sub b [] sub d []
3349 AS6801 ASSEMBLER PAGE B-5
3350 6801 INSTRUCTION SET
3353 B.3.5 Jump and Jump to Subroutine Instructions
3358 B.3.6 Long Register Instructions
3366 B.3.7 6303 Specific Instructions
3368 aim #data, [] eim #data, []
3369 oim #data, [] tim #data, []
3393 Requires the .setdp directive to specify the ram area.
3396 C.1 6804 REGISTER SET
3398 The following is a list of the 6804 registers used by AS6804:
3400 x,y - index registers
3403 C.2 6804 INSTRUCTION SET
3406 The following tables list all 6804 mnemonics recognized by
3407 the AS6804 assembler. The designation [] refers to a required
3408 addressing mode argument. The following list specifies the
3409 format for each addressing mode supported by AS6804:
3411 #data immediate data
3414 ,x register indirect addressing
3416 dir direct addressing
3417 (see .setdp directive)
3420 ext extended addressing
3424 The terms data, dir, and ext may be expressions. The label for
3425 the short branchs beq, bne, bcc, and bcs must not be external.
3427 Note that not all addressing modes are valid with every in-
3428 struction, refer to the 6804 technical data for valid modes.
3431 AS6804 ASSEMBLER PAGE C-2
3432 6804 INSTRUCTION SET
3435 C.2.1 Inherent Instructions
3446 C.2.2 Branch Instructions
3452 C.2.3 Single Operand Instructions
3464 C.2.4 Jump and Jump to Subroutine Instructions
3470 C.2.5 Bit Test Instructions
3472 brclr #data,[],label
3473 brset #data,[],label
3481 AS6804 ASSEMBLER PAGE C-3
3482 6804 INSTRUCTION SET
3485 C.2.6 Load Immediate data Instruction
3490 C.2.7 6804 Derived Instructions
3537 D.1 6805 REGISTER SET
3539 The following is a list of the 6805 registers used by AS6805:
3541 a - 8-bit accumulator
3545 D.2 6805 INSTRUCTION SET
3548 The following tables list all 6805 mnemonics recognized by
3549 the AS6805 assembler. The designation [] refers to a required
3550 addressing mode argument. The following list specifies the
3551 format for each addressing mode supported by AS6805:
3553 #data immediate data
3556 *dir direct page addressing
3557 (see .setdp directive)
3560 ,x register indirect addressing
3563 offset,x register indirect addressing
3564 0 <= offset <= 255 --- byte mode
3565 256 <= offset <= 65535 --- word mode
3566 (an externally defined offset uses the
3569 ext extended addressing
3575 AS6805 ASSEMBLER PAGE D-2
3576 6805 INSTRUCTION SET
3579 The terms data, dir, offset, and ext may all be expressions.
3581 Note that not all addressing modes are valid with every in-
3582 struction, refer to the 6805 technical data for valid modes.
3585 D.2.1 Control Instructions
3596 D.2.2 Bit Manipulation Instructions
3598 brset #data,*dir,label
3599 brclr #data,*dir,label
3605 D.2.3 Branch Instructions
3611 bhcc label bhcs label
3618 AS6805 ASSEMBLER PAGE D-3
3619 6805 INSTRUCTION SET
3622 D.2.4 Read-Modify-Write Instructions
3658 D.2.5 Register\Memory Instructions
3669 AS6805 ASSEMBLER PAGE D-4
3670 6805 INSTRUCTION SET
3673 D.2.6 Jump and Jump to Subroutine Instructions
3698 E.1 68HC08 REGISTER SET
3700 The following is a list of the 68HC08 registers used by
3703 a - 8-bit accumulator
3704 x - index register <H:X>
3708 E.2 68HC08 INSTRUCTION SET
3711 The following tables list all 68HC08 mnemonics recognized by
3712 the AS68HC08 assembler. The designation [] refers to a required
3713 addressing mode argument. The following list specifies the
3714 format for each addressing mode supported by AS68HC08:
3716 #data immediate data
3719 *dir direct page addressing
3720 (see .setdp directive)
3723 ,x register indexed addressing
3726 offset,x register indexed addressing
3727 0 <= offset <= 255 --- byte mode
3728 256 <= offset <= 65535 --- word mode
3729 (an externally defined offset uses the
3732 ,x+ register indexed addressing
3733 zero offset with post increment
3736 AS68HC08 ASSEMBLER PAGE E-2
3737 68HC08 INSTRUCTION SET
3741 offset,x+ register indexed addressing
3742 unsigned byte offset with post increment
3744 offset,s stack pointer indexed addressing
3745 0 <= offset <= 255 --- byte mode
3746 256 <= offset <= 65535 --- word mode
3747 (an externally defined offset uses the
3750 ext extended addressing
3754 The terms data, dir, offset, and ext may all be expressions.
3756 Note that not all addressing modes are valid with every in-
3757 struction, refer to the 68HC08 technical data for valid modes.
3760 E.2.1 Control Instructions
3771 E.2.2 Bit Manipulation Instructions
3773 brset #data,*dir,label
3774 brclr #data,*dir,label
3780 AS68HC08 ASSEMBLER PAGE E-3
3781 68HC08 INSTRUCTION SET
3784 E.2.3 Branch Instructions
3790 bhcc label bhcs label
3799 E.2.4 Complex Branch Instructions
3809 AS68HC08 ASSEMBLER PAGE E-4
3810 68HC08 INSTRUCTION SET
3813 E.2.5 Read-Modify-Write Instructions
3856 AS68HC08 ASSEMBLER PAGE E-5
3857 68HC08 INSTRUCTION SET
3860 E.2.6 Register\Memory Instructions
3871 E.2.7 Double Operand Move Instruction
3876 E.2.8 16-Bit <H:X> Index Register Instructions
3883 E.2.9 Jump and Jump to Subroutine Instructions
3908 F.1 6809 REGISTER SET
3910 The following is a list of the 6809 registers used by AS6809:
3912 a,b - 8-bit accumulators
3913 d - 16-bit accumulator <a:b>
3914 x,y - index registers
3915 s,u - stack pointers
3916 pc - program counter
3921 F.2 6809 INSTRUCTION SET
3924 The following tables list all 6809 mnemonics recognized by
3925 the AS6809 assembler. The designation [] refers to a required
3926 addressing mode argument. The following list specifies the
3927 format for each addressing mode supported by AS6809:
3929 #data immediate data
3932 *dir direct page addressing
3933 (see .setdp directive)
3939 cc,a,b,d,dp,x,y,s,u,pc
3941 ,-x ,--x register indexed
3946 AS6809 ASSEMBLER PAGE F-2
3947 6809 INSTRUCTION SET
3950 ,x+ ,x++ register indexed
3953 ,x register indexed addressing
3956 offset,x register indexed addressing
3957 -16 <= offset <= 15 --- 5-bit
3958 -128 <= offset <= -17 --- 8-bit
3959 16 <= offset <= 127 --- 8-bit
3960 -32768 <= offset <= -129 --- 16-bit
3961 128 <= offset <= 32767 --- 16-bit
3962 (external definition of offset
3965 a,x accumulator offset indexed addressing
3967 ext extended addressing
3969 ext,pc pc addressing ( pc <- pc + ext )
3971 ext,pcr pc relative addressing
3973 [,--x] register indexed indirect
3976 [,x++] register indexed indirect
3979 [,x] register indexed indirect addressing
3982 [offset,x] register indexed indirect addressing
3983 -128 <= offset <= 127 --- 8-bit
3984 -32768 <= offset <= -129 --- 16-bit
3985 128 <= offset <= 32767 --- 16-bit
3986 (external definition of offset
3989 [a,x] accumulator offset indexed
3992 [ext] extended indirect addressing
3994 [ext,pc] pc indirect addressing
3995 ( [pc <- pc + ext] )
3997 [ext,pcr] pc relative indirect addressing
3999 The terms data, dir, label, offset, and ext may all be expres-
4004 AS6809 ASSEMBLER PAGE F-3
4005 6809 INSTRUCTION SET
4008 Note that not all addressing modes are valid with every in-
4009 struction, refer to the 6809 technical data for valid modes.
4012 F.2.1 Inherent Instructions
4022 F.2.2 Short Branch Instructions
4027 bhis label bhs label
4029 blos label bls label
4037 F.2.3 Long Branch Instructions
4039 lbcc label lbcs label
4040 lbeq label lbge label
4041 lbgt label lbhi label
4042 lbhis label lbhs label
4043 lble label lblo label
4044 lblos label lbls label
4045 lblt label lbmi label
4046 lbne label lbpl label
4047 lbra label lbrn label
4048 lbvc label lbvs label
4052 AS6809 ASSEMBLER PAGE F-4
4053 6809 INSTRUCTION SET
4056 F.2.4 Single Operand Instructions
4095 AS6809 ASSEMBLER PAGE F-5
4096 6809 INSTRUCTION SET
4099 F.2.5 Double Operand Instructions
4124 F.2.6 D-register Instructions
4131 F.2.7 Index/Stack Register Instructions
4149 AS6809 ASSEMBLER PAGE F-6
4150 6809 INSTRUCTION SET
4153 F.2.8 Jump and Jump to Subroutine Instructions
4158 F.2.9 Register - Register Instructions
4163 F.2.10 Condition Code Register Instructions
4165 andcc #data orcc #data
4169 F.2.11 6800 Compatibility Instructions
4209 G.1 6811 REGISTER SET
4211 The following is a list of the 6811 registers used by AS6811:
4213 a,b - 8-bit accumulators
4214 d - 16-bit accumulator <a:b>
4215 x,y - index registers
4218 G.2 6811 INSTRUCTION SET
4221 The following tables list all 6811 mnemonics recognized by
4222 the AS6811 assembler. The designation [] refers to a required
4223 addressing mode argument. The following list specifies the
4224 format for each addressing mode supported by AS6811:
4226 #data immediate data
4229 *dir direct page addressing
4230 (see .setdp directive)
4233 ,x register indirect addressing
4236 offset,x register indirect addressing
4239 ext extended addressing
4243 The terms data, dir, offset, and ext may all be expressions.
4247 AS6811 ASSEMBLER PAGE G-2
4248 6811 INSTRUCTION SET
4251 Note that not all addressing modes are valid with every in-
4252 struction, refer to the 6811 technical data for valid modes.
4255 G.2.1 Inherent Instructions
4287 G.2.2 Branch Instructions
4301 AS6811 ASSEMBLER PAGE G-3
4302 6811 INSTRUCTION SET
4305 G.2.3 Single Operand Instructions
4356 AS6811 ASSEMBLER PAGE G-4
4357 6811 INSTRUCTION SET
4360 G.2.4 Double Operand Instructions
4365 adda [] addb [] addd []
4366 add a [] add b [] add d []
4392 suba [] subb [] subd []
4393 sub a [] sub b [] sub d []
4396 G.2.5 Bit Manupulation Instructions
4401 brclr [],#data,label
4402 brset [],#data,label
4407 AS6811 ASSEMBLER PAGE G-5
4408 6811 INSTRUCTION SET
4411 G.2.6 Jump and Jump to Subroutine Instructions
4416 G.2.7 Long Register Instructions
4447 H.1 6816 REGISTER SET
4449 The following is a list of the 6816 registers used by AS6816:
4451 a,b - 8-bit accumulators
4452 d - 16-bit accumulator <a:b>
4453 e - 16-bit accumulator
4454 x,y,z - index registers
4455 k - address extension register
4457 ccr - condition code
4460 H.2 6816 INSTRUCTION SET
4463 The following tables list all 6816 mnemonics recognized by
4464 the AS6816 assembler. The designation [] refers to a required
4465 addressing mode argument. The following list specifies the
4466 format for each addressing mode supported by AS6816:
4468 #data immediate data
4471 #xo,#yo local immediate data (mac / rmac)
4478 ,x zero offset register indexed addressing
4482 offset,x register indexed addressing
4485 AS6816 ASSEMBLER PAGE H-2
4486 6816 INSTRUCTION SET
4489 0 <= offset <= 255 --- 8-bit
4490 -32768 <= offset <= -1 --- 16-bit
4491 256 <= offset <= 32767 --- 16-bit
4492 (external definition of offset
4495 offset,x8 unsigned 8-bit offset indexed addressing
4496 offset,x16 signed 16-bit offset indexed addressing
4498 e,x accumulator offset indexed addressing
4500 ext extended addressing
4502 bank 64K bank number (jmp / jsr)
4504 The terms data, label, offset, bank, and ext may all be expres-
4507 Note that not all addressing modes are valid with every in-
4508 struction, refer to the 6816 technical data for valid modes.
4511 H.2.1 Inherent Instructions
4517 ediv edivs emul emuls
4518 fdiv fmuls idiv ldhi
4520 pshb pshmac pula pulb
4537 AS6816 ASSEMBLER PAGE H-3
4538 6816 INSTRUCTION SET
4541 H.2.2 Push/Pull Multiple Register Instructions
4543 pshm r,... pulm r,...
4546 H.2.3 Short Branch Instructions
4551 bhis label bhs label
4553 blos label bls label
4561 H.2.4 Long Branch Instructions
4563 lbcc label lbcs label
4564 lbeq label lbge label
4565 lbgt label lbhi label
4566 lbhis label lbhs label
4567 lble label lblo label
4568 lblos label lbls label
4569 lblt label lbmi label
4570 lbne label lbpl label
4571 lbra label lbrn label
4572 lbvc label lbvs label
4576 H.2.5 Bit Manipulation Instructions
4581 brclr [],#data,label
4582 brset [],#data,label
4585 AS6816 ASSEMBLER PAGE H-4
4586 6816 INSTRUCTION SET
4589 H.2.6 Single Operand Instructions
4642 AS6816 ASSEMBLER PAGE H-5
4643 6816 INSTRUCTION SET
4646 H.2.7 Double Operand Instructions
4681 H.2.8 Index/Stack Register Instructions
4693 AS6816 ASSEMBLER PAGE H-6
4694 6816 INSTRUCTION SET
4697 H.2.9 Jump and Jump to Subroutine Instructions
4699 jmp bank,[] jsr bank,[]
4702 H.2.10 Condition Code Register Instructions
4704 andp #data orp #data
4707 H.2.11 Multiply and Accumulate Instructions
4709 mac #data rmac #data
4710 mac #xo,#yo rmac #xo,#yo
4733 I.1 H8/3XX REGISTER SET
4735 The following is a list of the H8 registers used by ASH8:
4737 r0 - r7,sp 16-bit accumulators
4738 r0L - r7L,spL 8-bit accumulators
4739 r0H - r7H,spH 8-bit accumulators
4740 spL,spH,sp stack pointers
4744 I.2 H8/3XX INSTRUCTION SET
4747 The following tables list all H8/3xx mnemonics recognized by
4748 the ASH8 assembler. The designation [] refers to a required ad-
4749 dressing mode argument. The following list specifies the format
4750 for each addressing mode supported by ASH8:
4752 #xx:3 immediate data (3 bit)
4753 #xx:8 immediate data (8 bit)
4754 #xx:16 immediate data (16 bit)
4756 *dir direct page addressing
4757 (see .setdp directive)
4763 rn registers (16 bit)
4766 rnB registers (8 bit)
4767 r0H-r7H,r0L-r7L,spH,spL
4771 ASH8 ASSEMBLER PAGE I-2
4772 H8/3XX INSTRUCTION SET
4775 ccr condition code register
4777 @rn register indirect
4779 @-rn register indirect (auto pre-decrement)
4781 @rn+ register indirect (auto post-increment)
4783 @[offset,rn] register indirect, 16-bit displacement
4785 @@offset memory indirect, (8-bit address)
4787 ext extended addressing (16-bit)
4789 The terms data, dir, label, offset, and ext may all be expres-
4792 Note that not all addressing modes are valid with every in-
4793 struction, refer to the H8/3xx technical data for valid modes.
4796 I.2.1 Inherent Instructions
4805 I.2.2 Branch Instructions
4810 bhi label bhis label
4812 blo label blos label
4821 ASH8 ASSEMBLER PAGE I-3
4822 H8/3XX INSTRUCTION SET
4825 I.2.3 Single Operand Instructions
4854 rotxl.b rnB rotxr.b rnB
4856 rotl.b rnB rotr.b rnB
4858 shal.b rnB shar.b rnB
4860 shll.b rnB shlr.b rnB
4865 ASH8 ASSEMBLER PAGE I-4
4866 H8/3XX INSTRUCTION SET
4869 I.2.4 Double Operand Instructions
4873 add rnB,rnB add #xx:8,rnB
4876 cmp rnB,rnB cmp #xx:8,rnB
4882 addx rnB,rnB addx #xx:8,rnB
4884 and rnB,rnB and #xx:8,rnB
4887 or rnB,rnB or #xx:8,rnB
4890 subx rnB,rnB subx #xx:8,rnB
4892 xor rnB,rnB xor #xx:8,rnB
4898 add.b rnB,rnB add.b #xx:8,rnB
4901 cmp.b rnB,rnB cmp.b #xx:8,rnB
4907 addx.b rnB,rnB addx.b #xx:8,rnB
4909 and.b rnB,rnB and.b #xx:8,rnB
4912 or.b rnB,rnB or.b #xx:8,rnB
4915 subx.b rnB,rnB subx.b #xx:8,rnB
4917 xor.b rnB,rnB xor.b #xx:8,rnB
4921 ASH8 ASSEMBLER PAGE I-5
4922 H8/3XX INSTRUCTION SET
4925 I.2.5 Mov Instructions
4929 mov rnB,rnB mov rn,rn
4930 mov #xx:8,rnB mov #xx:16,rn
4931 mov @rn,rnB mov @rn,rn
4932 mov @[offset,rn],rnB mov @[offset,rn],rn
4933 mov @rn+,rnB mov @rn+,rn
4938 mov @label,rnB mov @label,rn
4939 mov label,rnB mov label,rn
4940 mov rnB,@rn mov rn,@rn
4941 mov rnB,@[offset,rn] mov rn,@[offset,rn]
4942 mov rnB,@-rn mov rn,@-rn
4947 mov rnB,@label mov rn,@label
4948 mov rnB,label mov rn,label
4953 mov.b rnB,rnB mov.w rn,rn
4954 mov.b #xx:8,rnB mov.w #xx:16,rn
4955 mov.b @rn,rnB mov.w @rn,rn
4956 mov.b @[offset,rn],rnB mov.w @[offset,rn],rn
4957 mov.b @rn+,rnB mov.w @rn+,rn
4962 mov.b @label,rnB mov.w @label,rn
4963 mov.b label,rnB mov.w label,rn
4964 mov.b rnB,@rn mov.w rn,@rn
4965 mov.b rnB,@[offset,rn] mov.w rn,@[offset,rn]
4966 mov.b rnB,@-rn mov.w rn,@-rn
4971 mov.b rnB,@label mov.w rn,@label
4972 mov.b rnB,label mov.w rn,label
4975 ASH8 ASSEMBLER PAGE I-6
4976 H8/3XX INSTRUCTION SET
4979 I.2.6 Bit Manipulation Instructions
4981 bld #xx:3,rnB bld #xx:3,@rn
4982 bld #xx:3,@dir bld #xx:3,dir
4983 bld #xx:3,*@dir bld #xx:3,*dir
4985 bild #xx:3,rnB bild #xx:3,@rn
4986 bild #xx:3,@dir bild #xx:3,dir
4987 bild #xx:3,*@dir bild #xx:3,*dir
4989 bst #xx:3,rnB bst #xx:3,@rn
4990 bst #xx:3,@dir bst #xx:3,dir
4991 bst #xx:3,*@dir bst #xx:3,*dir
4993 bist #xx:3,rnB bist #xx:3,@rn
4994 bist #xx:3,@dir bist #xx:3,dir
4995 bist #xx:3,*@dir bist #xx:3,*dir
4997 band #xx:3,rnB band #xx:3,@rn
4998 band #xx:3,@dir band #xx:3,dir
4999 band #xx:3,*@dir band #xx:3,*dir
5001 biand #xx:3,rnB biand #xx:3,@rn
5002 biand #xx:3,@dir biand #xx:3,dir
5003 biand #xx:3,*@dir biand #xx:3,*dir
5005 bor #xx:3,rnB bor #xx:3,@rn
5006 bor #xx:3,@dir bor #xx:3,dir
5007 bor #xx:3,*@dir bor #xx:3,*dir
5009 bior #xx:3,rnB bior #xx:3,@rn
5010 bior #xx:3,@dir bior #xx:3,dir
5011 bior #xx:3,*@dir bior #xx:3,*dir
5013 bxor #xx:3,rnB bxor #xx:3,@rn
5014 bxor #xx:3,@dir bxor #xx:3,dir
5015 bxor #xx:3,*@dir bxor #xx:3,*dir
5017 bixor #xx:3,rnB bixor #xx:3,@rn
5018 bixor #xx:3,@dir bixor #xx:3,dir
5019 bixor #xx:3,*@dir bixor #xx:3,*dir
5022 ASH8 ASSEMBLER PAGE I-7
5023 H8/3XX INSTRUCTION SET
5026 I.2.7 Extended Bit Manipulation Instructions
5028 bset #xx:3,rnB bset #xx:3,@rn
5029 bset #xx:3,@dir bset #xx:3,dir
5030 bset #xx:3,*@dir bset #xx:3,*dir
5031 bset rnB,rnB bset rnB,@rn
5032 bset rnB,@dir bset rnB,dir
5033 bset rnB,*@dir bset rnB,*dir
5035 bclr #xx:3,rnB bclr #xx:3,@rn
5036 bclr #xx:3,@dir bclr #xx:3,dir
5037 bclr #xx:3,*@dir bclr #xx:3,*dir
5038 bclr rnB,rnB bclr rnB,@rn
5039 bclr rnB,@dir bclr rnB,dir
5040 bclr rnB,*@dir bclr rnB,*dir
5042 bnot #xx:3,rnB bnot #xx:3,@rn
5043 bnot #xx:3,@dir bnot #xx:3,dir
5044 bnot #xx:3,*@dir bnot #xx:3,*dir
5045 bnot rnB,rnB bnot rnB,@rn
5046 bnot rnB,@dir bnot rnB,dir
5047 bnot rnB,*@dir bnot rnB,*dir
5049 btst #xx:3,rnB btst #xx:3,@rn
5050 btst #xx:3,@dir btst #xx:3,dir
5051 btst #xx:3,*@dir btst #xx:3,*dir
5052 btst rnB,rnB btst rnB,@rn
5053 btst rnB,@dir btst rnB,dir
5054 btst rnB,*@dir btst rnB,*dir
5057 I.2.8 Condition Code Instructions
5059 andc #xx:8,ccr andc #xx:8
5060 and #xx:8,ccr and.b #xx:8,ccr
5062 ldc #xx:8,ccr ldc #xx:8
5065 orc #xx:8,ccr orc #xx:8
5066 or #xx:8,ccr or.b #xx:8,ccr
5068 xorc #xx:8,ccr xorc #xx:8
5069 xor #xx:8,ccr xor.b #xx:8,ccr
5074 ASH8 ASSEMBLER PAGE I-8
5075 H8/3XX INSTRUCTION SET
5078 I.2.9 Other Instructions
5080 divxu rnB,rn divxu.b rnB,rn
5082 mulxu rnB,rn mulxu.b rnB,rn
5084 movfpe @label,rnB movfpe label,rnB
5085 movfpe.b @label,rnB movfpe.b label,rnB
5087 movtpe @label,rnB movtpe label,rnB
5088 movtpe.b @label,rnB movtpe.b label,rnB
5091 I.2.10 Jump and Jump to Subroutine Instructions
5094 jmp @label jmp label
5097 jsr @label jsr label
5120 J.1 8085 REGISTER SET
5122 The following is a list of the 8080/8085 registers used by
5125 a,b,c,d,e,h,l - 8-bit accumulators
5126 m - memory through (hl)
5131 J.2 8085 INSTRUCTION SET
5134 The following tables list all 8080/8085 mnemonics recognized
5135 by the AS8085 assembler. The following list specifies the
5136 format for each addressing mode supported by AS8085:
5138 #data immediate data
5141 r,r1,r2 register or register pair
5145 m memory address using (hl)
5147 addr direct memory addressing
5149 label call or jump label
5151 The terms data, m, addr, and label may be expressions.
5153 Note that not all addressing modes are valid with every in-
5154 struction, refer to the 8080/8085 technical data for valid
5158 AS8085 ASSEMBLER PAGE J-2
5159 8085 INSTRUCTION SET
5162 J.2.1 Inherent Instructions
5176 J.2.2 Register/Memory/Immediate Instructions
5178 adc r adc m aci #data
5179 add r add m adi #data
5180 ana r ana m ani #data
5181 cmp r cmp m cpi #data
5182 ora r ora m ori #data
5183 sbb r sbb m sbi #data
5184 sub r sub m sui #data
5185 xra r xra m xri #data
5188 J.2.3 Call and Return Instructions
5201 J.2.4 Jump Instructions
5214 AS8085 ASSEMBLER PAGE J-3
5215 8085 INSTRUCTION SET
5218 J.2.5 Input/Output/Reset Instructions
5225 J.2.6 Move Instructions
5235 J.2.7 Other Instructions
5277 The .hd64 directive enables processing of the HD64180 specific
5278 mnemonics not included in the Z80 instruction set. HD64180
5279 mnemonics encountered without the .hd64 directive will be
5280 flagged with an 'o' error.
5283 K.2 Z80 REGISTER SET AND CONDITIONS
5286 The following is a complete list of register designations and
5287 condition mnemonics:
5289 byte registers - a,b,c,d,e,h,l,i,r
5290 register pairs - af,af',bc,de,hl
5291 word registers - pc,sp,ix,iy
5295 NC - carry bit clear
5305 ASZ80 ASSEMBLER PAGE K-2
5309 K.3 Z80 INSTRUCTION SET
5312 The following tables list all Z80/HD64180 mnemonics recog-
5313 nized by the ASZ80 assembler. The designation [] refers to a
5314 required addressing mode argument. The following list specifies
5315 the format for each addressing mode supported by ASZ80:
5317 #data immediate data
5328 (hl) implied addressing or
5329 register indirect addressing
5331 (label) direct addressing
5333 offset(ix) indexed addressing with
5336 label call/jmp/jr label
5338 The terms data, dir, offset, and ext may all be expressions.
5339 The terms dir and offset are not allowed to be external refer-
5342 Note that not all addressing modes are valid with every in-
5343 struction, refer to the Z80/HD64180 technical data for valid
5347 ASZ80 ASSEMBLER PAGE K-3
5351 K.3.1 Inherent Instructions
5366 K.3.2 Implicit Operand Instructions
5387 ASZ80 ASSEMBLER PAGE K-4
5391 K.3.3 Load Instruction
5396 ld (label),a ld a,(label)
5397 ld (label),rp ld rp,(label)
5401 ld sp,iy ld rp,#data
5407 K.3.4 Call/Return Instructions
5411 call NC,label ret NC
5412 call NZ,label ret NZ
5414 call PE,label ret PE
5415 call PO,label ret PO
5420 K.3.5 Jump and Jump to Subroutine Instructions
5422 jp C,label jp M,label
5423 jp NC,label jp NZ,label
5424 jp P,label jp PE,label
5425 jp PO,label jp Z,label
5432 jr C,label jr NC,label
5433 jr NZ,label jr Z,label
5437 ASZ80 ASSEMBLER PAGE K-5
5441 K.3.6 Bit Manipulation Instructions
5448 K.3.7 Interrupt Mode and Reset Instructions
5456 K.3.8 Input and Output Instructions
5462 out (n),a out (c),rg
5467 K.3.9 Register Pair Instructions
5474 ex (sp),hl ex (sp),ix
5482 ASZ80 ASSEMBLER PAGE K-6
5486 K.3.10 HD64180 Specific Instructions
5526 Thanks to Marko Makela for his contribution of the AS6500
5533 Internet: Marko.Makela@Helsinki.Fi
5534 EARN/BitNet: msmakela@finuh
5536 Several additions and modifications were made to his code to
5537 support the following families of 6500 processors:
5539 (1) 650X and 651X processor family
5540 (2) 65F11 and 65F12 processor family
5541 (3) 65C00/21 and 65C29 processor family
5542 (4) 65C02, 65C102, and 65C112 processor family
5544 The instruction syntax of this cross assembler contains two
5545 peculiarities: (1) the addressing indirection is denoted by the
5546 square brackets [] and (2) the `bbrx' and `bbsx' instructions
5547 are written `bbr0 memory,label'.
5552 AS6500 ASSEMBLER PAGE L-2
5556 L.2 6500 REGISTER SET
5558 The following is a list of the 6500 registers used by AS6500:
5560 a - 8-bit accumulator
5561 x,y - index registers
5564 L.3 6500 INSTRUCTION SET
5567 The following tables list all 6500 family mnemonics recog-
5568 nized by the AS6500 assembler. The designation [] refers to a
5569 required addressing mode argument. The following list specifies
5570 the format for each addressing mode supported by AS6500:
5572 #data immediate data
5575 *dir direct page addressing
5576 (see .setdp directive)
5579 offset,x indexed addressing
5580 offset,y indexed addressing
5581 address = (offset + (x or y))
5583 [offset,x] pre-indexed indirect addressing
5585 address = contents of location
5586 (offset + (x or y)) mod 256
5588 [offset],y post-indexed indirect addressing
5589 address = contents of location at offset
5590 plus the value of the y register
5592 [address] indirect addressing
5594 ext extended addressing
5598 address,label direct page memory location
5600 bbrx and bbsx instruction addressing
5602 The terms data, dir, offset, address, ext, and label may all be
5605 Note that not all addressing modes are valid with every in-
5606 struction, refer to the 65xx technical data for valid modes.
5609 AS6500 ASSEMBLER PAGE L-3
5610 6500 INSTRUCTION SET
5613 L.3.1 Processor Specific Directives
5616 The AS6500 cross assembler has four (4) processor specific
5617 assembler directives which define the target 65xx processor
5620 .r6500 Core 650X and 651X family (default)
5621 .r65f11 Core plus 65F11 and 65F12
5622 .r65c00 Core plus 65C00/21 and 65C29
5623 .r65c02 Core plus 65C02, 65C102, and 65C112
5626 L.3.2 65xx Core Inherent Instructions
5643 L.3.3 65xx Core Branch Instructions
5652 L.3.4 65xx Core Single Operand Instructions
5662 AS6500 ASSEMBLER PAGE L-4
5663 6500 INSTRUCTION SET
5666 L.3.5 65xx Core Double Operand Instructions
5679 L.3.6 65xx Core Jump and Jump to Subroutine Instructions
5684 L.3.7 65xx Core Miscellaneous X and Y Register Instructions
5694 AS6500 ASSEMBLER PAGE L-5
5695 6500 INSTRUCTION SET
5698 L.3.8 65F11 and 65F12 Specific Instructions
5700 bbr0 [],label bbr1 [],label
5701 bbr2 [],label bbr3 [],label
5702 bbr4 [],label bbr5 [],label
5703 bbr6 [],label bbr7 [],label
5705 bbs0 [],label bbs1 [],label
5706 bbs2 [],label bbs3 [],label
5707 bbs4 [],label bbs5 [],label
5708 bbs6 [],label bbs7 [],label
5721 L.3.9 65C00/21 and 65C29 Specific Instructions
5723 bbr0 [],label bbr1 [],label
5724 bbr2 [],label bbr3 [],label
5725 bbr4 [],label bbr5 [],label
5726 bbr6 [],label bbr7 [],label
5728 bbs0 [],label bbs1 [],label
5729 bbs2 [],label bbs3 [],label
5730 bbs4 [],label bbs5 [],label
5731 bbs6 [],label bbs7 [],label
5749 AS6500 ASSEMBLER PAGE L-6
5750 6500 INSTRUCTION SET
5753 L.3.10 65C02, 65C102, and 65C112 Specific Instructions
5755 bbr0 [],label bbr1 [],label
5756 bbr2 [],label bbr3 [],label
5757 bbr4 [],label bbr5 [],label
5758 bbr6 [],label bbr7 [],label
5760 bbs0 [],label bbs1 [],label
5761 bbs2 [],label bbs3 [],label
5762 bbs4 [],label bbs5 [],label
5763 bbs6 [],label bbs7 [],label
5784 Additional addressing modes for the following core instruc-
5785 tions are also available with the 65C02, 65C102, and 65C112 pro-
projects / fw / sdcc / blob