From: Bdale Garbee Date: Fri, 22 Apr 2011 04:56:48 +0000 (-0600) Subject: fix soldermask clearance on cpu X-Git-Tag: fab-v0.1~3 X-Git-Url: https://git.gag.com/?p=hw%2Ftelepyro;a=commitdiff_plain;h=ffcf57a8f56e04adfdc4253b10512dbeb664242f fix soldermask clearance on cpu --- diff --git a/telepyro.pcb b/telepyro.pcb index f3b390a..65679fe 100644 --- a/telepyro.pcb +++ b/telepyro.pcb @@ -1507,50 +1507,50 @@ Element["" "0402" "C3" "0.1uF" 178326 81400 -3476 -7150 0 100 ""] Element["" "tqfp44" "U3" "unknown" 147000 75100 0 0 2 100 ""] ( - Pad[15747 20393 15747 22912 1417 1732 1500 "PB3/PDO/PCINT3/MISO" "11" "square,edge2"] - Pad[15747 -22913 15747 -20394 1417 1732 1500 "GND" "23" "square"] - Pad[-22913 15747 -20394 15747 1417 1732 1500 "AVCC" "44" "square"] - Pad[20393 15747 22912 15747 1417 1732 1500 "PB7/PCINT7/OC0A/OC1C/RTS" "12" "square,edge2"] - Pad[12597 20393 12597 22912 1417 1732 1500 "PB2/PDI/PCINT2/MOSI" "10" "square,edge2"] - Pad[12597 -22913 12597 -20394 1417 1732 1500 "AVCC" "24" "square"] - Pad[-22913 12597 -20394 12597 1417 1732 1500 "GND" "43" "square"] - Pad[20393 12597 22912 12597 1417 1732 1500 "RESET" "13" "square,edge2"] - Pad[9448 20393 9448 22912 1417 1732 1500 "PB1/PCINT1/SCLK" "9" "square,edge2"] - Pad[9448 -22913 9448 -20394 1417 1732 1500 "PD4/ICP1/ADC8" "25" "square"] - Pad[-22913 9448 -20394 9448 1417 1732 1500 "AREF" "42" "square"] - Pad[20393 9448 22912 9448 1417 1732 1500 "VCC" "14" "square,edge2"] - Pad[6298 20393 6298 22912 1417 1732 1500 "PB0/SS/PCINT0" "8" "square,edge2"] - Pad[6298 -22913 6298 -20394 1417 1732 1500 "PD6/T1/OC4D/ADC9" "26" "square"] - Pad[-22913 6298 -20394 6298 1417 1732 1500 "PF0/ADC0" "41" "square"] - Pad[20393 6298 22912 6298 1417 1732 1500 "GND" "15" "square,edge2"] - Pad[3149 20393 3149 22912 1417 1732 1500 "VBus" "7" "square,edge2"] - Pad[3149 -22913 3149 -20394 1417 1732 1500 "PD7/T0/OC4D/ADC10" "27" "square"] - Pad[-22913 3149 -20394 3149 1417 1732 1500 "PF1/ADC1" "40" "square"] - Pad[20393 3149 22912 3149 1417 1732 1500 "XTAL2" "16" "square,edge2"] - Pad[0 20393 0 22912 1417 1732 1500 "UCap" "6" "square,edge2"] - Pad[0 -22913 0 -20394 1417 1732 1500 "PB4/PCINT4/ADC11" "28" "square"] - Pad[-22913 0 -20394 0 1417 1732 1500 "PF4/ADC4/TCK" "39" "square"] - Pad[20393 0 22912 0 1417 1732 1500 "XTAL1" "17" "square,edge2"] - Pad[-3150 20393 -3150 22912 1417 1732 1500 "UGnd" "5" "square,edge2"] - Pad[-3150 -22913 -3150 -20394 1417 1732 1500 "PB5/PCINT5/OC1A/OC4B/ADC12" "29" "square"] - Pad[-22913 -3150 -20394 -3150 1417 1732 1500 "PF5/ADC5/TMS" "38" "square"] - Pad[20393 -3150 22912 -3150 1417 1732 1500 "PD0/OC0B/SCL/INT0" "18" "square,edge2"] - Pad[-6299 20393 -6299 22912 1417 1732 1500 "D+" "4" "square,edge2"] - Pad[-6299 -22913 -6299 -20394 1417 1732 1500 "PB6/PCINT6/OC1B/OC4B/ADC13" "30" "square"] - Pad[-22913 -6299 -20394 -6299 1417 1732 1500 "PF6/ADC6/TDO" "37" "square"] - Pad[20393 -6299 22912 -6299 1417 1732 1500 "PD1/SDA/INT1" "19" "square,edge2"] - Pad[-9449 20393 -9449 22912 1417 1732 1500 "D-" "3" "square,edge2"] - Pad[-9449 -22913 -9449 -20394 1417 1732 1500 "PC6/OC3A/OC4A" "31" "square"] - Pad[-22913 -9449 -20394 -9449 1417 1732 1500 "PF7/ADC7/TDI" "36" "square"] - Pad[20393 -9449 22912 -9449 1417 1732 1500 "PD2/RXD1/INT2" "20" "square,edge2"] - Pad[-12598 20393 -12598 22912 1417 1732 1500 "UVcc" "2" "square,edge2"] - Pad[-12598 -22913 -12598 -20394 1417 1732 1500 "PC7/ICP3/CLK0/OC4A" "32" "square"] - Pad[-22913 -12598 -20394 -12598 1417 1732 1500 "GND" "35" "square"] - Pad[20393 -12598 22912 -12598 1417 1732 1500 "PD3/TXD1/INT3" "21" "square,edge2"] - Pad[-15748 20393 -15748 22912 1417 1732 1500 "PE6/INT6/AIN0" "1" "square,edge2"] - Pad[-15748 -22913 -15748 -20394 1417 1732 1500 "PE2/HWB" "33" "square"] - Pad[-22913 -15748 -20394 -15748 1417 1732 1500 "VCC" "34" "square"] - Pad[20393 -15748 22912 -15748 1417 1732 1500 "PD5/XCK1/CTS" "22" "square,edge2"] + Pad[15747 20393 15747 22912 1417 1732 2047 "PB3/PDO/PCINT3/MISO" "11" "square,edge2"] + Pad[15747 -22913 15747 -20394 1417 1732 2047 "GND" "23" "square"] + Pad[-22913 15747 -20394 15747 1417 1732 2047 "AVCC" "44" "square"] + Pad[20393 15747 22912 15747 1417 1732 2047 "PB7/PCINT7/OC0A/OC1C/RTS" "12" "square,edge2"] + Pad[12597 20393 12597 22912 1417 1732 2047 "PB2/PDI/PCINT2/MOSI" "10" "square,edge2"] + Pad[12597 -22913 12597 -20394 1417 1732 2047 "AVCC" "24" "square"] + Pad[-22913 12597 -20394 12597 1417 1732 2047 "GND" "43" "square"] + Pad[20393 12597 22912 12597 1417 1732 2047 "RESET" "13" "square,edge2"] + Pad[9448 20393 9448 22912 1417 1732 2047 "PB1/PCINT1/SCLK" "9" "square,edge2"] + Pad[9448 -22913 9448 -20394 1417 1732 2047 "PD4/ICP1/ADC8" "25" "square"] + Pad[-22913 9448 -20394 9448 1417 1732 2047 "AREF" "42" "square"] + Pad[20393 9448 22912 9448 1417 1732 2047 "VCC" "14" "square,edge2"] + Pad[6298 20393 6298 22912 1417 1732 2047 "PB0/SS/PCINT0" "8" "square,edge2"] + Pad[6298 -22913 6298 -20394 1417 1732 2047 "PD6/T1/OC4D/ADC9" "26" "square"] + Pad[-22913 6298 -20394 6298 1417 1732 2047 "PF0/ADC0" "41" "square"] + Pad[20393 6298 22912 6298 1417 1732 2047 "GND" "15" "square,edge2"] + Pad[3149 20393 3149 22912 1417 1732 2047 "VBus" "7" "square,edge2"] + Pad[3149 -22913 3149 -20394 1417 1732 2047 "PD7/T0/OC4D/ADC10" "27" "square"] + Pad[-22913 3149 -20394 3149 1417 1732 2047 "PF1/ADC1" "40" "square"] + Pad[20393 3149 22912 3149 1417 1732 2047 "XTAL2" "16" "square,edge2"] + Pad[0 20393 0 22912 1417 1732 2047 "UCap" "6" "square,edge2"] + Pad[0 -22913 0 -20394 1417 1732 2047 "PB4/PCINT4/ADC11" "28" "square"] + Pad[-22913 0 -20394 0 1417 1732 2047 "PF4/ADC4/TCK" "39" "square"] + Pad[20393 0 22912 0 1417 1732 2047 "XTAL1" "17" "square,edge2"] + Pad[-3150 20393 -3150 22912 1417 1732 2047 "UGnd" "5" "square,edge2"] + Pad[-3150 -22913 -3150 -20394 1417 1732 2047 "PB5/PCINT5/OC1A/OC4B/ADC12" "29" "square"] + Pad[-22913 -3150 -20394 -3150 1417 1732 2047 "PF5/ADC5/TMS" "38" "square"] + Pad[20393 -3150 22912 -3150 1417 1732 2047 "PD0/OC0B/SCL/INT0" "18" "square,edge2"] + Pad[-6299 20393 -6299 22912 1417 1732 2047 "D+" "4" "square,edge2"] + Pad[-6299 -22913 -6299 -20394 1417 1732 2047 "PB6/PCINT6/OC1B/OC4B/ADC13" "30" "square"] + Pad[-22913 -6299 -20394 -6299 1417 1732 2047 "PF6/ADC6/TDO" "37" "square"] + Pad[20393 -6299 22912 -6299 1417 1732 2047 "PD1/SDA/INT1" "19" "square,edge2"] + Pad[-9449 20393 -9449 22912 1417 1732 2047 "D-" "3" "square,edge2"] + Pad[-9449 -22913 -9449 -20394 1417 1732 2047 "PC6/OC3A/OC4A" "31" "square"] + Pad[-22913 -9449 -20394 -9449 1417 1732 2047 "PF7/ADC7/TDI" "36" "square"] + Pad[20393 -9449 22912 -9449 1417 1732 2047 "PD2/RXD1/INT2" "20" "square,edge2"] + Pad[-12598 20393 -12598 22912 1417 1732 2047 "UVcc" "2" "square,edge2"] + Pad[-12598 -22913 -12598 -20394 1417 1732 2047 "PC7/ICP3/CLK0/OC4A" "32" "square"] + Pad[-22913 -12598 -20394 -12598 1417 1732 2047 "GND" "35" "square"] + Pad[20393 -12598 22912 -12598 1417 1732 2047 "PD3/TXD1/INT3" "21" "square,edge2"] + Pad[-15748 20393 -15748 22912 1417 1732 2047 "PE6/INT6/AIN0" "1" "square,edge2"] + Pad[-15748 -22913 -15748 -20394 1417 1732 2047 "PE2/HWB" "33" "square"] + Pad[-22913 -15748 -20394 -15748 1417 1732 2047 "VCC" "34" "square"] + Pad[20393 -15748 22912 -15748 1417 1732 2047 "PD5/XCK1/CTS" "22" "square,edge2"] ElementLine [-19685 19684 19684 19684 1000] ElementLine [-19685 -19685 -19685 19684 1000] ElementLine [-19685 -19685 19684 -19685 1000]