From: Bdale Garbee <bdale@gag.com>
Date: Tue, 23 Nov 2010 05:50:54 +0000 (-0700)
Subject: add outline layer
X-Git-Tag: fab-v0.1~1
X-Git-Url: https://git.gag.com/?p=hw%2Ftelenano;a=commitdiff_plain;h=0239b00a2e1146f1596bd768c9c21207f15f9f9f

add outline layer
---

diff --git a/telenano.pcb b/telenano.pcb
index 757151f..7a9a9bc 100644
--- a/telenano.pcb
+++ b/telenano.pcb
@@ -1496,6 +1496,10 @@ Layer(2 "bottom")
 )
 Layer(3 "outline")
 (
+	Line[0 0 0 50000 1000 0 ""]
+	Line[0 50000 100000 50000 1000 0 ""]
+	Line[100000 50000 100000 0 1000 0 ""]
+	Line[100000 0 0 0 1000 0 ""]
 )
 Layer(4 "silk")
 (