add another via, update silk to reflect 2017 and beta status

diff --git a/telebt.pcb b/telebt.pcb
index 877a75a251b374b82c3f75c1034ae04b83ca196b..3d493498377c6b8ccf4f8485ce55b04e0f0801df 100644 (file)
--- a/telebt.pcb
+++ b/telebt.pcb
@@ -900,6 +900,7 @@ Via[1496.00mil 887.00mil 30.00mil 16.00mil 0.0000 15.00mil "" ""]
 Via[540.00mil 503.00mil 30.00mil 16.00mil 0.0000 15.00mil "" ""]
 Via[497.00mil 503.00mil 30.00mil 16.00mil 0.0000 15.00mil "" ""]
 Via[1523.00mil 857.00mil 30.00mil 16.00mil 0.0000 15.00mil "" ""]
+Via[217.00mil 271.00mil 30.00mil 16.00mil 0.0000 15.00mil "" "thermal(0S,1S,3S)"]
 
 Element["hidename,onsolder,lock" "hole-M2.5" "H2" "unknown" 56.9999mm 2.7500mm -45.91mil 27.69mil 0 100 "auto"]
 (
@@ -2200,10 +2201,10 @@ Layer(1 "top")
        Line[1115.00mil 293.00mil 1272.00mil 450.00mil 10.00mil 16.00mil "clearline"]
        Line[35.9117mm 19.7651mm 35.9117mm 20.4685mm 10.00mil 16.00mil "clearline"]
        Line[35.9117mm 20.4685mm 1434.00mil 826.00mil 10.00mil 16.00mil "clearline"]
-       Line[21.8694mm 736.69mil 26.1191mm 736.69mil 10.00mil 16.00mil "clearline"]
+       Line[861.00mil 736.69mil 26.1191mm 736.69mil 10.00mil 16.00mil "clearline"]
        Line[26.1191mm 736.69mil 1029.00mil 736.00mil 10.00mil 16.00mil "clearline"]
-       Line[36.9114mm 19.7651mm 36.9114mm 18.4456mm 10.00mil 16.00mil "clearline"]
-       Line[36.9114mm 18.4456mm 1353.00mil 626.00mil 10.00mil 16.00mil "clearline"]
+       Line[1453.20mil 19.7651mm 1453.20mil 18.4456mm 10.00mil 16.00mil "clearline"]
+       Line[1453.20mil 18.4456mm 1353.00mil 626.00mil 10.00mil 16.00mil "clearline"]
        Line[1353.00mil 626.00mil 1111.00mil 626.00mil 10.00mil 16.00mil "clearline"]
        Line[1111.00mil 626.00mil 925.00mil 440.00mil 10.00mil 16.00mil "clearline"]
        Line[925.00mil 440.00mil 748.00mil 440.00mil 10.00mil 16.00mil "clearline"]
@@ -2234,8 +2235,8 @@ Layer(1 "top")
        Line[1394.00mil 540.74mil 1418.00mil 516.74mil 10.00mil 16.00mil "clearline"]
        Line[12.6195mm 14.0621mm 12.6195mm 12.7805mm 10.00mil 16.00mil "clearline"]
        Line[12.6195mm 12.7805mm 497.00mil 503.00mil 10.00mil 16.00mil "clearline"]
-       Line[13.7193mm 14.0621mm 13.7193mm 12.7795mm 10.00mil 16.00mil "clearline"]
-       Line[13.7193mm 12.7795mm 540.00mil 503.00mil 10.00mil 16.00mil "clearline"]
+       Line[540.13mil 14.0621mm 540.13mil 503.13mil 10.00mil 16.00mil "clearline"]
+       Line[540.13mil 503.13mil 540.00mil 503.00mil 10.00mil 16.00mil "clearline"]
        Line[38.4113mm 19.7651mm 38.4113mm 20.6945mm 10.00mil 16.00mil "clearline"]
        Line[38.4113mm 20.6945mm 1494.00mil 833.00mil 10.00mil 16.00mil "clearline"]
        Line[1494.00mil 833.00mil 1494.00mil 890.00mil 10.00mil 16.00mil "clearline"]
@@ -2384,8 +2385,8 @@ Layer(5 "outline")
 )
 Layer(6 "silk")
 (
-       Text[732.00mil 19.6489mm 0 200 "TeleBT v4.0" "clearline,onsolder"]
-       Text[726.00mil 14.7975mm 0 100 "` 2016 Bdale Garbee" "clearline,onsolder"]
+       Text[732.00mil 19.6489mm 0 200 "TeleBT v4.0 beta 1" "clearline,onsolder"]
+       Text[726.00mil 14.7975mm 0 100 "` 2017 Bdale Garbee" "clearline,onsolder"]
        Text[732.00mil 12.3337mm 0 100 "Licensed under the TAPR OHL" "clearline,onsolder"]
        Text[1768.00mil 9.2349mm 0 100 "debug" "clearline,onsolder"]
        Text[734.00mil 9.9715mm 0 100 "http://altusmetrum.org/TeleBT" "clearline,onsolder"]