From 9d5239d316a5c15cefd9de0c7ab14c6d68485ccc Mon Sep 17 00:00:00 2001 From: Bdale Garbee Date: Sun, 14 Jul 2013 02:55:29 -0400 Subject: [PATCH] fix outline layer to not trigger DRC errors --- lipocharger.pcb | 1 + 1 file changed, 1 insertion(+) diff --git a/lipocharger.pcb b/lipocharger.pcb index d51255b..77d5f99 100644 --- a/lipocharger.pcb +++ b/lipocharger.pcb @@ -995,6 +995,7 @@ Layer(2 "bottom") ) Layer(3 "outline") ( + Attribute("PCB::skip-drc" "1") Line[0.0000 0.0000 0.0000 400.00mil 10.00mil 0.0000 ""] Line[0.0000 400.00mil 1000.00mil 400.00mil 10.00mil 0.0000 ""] Line[1000.00mil 400.00mil 1000.00mil 0.0000 10.00mil 0.0000 ""] -- 2.30.2