hide all refdes in silk

[hw/easymini] / project

diff --git a/project b/project
index 49171ef80086d0834245dbac0064d3db4b50e860..6a09b2a1c5ff0e24a43897541f25c176c9fe6a3b 100644 (file)
--- a/project
+++ b/project
@@ -1,10 +1,10 @@
 # List all the schematics to be netlisted and laid out on the pc board
-schematics     easymetrum.sch
+schematics     easymini.sch
 
 # for an output-name of foo, gsch2pcb generates files foo.net, foo.pcb,
 # and foo.new.pcb.  if there is no output name specified, the file names
 # are derived from the first listed schematic...
-output-name    easymetrum
+output-name    easymini
 
 elements-dir ../altusmetrum/packages