hide all refdes in silk

[hw/easymini] / project

diff --git a/project b/project
index 1c17d5a5e52ddf456110e96f9ad4f1e484da4c8f..6a09b2a1c5ff0e24a43897541f25c176c9fe6a3b 100644 (file)
--- a/project
+++ b/project
@@ -1,13 +1,12 @@
 # List all the schematics to be netlisted and laid out on the pc board
-schematics     easymetrum.sch
+schematics     easymini.sch
 
 # for an output-name of foo, gsch2pcb generates files foo.net, foo.pcb,
 # and foo.new.pcb.  if there is no output name specified, the file names
 # are derived from the first listed schematic...
-output-name    easymetrum
+output-name    easymini
 
 elements-dir ../altusmetrum/packages
-elements-dir /usr/share/pcb
 
 # stick to newlib elements, don't use the older/odder m4 stuff
 skip-m4