From: Bdale Garbee <bdale@gag.com>
Date: Mon, 2 Apr 2018 04:29:45 +0000 (-0600)
Subject: lose the 10k pull-down on boot0
X-Git-Tag: fab-v2-proto1
X-Git-Url: https://git.gag.com/?p=hw%2Feasymega;a=commitdiff_plain;h=e7898cb257d8cbdd1332fb24108a8aa42d96791d

lose the 10k pull-down on boot0
---

diff --git a/easymega.pcb b/easymega.pcb
index beb9e8e..ab6dbe0 100644
--- a/easymega.pcb
+++ b/easymega.pcb
@@ -1462,13 +1462,6 @@ Element["hidename" "0402" "C610" "0.1uF" 44.1010mm 920.00mil 53.50mil 72.50mil 2
 
 	)
 
-Element["hidename" "0402" "R402" "10k" 1396.00mil 660.00mil 31.50mil 31.50mil 2 100 ""]
-(
-	Pad[15.74mil -3.93mil 15.74mil 3.93mil 19.68mil 20.00mil 25.68mil "1" "1" "square"]
-	Pad[-15.74mil -3.93mil -15.74mil 3.93mil 19.68mil 20.00mil 25.68mil "2" "2" "square"]
-
-	)
-
 Element["hidename" "0402" "R53" "1k" 36.7815mm 3.8605mm -16.50mil -42.50mil 3 100 ""]
 (
 	Pad[-3.93mil -15.74mil 3.93mil -15.74mil 19.68mil 20.00mil 25.68mil "1" "1" "square"]
@@ -2232,10 +2225,7 @@ Layer(1 "top" "copper")
 	Line[40.9539mm 477.36mil 1712.00mil 577.00mil 10.00mil 16.00mil "clearline"]
 	Line[37.9381mm 713.57mil 36.0027mm 713.57mil 10.00mil 16.00mil "clearline"]
 	Line[36.0027mm 713.57mil 1417.00mil 714.00mil 10.00mil 16.00mil "clearline"]
-	Line[1385.00mil 660.00mil 1385.00mil 693.84mil 10.00mil 16.00mil "clearline"]
 	Line[1385.00mil 693.84mil 1355.00mil 723.84mil 10.00mil 16.00mil "clearline"]
-	Line[37.9381mm 693.89mil 36.8394mm 693.89mil 10.00mil 16.00mil "clearline"]
-	Line[36.8394mm 693.89mil 35.9786mm 660.00mil 10.00mil 16.00mil "clearline"]
 	Line[49.4377mm 575.79mil 48.0113mm 575.79mil 10.00mil 16.00mil "clearline"]
 	Line[48.0113mm 575.79mil 1890.00mil 576.00mil 10.00mil 16.00mil "clearline"]
 	Line[37.9381mm 772.63mil 37.3982mm 772.63mil 10.00mil 16.00mil "clearline"]
@@ -2643,6 +2633,10 @@ Layer(1 "top" "copper")
 	Line[1751.00mil 121.00mil 1790.00mil 160.00mil 8.00mil 16.00mil "clearline"]
 	Line[1240.00mil 1190.00mil 1240.00mil 995.00mil 8.00mil 16.00mil "clearline"]
 	Line[1240.00mil 995.00mil 1228.00mil 983.00mil 8.00mil 16.00mil "clearline"]
+	Line[37.9381mm 693.89mil 36.5986mm 693.89mil 8.00mil 16.00mil "clearline"]
+	Line[36.5986mm 693.89mil 1436.00mil 689.00mil 8.00mil 16.00mil "clearline"]
+	Line[1436.00mil 689.00mil 35.3019mm 689.00mil 8.00mil 16.00mil "clearline"]
+	Line[35.3019mm 689.00mil 1355.00mil 723.84mil 8.00mil 16.00mil "clearline"]
 )
 Layer(2 "GND plane" "copper")
 (
@@ -3106,11 +3100,6 @@ NetList()
 		Connect("U7-16")
 		Connect("U8-2")
 	)
-	Net("boot0" "(unknown)")
-	(
-		Connect("R402-1")
-		Connect("U7-60")
-	)
 	Net("cmp_ldo_in" "(unknown)")
 	(
 		Connect("R36-1")
@@ -3300,7 +3289,6 @@ NetList()
 		Connect("R39-1")
 		Connect("R51-1")
 		Connect("R401-2")
-		Connect("R402-2")
 		Connect("U1-2")
 		Connect("U2-2")
 		Connect("U3-2")
@@ -3313,6 +3301,7 @@ NetList()
 		Connect("U7-18")
 		Connect("U7-31")
 		Connect("U7-47")
+		Connect("U7-60")
 		Connect("U7-63")
 		Connect("U8-1")
 		Connect("U12-11")
diff --git a/easymega.sch b/easymega.sch
index d8e5d23..3081c0a 100644
--- a/easymega.sch
+++ b/easymega.sch
@@ -1281,24 +1281,7 @@ N 54500 69900 54800 69900 4
 N 53100 69900 54100 69900 4
 N 54100 69900 54100 69500 4
 N 54100 69500 54800 69500 4
-C 53400 68000 1 180 0 resistor.sym
-{
-T 53100 67600 5 10 0 0 180 0 1
-device=RESISTOR
-T 52950 68225 5 10 1 1 180 0 1
-refdes=R402
-T 53000 68100 5 10 1 1 0 0 1
-value=10k
-T 53400 68000 5 10 0 0 90 0 1
-footprint=0402
-T 53400 68000 5 10 0 0 90 0 1
-vendor_part_number=P10.0KLCT-ND
-T 53400 68000 5 10 0 0 90 0 1
-vendor=digikey
-T 53400 68000 5 10 0 1 90 0 1
-loadstatus=smt
-}
-C 52400 67600 1 0 0 gnd.sym
+C 53300 67600 1 0 0 gnd.sym
 N 53400 67900 54800 67900 4
 {
 T 53500 68000 5 10 1 1 0 0 1