From fb3cd8d1987b3e4d0a09ece97b3124e954c5f949 Mon Sep 17 00:00:00 2001 From: Keith Packard Date: Wed, 10 Jan 2024 17:26:12 -0700 Subject: [PATCH] altos/stm32f1: Add STM_RCC_CFGR_PLLXTPRE_MASK value Necessary when setting the PLLXTPRE value Signed-off-by: Keith Packard --- src/stm32f1/stm32f1.h | 9 +-------- 1 file changed, 1 insertion(+), 8 deletions(-) diff --git a/src/stm32f1/stm32f1.h b/src/stm32f1/stm32f1.h index 9d59ebe5..196c8753 100644 --- a/src/stm32f1/stm32f1.h +++ b/src/stm32f1/stm32f1.h @@ -68,14 +68,6 @@ extern struct stm_rcc stm_rcc; #define STM_RCC_CR_HSIRDY (1) #define STM_RCC_CR_HSION (0) -#define STM_RCC_CFGR_MCOPRE (28) -#define STM_RCC_CFGR_MCOPRE_DIV_1 0 -#define STM_RCC_CFGR_MCOPRE_DIV_2 1 -#define STM_RCC_CFGR_MCOPRE_DIV_4 2 -#define STM_RCC_CFGR_MCOPRE_DIV_8 3 -#define STM_RCC_CFGR_MCOPRE_DIV_16 4 -#define STM_RCC_CFGR_MCOPRE_MASK 7UL - #define STM_RCC_CFGR_MCO (24) #define STM_RCC_CFGR_MCO_DISABLE 0 #define STM_RCC_CFGR_MCO_SYSCLK 4 @@ -109,6 +101,7 @@ extern struct stm_rcc stm_rcc; #define STM_RCC_CFGR_PLLXTPRE (17) #define STM_RCC_CFGR_PLLXTPRE_1 0 #define STM_RCC_CFGR_PLLXTPRE_2 1 +#define STM_RCC_CFGR_PLLXTPRE_MASK 1UL #define STM_RCC_CFGR_PLLSRC (16) #define STM_RCC_CFGR_PLLSRC_HSI_2 0 -- 2.30.2