From b2d4e49bfe88aa61ca36fb1af8f3088c5754304c Mon Sep 17 00:00:00 2001
From: Keith Packard <keithp@keithp.com>
Date: Mon, 29 Aug 2011 14:22:19 -0700
Subject: [PATCH] altos: Split avr clock initialization to ao_clock.c

This will be shared with the attiny code for TeleTerra v0.1

Signed-off-by: Keith Packard <keithp@keithp.com>
---
 src/avr/ao_clock.c            | 77 +++++++++++++++++++++++++++++++++++
 src/avr/ao_timer.c            | 58 --------------------------
 src/telescience-v0.1/Makefile |  1 +
 3 files changed, 78 insertions(+), 58 deletions(-)
 create mode 100644 src/avr/ao_clock.c

diff --git a/src/avr/ao_clock.c b/src/avr/ao_clock.c
new file mode 100644
index 00000000..0d42b6d5
--- /dev/null
+++ b/src/avr/ao_clock.c
@@ -0,0 +1,77 @@
+/*
+ * Copyright © 2011 Keith Packard <keithp@keithp.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+ */
+
+#include "ao.h"
+
+/*
+ * AltOS always cranks the clock to the max frequency
+ */
+
+void
+ao_clock_init(void)
+{
+	/* disable RC clock */
+	CLKSEL0 &= ~(1 << RCE);
+
+	/* Disable PLL */
+	PLLCSR &= ~(1 << PLLE);
+
+	/* Enable external clock */
+	CLKSEL0 |= (1 << EXTE);
+
+	/* wait for external clock to be ready */
+	while ((CLKSTA & (1 << EXTON)) == 0)
+		;
+
+	/* select external clock */
+	CLKSEL0 |= (1 << CLKS);
+
+	/* Disable the clock prescaler */
+	cli();
+	CLKPR = (1 << CLKPCE);
+
+	/* Always run the system clock at 8MHz */
+#if AVR_CLOCK > 12000000UL
+	CLKPR = 1;
+#else
+	CLKPR = 0;
+#endif
+	sei();
+
+	/* Set up the PLL to use the crystal */
+
+	/* Use primary system clock as PLL source */
+	PLLFRQ = ((0 << PINMUX) |	/* Use primary clock */
+		  (0 << PLLUSB) |	/* No divide by 2 for USB */
+		  (0 << PLLTM0) |	/* Disable high speed timer */
+		  (0x4 << PDIV0));	/* 48MHz PLL clock */
+
+	/* Set the frequency of the crystal */
+#if AVR_CLOCK > 12000000UL
+	PLLCSR |= (1 << PINDIV);	/* For 16MHz crystal on Teensy board */
+#else
+	PLLCSR &= ~(1 << PINDIV);	/* For 8MHz crystal on TeleScience board */
+#endif
+
+	/* Enable the PLL */
+	PLLCSR |= (1 << PLLE);
+	while (!(PLLCSR & (1 << PLOCK)))
+		;
+
+	set_sleep_mode(SLEEP_MODE_IDLE);
+	sleep_enable();
+}
diff --git a/src/avr/ao_timer.c b/src/avr/ao_timer.c
index 1e374c75..eef14345 100644
--- a/src/avr/ao_timer.c
+++ b/src/avr/ao_timer.c
@@ -87,61 +87,3 @@ ao_timer_init(void)
 
 	TIMSK1 = (1 << OCIE1A);		/* Interrupt on compare match */
 }
-
-/*
- * AltOS always cranks the clock to the max frequency
- */
-void
-ao_clock_init(void)
-{
-	/* disable RC clock */
-	CLKSEL0 &= ~(1 << RCE);
-
-	/* Disable PLL */
-	PLLCSR &= ~(1 << PLLE);
-
-	/* Enable external clock */
-	CLKSEL0 |= (1 << EXTE);
-
-	/* wait for external clock to be ready */
-	while ((CLKSTA & (1 << EXTON)) == 0)
-		;
-
-	/* select external clock */
-	CLKSEL0 |= (1 << CLKS);
-
-	/* Disable the clock prescaler */
-	cli();
-	CLKPR = (1 << CLKPCE);
-
-	/* Always run the system clock at 8MHz */
-#if AVR_CLOCK > 12000000UL
-	CLKPR = 1;
-#else
-	CLKPR = 0;
-#endif
-	sei();
-
-	/* Set up the PLL to use the crystal */
-
-	/* Use primary system clock as PLL source */
-	PLLFRQ = ((0 << PINMUX) |	/* Use primary clock */
-		  (0 << PLLUSB) |	/* No divide by 2 for USB */
-		  (0 << PLLTM0) |	/* Disable high speed timer */
-		  (0x4 << PDIV0));	/* 48MHz PLL clock */
-
-	/* Set the frequency of the crystal */
-#if AVR_CLOCK > 12000000UL
-	PLLCSR |= (1 << PINDIV);	/* For 16MHz crystal on Teensy board */
-#else
-	PLLCSR &= ~(1 << PINDIV);	/* For 8MHz crystal on TeleScience board */
-#endif
-
-	/* Enable the PLL */
-	PLLCSR |= (1 << PLLE);
-	while (!(PLLCSR & (1 << PLOCK)))
-		;
-
-	set_sleep_mode(SLEEP_MODE_IDLE);
-	sleep_enable();
-}
diff --git a/src/telescience-v0.1/Makefile b/src/telescience-v0.1/Makefile
index 282829e7..28620242 100644
--- a/src/telescience-v0.1/Makefile
+++ b/src/telescience-v0.1/Makefile
@@ -33,6 +33,7 @@ TELESCIENCE_STORAGE= \
 	ao_storage.c \
 
 ALTOS_SRC = \
+	ao_clock.c \
 	ao_cmd.c \
 	ao_mutex.c \
 	ao_panic.c \
-- 
2.30.2