From: Keith Packard <keithp@keithp.com>
Date: Tue, 30 Jan 2024 20:33:22 +0000 (-0800)
Subject: altos/lpc: Adjust ADC clock from 450kHz to 4.5MHz
X-Git-Tag: 1.9.18~2^2~93
X-Git-Url: https://git.gag.com/?p=fw%2Faltos;a=commitdiff_plain;h=e8b0ac5a17d2fb5a0d99ea86c3a2e1c780d3adf3

altos/lpc: Adjust ADC clock from 450kHz to 4.5MHz

A missing zero. Also, let products change this value if desired to
improve high-impedence performance.

Signed-off-by: Keith Packard <keithp@keithp.com>
---

diff --git a/src/lpc/ao_adc_lpc.c b/src/lpc/ao_adc_lpc.c
index 29d3668c..1fbf1366 100644
--- a/src/lpc/ao_adc_lpc.c
+++ b/src/lpc/ao_adc_lpc.c
@@ -57,7 +57,10 @@
 /* ADC clock is divided by this value + 1, which ensures that
  * the ADC clock will be strictly less than 4.5MHz as required
  */
-#define AO_ADC_CLKDIV	(AO_LPC_SYSCLK / 450000)
+#ifndef AO_LPC_ADC_CLOCK
+#define AO_LPC_ADC_CLOCK	4500000
+#endif
+#define AO_ADC_CLKDIV	(AO_LPC_SYSCLK / AO_LPC_ADC_CLOCK)
 
 static uint8_t		ao_adc_ready;
 static uint8_t		ao_adc_sequence;