altos: Split avr clock initialization to ao_clock.c

This will be shared with the attiny code for TeleTerra v0.1

Signed-off-by: Keith Packard <keithp@keithp.com>

diff --git a/src/avr/ao_clock.c b/src/avr/ao_clock.c
new file mode 100644 (file)
index 0000000..0d42b6d
--- /dev/null
+++ b/src/avr/ao_clock.c
@@ -0,0 +1,77 @@
+/*
+ * Copyright © 2011 Keith Packard <keithp@keithp.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+ * General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License along
+ * with this program; if not, write to the Free Software Foundation, Inc.,
+ * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
+ */
+
+#include "ao.h"
+
+/*
+ * AltOS always cranks the clock to the max frequency
+ */
+
+void
+ao_clock_init(void)
+{
+       /* disable RC clock */
+       CLKSEL0 &= ~(1 << RCE);
+
+       /* Disable PLL */
+       PLLCSR &= ~(1 << PLLE);
+
+       /* Enable external clock */
+       CLKSEL0 |= (1 << EXTE);
+
+       /* wait for external clock to be ready */
+       while ((CLKSTA & (1 << EXTON)) == 0)
+               ;
+
+       /* select external clock */
+       CLKSEL0 |= (1 << CLKS);
+
+       /* Disable the clock prescaler */
+       cli();
+       CLKPR = (1 << CLKPCE);
+
+       /* Always run the system clock at 8MHz */
+#if AVR_CLOCK > 12000000UL
+       CLKPR = 1;
+#else
+       CLKPR = 0;
+#endif
+       sei();
+
+       /* Set up the PLL to use the crystal */
+
+       /* Use primary system clock as PLL source */
+       PLLFRQ = ((0 << PINMUX) |       /* Use primary clock */
+                 (0 << PLLUSB) |       /* No divide by 2 for USB */
+                 (0 << PLLTM0) |       /* Disable high speed timer */
+                 (0x4 << PDIV0));      /* 48MHz PLL clock */
+
+       /* Set the frequency of the crystal */
+#if AVR_CLOCK > 12000000UL
+       PLLCSR |= (1 << PINDIV);        /* For 16MHz crystal on Teensy board */
+#else
+       PLLCSR &= ~(1 << PINDIV);       /* For 8MHz crystal on TeleScience board */
+#endif
+
+       /* Enable the PLL */
+       PLLCSR |= (1 << PLLE);
+       while (!(PLLCSR & (1 << PLOCK)))
+               ;
+
+       set_sleep_mode(SLEEP_MODE_IDLE);
+       sleep_enable();
+}

diff --git a/src/avr/ao_timer.c b/src/avr/ao_timer.c
index 1e374c75a4c99fac30e8a28ff229b8a6c449633b..eef14345dda7d5bf96a09881c61c6b27915c4975 100644 (file)
--- a/src/avr/ao_timer.c
+++ b/src/avr/ao_timer.c
@@ -87,61 +87,3 @@ ao_timer_init(void)
 
        TIMSK1 = (1 << OCIE1A);         /* Interrupt on compare match */
 }
-
-/*
- * AltOS always cranks the clock to the max frequency
- */
-void
-ao_clock_init(void)
-{
-       /* disable RC clock */
-       CLKSEL0 &= ~(1 << RCE);
-
-       /* Disable PLL */
-       PLLCSR &= ~(1 << PLLE);
-
-       /* Enable external clock */
-       CLKSEL0 |= (1 << EXTE);
-
-       /* wait for external clock to be ready */
-       while ((CLKSTA & (1 << EXTON)) == 0)
-               ;
-
-       /* select external clock */
-       CLKSEL0 |= (1 << CLKS);
-
-       /* Disable the clock prescaler */
-       cli();
-       CLKPR = (1 << CLKPCE);
-
-       /* Always run the system clock at 8MHz */
-#if AVR_CLOCK > 12000000UL
-       CLKPR = 1;
-#else
-       CLKPR = 0;
-#endif
-       sei();
-
-       /* Set up the PLL to use the crystal */
-
-       /* Use primary system clock as PLL source */
-       PLLFRQ = ((0 << PINMUX) |       /* Use primary clock */
-                 (0 << PLLUSB) |       /* No divide by 2 for USB */
-                 (0 << PLLTM0) |       /* Disable high speed timer */
-                 (0x4 << PDIV0));      /* 48MHz PLL clock */
-
-       /* Set the frequency of the crystal */
-#if AVR_CLOCK > 12000000UL
-       PLLCSR |= (1 << PINDIV);        /* For 16MHz crystal on Teensy board */
-#else
-       PLLCSR &= ~(1 << PINDIV);       /* For 8MHz crystal on TeleScience board */
-#endif
-
-       /* Enable the PLL */
-       PLLCSR |= (1 << PLLE);
-       while (!(PLLCSR & (1 << PLOCK)))
-               ;
-
-       set_sleep_mode(SLEEP_MODE_IDLE);
-       sleep_enable();
-}

diff --git a/src/telescience-v0.1/Makefile b/src/telescience-v0.1/Makefile
index 282829e7c476520f8e5d5a0d00695acacd17ecd3..28620242107249b0b9418495a68bf19d5ea25a7b 100644 (file)
--- a/src/telescience-v0.1/Makefile
+++ b/src/telescience-v0.1/Makefile
@@ -33,6 +33,7 @@ TELESCIENCE_STORAGE= \
        ao_storage.c \
 
 ALTOS_SRC = \
+       ao_clock.c \
        ao_cmd.c \
        ao_mutex.c \
        ao_panic.c \