X-Git-Url: https://git.gag.com/?p=fw%2Faltos;a=blobdiff_plain;f=src%2Fstm%2Fao_flash_stm_pins.h;fp=src%2Fstm%2Fao_flash_stm_pins.h;h=b82046d7fca221ec200ddb00e84aad75ea3c7ccb;hp=d5893c80a4cc96db463c0891087a6d883e92bf69;hb=0686a7b8aec524d81bda4c572549a3a068ce0eed;hpb=6aa451ce81bfdfe679e3f9902043a5f0d235c745

diff --git a/src/stm/ao_flash_stm_pins.h b/src/stm/ao_flash_stm_pins.h
index d5893c80..b82046d7 100644
--- a/src/stm/ao_flash_stm_pins.h
+++ b/src/stm/ao_flash_stm_pins.h
@@ -21,6 +21,10 @@
 
 #include <ao_flash_pins.h>
 
+#ifndef AO_PLLMUL
+
+#if AO_HSE == 8000000
+
 /* PLLVCO = 96MHz (so that USB will work) */
 #define AO_PLLMUL		12
 #define AO_RCC_CFGR_PLLMUL	(STM_RCC_CFGR_PLLMUL_12)
@@ -29,6 +33,22 @@
 #define AO_PLLDIV		3
 #define AO_RCC_CFGR_PLLDIV	(STM_RCC_CFGR_PLLDIV_3)
 
+#endif
+
+#if AO_HSE == 16000000
+
+/* PLLVCO = 96MHz (so that USB will work) */
+#define AO_PLLMUL		6
+#define AO_RCC_CFGR_PLLMUL	(STM_RCC_CFGR_PLLMUL_6)
+
+/* SYSCLK = 32MHz */
+#define AO_PLLDIV		3
+#define AO_RCC_CFGR_PLLDIV	(STM_RCC_CFGR_PLLDIV_3)
+
+#endif
+
+#endif
+
 /* HCLK = 32MHZ (CPU clock) */
 #define AO_AHB_PRESCALER	1
 #define AO_RCC_CFGR_HPRE_DIV	STM_RCC_CFGR_HPRE_DIV_1