From ffd03f1f7e717b86213eb1a463315a42f2e52d16 Mon Sep 17 00:00:00 2001 From: tecodev Date: Thu, 31 May 2007 22:42:43 +0000 Subject: [PATCH] * doc/sdccman.lyx: added --disable-pic16-port, fixed some `--' and quotation marks, clarified role of PIC14 vs. PIC16 ports * src/pic16/devices.inc, * device/include/pic16/pic18fregs.h, * device/include/pic16/pic18f[24][45]j10.h, * device/lib/pic16/pics.all, * device/lib/pic16/libdev/pic18f[24][45]j10.c: added support for 18f24j10, 18f25j10, 18f44j10, and 18f45j10 * device/lib/pic16/libio/{i2c,adc,usart}.ignore: do not build IO libs for new devices as they are not yet supported by gputils git-svn-id: https://sdcc.svn.sourceforge.net/svnroot/sdcc/trunk/sdcc@4821 4a8a32a2-be11-0410-ad9d-d568d2c75423 --- ChangeLog | 13 + device/include/pic16/pic18f24j10.h | 1521 +++++++++++++++++++++ device/include/pic16/pic18f25j10.h | 11 + device/include/pic16/pic18f44j10.h | 1825 +++++++++++++++++++++++++ device/include/pic16/pic18f45j10.h | 11 + device/include/pic16/pic18fregs.h | 12 + device/lib/pic16/libdev/pic18f24j10.c | 314 +++++ device/lib/pic16/libdev/pic18f25j10.c | 12 + device/lib/pic16/libdev/pic18f44j10.c | 354 +++++ device/lib/pic16/libdev/pic18f45j10.c | 12 + device/lib/pic16/libio/adc.ignore | 6 + device/lib/pic16/libio/i2c.ignore | 6 + device/lib/pic16/libio/usart.ignore | 6 + device/lib/pic16/pics.all | 4 + doc/sdccman.lyx | 282 +++- src/pic16/devices.inc | 88 ++ 16 files changed, 4407 insertions(+), 70 deletions(-) create mode 100644 device/include/pic16/pic18f24j10.h create mode 100644 device/include/pic16/pic18f25j10.h create mode 100644 device/include/pic16/pic18f44j10.h create mode 100644 device/include/pic16/pic18f45j10.h create mode 100644 device/lib/pic16/libdev/pic18f24j10.c create mode 100644 device/lib/pic16/libdev/pic18f25j10.c create mode 100644 device/lib/pic16/libdev/pic18f44j10.c create mode 100644 device/lib/pic16/libdev/pic18f45j10.c diff --git a/ChangeLog b/ChangeLog index 5ca141b0..a6eec059 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,16 @@ +2007-06-01 Raphael Neider + + * doc/sdccman.lyx: added --disable-pic16-port, fixed some `--' and + quotation marks, clarified role of PIC14 vs. PIC16 ports + * src/pic16/devices.inc, + * device/include/pic16/pic18fregs.h, + * device/include/pic16/pic18f[24][45]j10.h, + * device/lib/pic16/pics.all, + * device/lib/pic16/libdev/pic18f[24][45]j10.c: added support for + 18f24j10, 18f25j10, 18f44j10, and 18f45j10 + * device/lib/pic16/libio/{i2c,adc,usart}.ignore: do not build IO libs + for new devices as they are not yet supported by gputils + 2007-05-31 Borut Razem * Small Device C Compiler 2.7.0 released diff --git a/device/include/pic16/pic18f24j10.h b/device/include/pic16/pic18f24j10.h new file mode 100644 index 00000000..001daad0 --- /dev/null +++ b/device/include/pic16/pic18f24j10.h @@ -0,0 +1,1521 @@ +/* + * pic18f24j10.h - device specific declarations + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#ifndef __PIC18F24J10_H__ +#define __PIC18F24J10_H__ 1 + +#define _DEVID1 0x3FFFFE +#define _DEVID2 0x3FFFFF + +extern __sfr __at (0xF80) PORTA; +typedef union { + struct { + unsigned RA0 : 1; + unsigned RA1 : 1; + unsigned RA2 : 1; + unsigned RA3 : 1; + unsigned : 1; + unsigned RA5 : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned AN0 : 1; + unsigned AN1 : 1; + unsigned AN2 : 1; + unsigned AN3 : 1; + unsigned : 1; + unsigned AN4 : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned VREFM : 1; + unsigned VREFP : 1; + unsigned : 1; + unsigned SS1 : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned CVREF : 1; + unsigned : 1; + unsigned : 1; + unsigned C2OUT_PORTA : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_SS1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTAbits_t; +extern volatile __PORTAbits_t __at (0xF80) PORTAbits; + +extern __sfr __at (0xF81) PORTB; +typedef union { + struct { + unsigned RB0 : 1; + unsigned RB1 : 1; + unsigned RB2 : 1; + unsigned RB3 : 1; + unsigned RB4 : 1; + unsigned RB5 : 1; + unsigned RB6 : 1; + unsigned RB7 : 1; + }; + struct { + unsigned INT0 : 1; + unsigned INT1 : 1; + unsigned INT2 : 1; + unsigned CCP2_PORTB : 1; + unsigned KBI0 : 1; + unsigned KBI1 : 1; + unsigned KBI2 : 1; + unsigned KBI3 : 1; + }; + struct { + unsigned AN12 : 1; + unsigned AN10 : 1; + unsigned AN8 : 1; + unsigned AN9 : 1; + unsigned AN11 : 1; + unsigned T0CKI : 1; + unsigned PGC : 1; + unsigned PGD : 1; + }; + struct { + unsigned FLT0 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned C1OUT_PORTB : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTBbits_t; +extern volatile __PORTBbits_t __at (0xF81) PORTBbits; + +extern __sfr __at (0xF82) PORTC; +typedef union { + struct { + unsigned RC0 : 1; + unsigned RC1 : 1; + unsigned RC2 : 1; + unsigned RC3 : 1; + unsigned RC4 : 1; + unsigned RC5 : 1; + unsigned RC6 : 1; + unsigned RC7 : 1; + }; + struct { + unsigned T1OSO : 1; + unsigned T1OSI : 1; + unsigned CCP1 : 1; + unsigned SCK1 : 1; + unsigned SDI1 : 1; + unsigned SDO1 : 1; + unsigned TX : 1; + unsigned RX : 1; + }; + struct { + unsigned T1CKI : 1; + unsigned CCP2_PORTC : 1; + unsigned P1A : 1; + unsigned SCL1 : 1; + unsigned SDA1 : 1; + unsigned SDO : 1; + unsigned CK : 1; + unsigned DT : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SCK : 1; + unsigned SDI : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SCL : 1; + unsigned SDA : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTCbits_t; +extern volatile __PORTCbits_t __at (0xF82) PORTCbits; + +extern __sfr __at (0xF89) LATA; +typedef union { + struct { + unsigned LATA0 : 1; + unsigned LATA1 : 1; + unsigned LATA2 : 1; + unsigned LATA3 : 1; + unsigned : 1; + unsigned LATA5 : 1; + unsigned : 1; + unsigned : 1; + }; +} __LATAbits_t; +extern volatile __LATAbits_t __at (0xF89) LATAbits; + +extern __sfr __at (0xF8A) LATB; +typedef union { + struct { + unsigned LATB0 : 1; + unsigned LATB1 : 1; + unsigned LATB2 : 1; + unsigned LATB3 : 1; + unsigned LATB4 : 1; + unsigned LATB5 : 1; + unsigned LATB6 : 1; + unsigned LATB7 : 1; + }; +} __LATBbits_t; +extern volatile __LATBbits_t __at (0xF8A) LATBbits; + +extern __sfr __at (0xF8B) LATC; +typedef union { + struct { + unsigned LATC0 : 1; + unsigned LATC1 : 1; + unsigned LATC2 : 1; + unsigned LATC3 : 1; + unsigned LATC4 : 1; + unsigned LATC5 : 1; + unsigned LATC6 : 1; + unsigned LATC7 : 1; + }; +} __LATCbits_t; +extern volatile __LATCbits_t __at (0xF8B) LATCbits; + +extern __sfr __at (0xF92) DDRA; +typedef union { + struct { + unsigned RA0 : 1; + unsigned RA1 : 1; + unsigned RA2 : 1; + unsigned RA3 : 1; + unsigned : 1; + unsigned RA5 : 1; + unsigned : 1; + unsigned : 1; + }; +} __DDRAbits_t; +extern volatile __DDRAbits_t __at (0xF92) DDRAbits; + +extern __sfr __at (0xF92) TRISA; +typedef union { + struct { + unsigned TRISA0 : 1; + unsigned TRISA1 : 1; + unsigned TRISA2 : 1; + unsigned TRISA3 : 1; + unsigned : 1; + unsigned TRISA5 : 1; + unsigned : 1; + unsigned : 1; + }; +} __TRISAbits_t; +extern volatile __TRISAbits_t __at (0xF92) TRISAbits; + +extern __sfr __at (0xF93) DDRB; +typedef union { + struct { + unsigned RB0 : 1; + unsigned RB1 : 1; + unsigned RB2 : 1; + unsigned RB3 : 1; + unsigned RB4 : 1; + unsigned RB5 : 1; + unsigned RB6 : 1; + unsigned RB7 : 1; + }; +} __DDRBbits_t; +extern volatile __DDRBbits_t __at (0xF93) DDRBbits; + +extern __sfr __at (0xF93) TRISB; +typedef union { + struct { + unsigned TRISB0 : 1; + unsigned TRISB1 : 1; + unsigned TRISB2 : 1; + unsigned TRISB3 : 1; + unsigned TRISB4 : 1; + unsigned TRISB5 : 1; + unsigned TRISB6 : 1; + unsigned TRISB7 : 1; + }; +} __TRISBbits_t; +extern volatile __TRISBbits_t __at (0xF93) TRISBbits; + +extern __sfr __at (0xF94) DDRC; +typedef union { + struct { + unsigned RC0 : 1; + unsigned RC1 : 1; + unsigned RC2 : 1; + unsigned RC3 : 1; + unsigned RC4 : 1; + unsigned RC5 : 1; + unsigned RC6 : 1; + unsigned RC7 : 1; + }; +} __DDRCbits_t; +extern volatile __DDRCbits_t __at (0xF94) DDRCbits; + +extern __sfr __at (0xF94) TRISC; +typedef union { + struct { + unsigned TRISC0 : 1; + unsigned TRISC1 : 1; + unsigned TRISC2 : 1; + unsigned TRISC3 : 1; + unsigned TRISC4 : 1; + unsigned TRISC5 : 1; + unsigned TRISC6 : 1; + unsigned TRISC7 : 1; + }; +} __TRISCbits_t; +extern volatile __TRISCbits_t __at (0xF94) TRISCbits; + +extern __sfr __at (0xF9B) OSCTUNE; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned PLLEN : 1; + unsigned : 1; + }; +} __OSCTUNEbits_t; +extern volatile __OSCTUNEbits_t __at (0xF9B) OSCTUNEbits; + +extern __sfr __at (0xF9D) PIE1; +typedef union { + struct { + unsigned TMR1IE : 1; + unsigned TMR2IE : 1; + unsigned CCP1IE : 1; + unsigned SSPIE : 1; + unsigned TXIE : 1; + unsigned RCIE : 1; + unsigned ADIE : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SSP1IE : 1; + unsigned TX1IE : 1; + unsigned RC1IE : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIE1bits_t; +extern volatile __PIE1bits_t __at (0xF9D) PIE1bits; + +extern __sfr __at (0xF9E) PIR1; +typedef union { + struct { + unsigned TMR1IF : 1; + unsigned TMR2IF : 1; + unsigned CCP1IF : 1; + unsigned SSPIF : 1; + unsigned TXIF : 1; + unsigned RCIF : 1; + unsigned ADIF : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SSP1IF : 1; + unsigned TX1IF : 1; + unsigned RC1IF : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIR1bits_t; +extern volatile __PIR1bits_t __at (0xF9E) PIR1bits; + +extern __sfr __at (0xF9F) IPR1; +typedef union { + struct { + unsigned TMR1IP : 1; + unsigned TMR2IP : 1; + unsigned CCP1IP : 1; + unsigned SSPIP : 1; + unsigned TXIP : 1; + unsigned RCIP : 1; + unsigned ADIP : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SSP1IP : 1; + unsigned TX1IP : 1; + unsigned RC1IP : 1; + unsigned : 1; + unsigned : 1; + }; +} __IPR1bits_t; +extern volatile __IPR1bits_t __at (0xF9F) IPR1bits; + +extern __sfr __at (0xFA0) PIE2; +typedef union { + struct { + unsigned CCP2IE : 1; + unsigned : 1; + unsigned : 1; + unsigned BCLIE : 1; + unsigned : 1; + unsigned : 1; + unsigned CMIE : 1; + unsigned OSCFIE : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned BCL1IE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIE2bits_t; +extern volatile __PIE2bits_t __at (0xFA0) PIE2bits; + +extern __sfr __at (0xFA1) PIR2; +typedef union { + struct { + unsigned CCP2IF : 1; + unsigned : 1; + unsigned : 1; + unsigned BCLIF : 1; + unsigned : 1; + unsigned : 1; + unsigned CMIF : 1; + unsigned OSCFIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned BCL1IF : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIR2bits_t; +extern volatile __PIR2bits_t __at (0xFA1) PIR2bits; + +extern __sfr __at (0xFA2) IPR2; +typedef union { + struct { + unsigned CCP2IP : 1; + unsigned : 1; + unsigned : 1; + unsigned BCLIP : 1; + unsigned : 1; + unsigned : 1; + unsigned CMIP : 1; + unsigned OSCFIP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned BCL1IP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __IPR2bits_t; +extern volatile __IPR2bits_t __at (0xFA2) IPR2bits; + +extern __sfr __at (0xFA3) PIE3; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned BCL2IE : 1; + unsigned SSP2IE : 1; + }; +} __PIE3bits_t; +extern volatile __PIE3bits_t __at (0xFA3) PIE3bits; + +extern __sfr __at (0xFA4) PIR3; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned BCL2IF : 1; + unsigned SSP2IF : 1; + }; +} __PIR3bits_t; +extern volatile __PIR3bits_t __at (0xFA4) PIR3bits; + +extern __sfr __at (0xFA5) IPR3; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned BCL2IP : 1; + unsigned SSP2IP : 1; + }; +} __IPR3bits_t; +extern volatile __IPR3bits_t __at (0xFA5) IPR3bits; + +extern __sfr __at (0xFA6) EECON1; +typedef union { + struct { + unsigned : 1; + unsigned WR : 1; + unsigned WREN : 1; + unsigned WRERR : 1; + unsigned FREE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __EECON1bits_t; +extern volatile __EECON1bits_t __at (0xFA6) EECON1bits; + +extern __sfr __at (0xFA7) EECON2; + +extern __sfr __at (0xFAB) RCSTA; +typedef union { + struct { + unsigned RX9D : 1; + unsigned OERR : 1; + unsigned FERR : 1; + unsigned ADDEN : 1; + unsigned CREN : 1; + unsigned SREN : 1; + unsigned RX9 : 1; + unsigned SPEN : 1; + }; + struct { + unsigned RCD8 : 1; + unsigned : 1; + unsigned : 1; + unsigned ADEN : 1; + unsigned : 1; + unsigned : 1; + unsigned RC9 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_RC8 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RC8_9 : 1; + unsigned : 1; + }; +} __RCSTAbits_t; +extern volatile __RCSTAbits_t __at (0xFAB) RCSTAbits; + +extern __sfr __at (0xFAB) RCSTA1; +typedef union { + struct { + unsigned RX9D : 1; + unsigned OERR : 1; + unsigned FERR : 1; + unsigned ADDEN : 1; + unsigned CREN : 1; + unsigned SREN : 1; + unsigned RX9 : 1; + unsigned SPEN : 1; + }; + struct { + unsigned RCD8 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RC9 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_RC8 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RC8_9 : 1; + unsigned : 1; + }; +} __RCSTA1bits_t; +extern volatile __RCSTA1bits_t __at (0xFAB) RCSTA1bits; + +extern __sfr __at (0xFAC) TXSTA; +typedef union { + struct { + unsigned TX9D : 1; + unsigned TRMT : 1; + unsigned BRGH : 1; + unsigned SENDB : 1; + unsigned SYNC : 1; + unsigned TXEN : 1; + unsigned TX9 : 1; + unsigned CSRC : 1; + }; + struct { + unsigned TXD8 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TX8_9 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_TX8 : 1; + unsigned : 1; + }; +} __TXSTAbits_t; +extern volatile __TXSTAbits_t __at (0xFAC) TXSTAbits; + +extern __sfr __at (0xFAC) TXSTA1; +typedef union { + struct { + unsigned TX9D : 1; + unsigned TRMT : 1; + unsigned BRGH : 1; + unsigned SENDB : 1; + unsigned SYNC : 1; + unsigned TXEN : 1; + unsigned TX9 : 1; + unsigned CSRC : 1; + }; + struct { + unsigned TXD8 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TX8_9 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_TX8 : 1; + unsigned : 1; + }; +} __TXSTA1bits_t; +extern volatile __TXSTA1bits_t __at (0xFAC) TXSTA1bits; + +extern __sfr __at (0xFAD) TXREG; + +extern __sfr __at (0xFAD) TXREG1; + +extern __sfr __at (0xFAE) RCREG; + +extern __sfr __at (0xFAE) RCREG1; + +extern __sfr __at (0xFAF) SPBRG; + +extern __sfr __at (0xFAF) SPBRG1; + +extern __sfr __at (0xFB0) SPBRGH; + +extern __sfr __at (0xFB4) CMCON; +typedef union { + struct { + unsigned CM0 : 1; + unsigned CM1 : 1; + unsigned CM2 : 1; + unsigned CIS : 1; + unsigned C1INV : 1; + unsigned C2INV : 1; + unsigned C1OUT_CMCON : 1; + unsigned C2OUT_CMCON : 1; + }; +} __CMCONbits_t; +extern volatile __CMCONbits_t __at (0xFB4) CMCONbits; + +extern __sfr __at (0xFB5) CVRCON; +typedef union { + struct { + unsigned CVR0 : 1; + unsigned CVR1 : 1; + unsigned CVR2 : 1; + unsigned CVR3 : 1; + unsigned CVRSS : 1; + unsigned CVRR : 1; + unsigned CVROE : 1; + unsigned CVREN : 1; + }; +} __CVRCONbits_t; +extern volatile __CVRCONbits_t __at (0xFB5) CVRCONbits; + +extern __sfr __at (0xFB6) ECCP1AS; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned PSSAC0 : 1; + unsigned PSSAC1 : 1; + unsigned ECCPAS0 : 1; + unsigned ECCPAS1 : 1; + unsigned ECCPAS2 : 1; + unsigned ECCPASE : 1; + }; +} __ECCP1ASbits_t; +extern volatile __ECCP1ASbits_t __at (0xFB6) ECCP1ASbits; + +extern __sfr __at (0xFB7) ECCP1DEL; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned PRSEN : 1; + }; +} __ECCP1DELbits_t; +extern volatile __ECCP1DELbits_t __at (0xFB7) ECCP1DELbits; + +extern __sfr __at (0xFB7) PWM1CON; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned PRSEN : 1; + }; +} __PWM1CONbits_t; +extern volatile __PWM1CONbits_t __at (0xFB7) PWM1CONbits; + +extern __sfr __at (0xFB8) BAUDCON; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned : 1; + unsigned RCIDL : 1; + unsigned ABDOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RCMT : 1; + unsigned : 1; + }; +} __BAUDCONbits_t; +extern volatile __BAUDCONbits_t __at (0xFB8) BAUDCONbits; + +extern __sfr __at (0xFB8) BAUDCTL; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned : 1; + unsigned RCIDL : 1; + unsigned ABDOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RCMT : 1; + unsigned : 1; + }; +} __BAUDCTLbits_t; +extern volatile __BAUDCTLbits_t __at (0xFB8) BAUDCTLbits; + +extern __sfr __at (0xFBA) CCP2CON; +typedef union { + struct { + unsigned CCP2M0 : 1; + unsigned CCP2M1 : 1; + unsigned CCP2M2 : 1; + unsigned CCP2M3 : 1; + unsigned DC2B0 : 1; + unsigned DC2B1 : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP2Y : 1; + unsigned CCP2X : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP2CONbits_t; +extern volatile __CCP2CONbits_t __at (0xFBA) CCP2CONbits; + +extern __sfr __at (0xFBB) CCPR2; + +extern __sfr __at (0xFBB) CCPR2L; + +extern __sfr __at (0xFBC) CCPR2H; + +extern __sfr __at (0xFBD) CCP1CON; +typedef union { + struct { + unsigned CCP1M0 : 1; + unsigned CCP1M1 : 1; + unsigned CCP1M2 : 1; + unsigned CCP1M3 : 1; + unsigned DC1B0 : 1; + unsigned DC1B1 : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP1Y : 1; + unsigned CCP1X : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP1CONbits_t; +extern volatile __CCP1CONbits_t __at (0xFBD) CCP1CONbits; + +extern __sfr __at (0xFBE) CCPR1; + +extern __sfr __at (0xFBE) CCPR1L; + +extern __sfr __at (0xFBF) CCPR1H; + +extern __sfr __at (0xFC0) ADCON2; +typedef union { + struct { + unsigned ADCS0 : 1; + unsigned ADCS1 : 1; + unsigned ADCS2 : 1; + unsigned ACQT0 : 1; + unsigned ACQT1 : 1; + unsigned ACQT2 : 1; + unsigned : 1; + unsigned ADFM : 1; + }; +} __ADCON2bits_t; +extern volatile __ADCON2bits_t __at (0xFC0) ADCON2bits; + +extern __sfr __at (0xFC1) ADCON1; +typedef union { + struct { + unsigned PCFG0 : 1; + unsigned PCFG1 : 1; + unsigned PCFG2 : 1; + unsigned PCFG3 : 1; + unsigned VCFG0 : 1; + unsigned VCFG1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON1bits_t; +extern volatile __ADCON1bits_t __at (0xFC1) ADCON1bits; + +extern __sfr __at (0xFC2) ADCON0; +typedef union { + struct { + unsigned ADON : 1; + unsigned DONE : 1; + unsigned CHS0 : 1; + unsigned CHS1 : 1; + unsigned CHS2 : 1; + unsigned CHS3 : 1; + unsigned : 1; + unsigned ADCAL : 1; + }; + struct { + unsigned : 1; + unsigned GO_DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned GO : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned NOT_DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON0bits_t; +extern volatile __ADCON0bits_t __at (0xFC2) ADCON0bits; + +extern __sfr __at (0xFC3) ADRES; + +extern __sfr __at (0xFC3) ADRESL; + +extern __sfr __at (0xFC4) ADRESH; + +extern __sfr __at (0xFC5) SSP1CON2; +typedef union { + struct { + unsigned SEN : 1; + unsigned RSEN : 1; + unsigned PEN : 1; + unsigned RCEN : 1; + unsigned ACKEN : 1; + unsigned ACKDT : 1; + unsigned ACKSTAT : 1; + unsigned GCEN : 1; + }; +} __SSP1CON2bits_t; +extern volatile __SSP1CON2bits_t __at (0xFC5) SSP1CON2bits; + +extern __sfr __at (0xFC5) SSPCON2; +typedef union { + struct { + unsigned SEN : 1; + unsigned RSEN : 1; + unsigned PEN : 1; + unsigned RCEN : 1; + unsigned ACKEN : 1; + unsigned ACKDT : 1; + unsigned ACKSTAT : 1; + unsigned GCEN : 1; + }; +} __SSPCON2bits_t; +extern volatile __SSPCON2bits_t __at (0xFC5) SSPCON2bits; + +extern __sfr __at (0xFC6) SSP1CON1; +typedef union { + struct { + unsigned SSPM0 : 1; + unsigned SSPM1 : 1; + unsigned SSPM2 : 1; + unsigned SSPM3 : 1; + unsigned CKP : 1; + unsigned SSPEN : 1; + unsigned SSPOV : 1; + unsigned WCOL : 1; + }; +} __SSP1CON1bits_t; +extern volatile __SSP1CON1bits_t __at (0xFC6) SSP1CON1bits; + +extern __sfr __at (0xFC6) SSPCON1; +typedef union { + struct { + unsigned SSPM0 : 1; + unsigned SSPM1 : 1; + unsigned SSPM2 : 1; + unsigned SSPM3 : 1; + unsigned CKP : 1; + unsigned SSPEN : 1; + unsigned SSPOV : 1; + unsigned WCOL : 1; + }; +} __SSPCON1bits_t; +extern volatile __SSPCON1bits_t __at (0xFC6) SSPCON1bits; + +extern __sfr __at (0xFC7) SSP1STAT; +typedef union { + struct { + unsigned BF : 1; + unsigned UA : 1; + unsigned R_W : 1; + unsigned S : 1; + unsigned P : 1; + unsigned D_A : 1; + unsigned CKE : 1; + unsigned SMP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned I2C_READ : 1; + unsigned I2C_START : 1; + unsigned I2C_STOP : 1; + unsigned I2C_DAT : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_W : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_A : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned READ_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned DATA_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned R : 1; + unsigned : 1; + unsigned : 1; + unsigned D : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSP1STATbits_t; +extern volatile __SSP1STATbits_t __at (0xFC7) SSP1STATbits; + +extern __sfr __at (0xFC7) SSPSTAT; +typedef union { + struct { + unsigned BF : 1; + unsigned UA : 1; + unsigned R_W : 1; + unsigned S : 1; + unsigned P : 1; + unsigned D_A : 1; + unsigned CKE : 1; + unsigned SMP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned I2C_READ : 1; + unsigned I2C_START : 1; + unsigned I2C_STOP : 1; + unsigned I2C_DAT : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_W : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_A : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned READ_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned DATA_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned R : 1; + unsigned : 1; + unsigned : 1; + unsigned D : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSPSTATbits_t; +extern volatile __SSPSTATbits_t __at (0xFC7) SSPSTATbits; + +extern __sfr __at (0xFC8) SSP1ADD; + +extern __sfr __at (0xFC8) SSPADD; + +extern __sfr __at (0xFC9) SSP1BUF; + +extern __sfr __at (0xFC9) SSPBUF; + +extern __sfr __at (0xFCA) T2CON; +typedef union { + struct { + unsigned T2CKPS0 : 1; + unsigned T2CKPS1 : 1; + unsigned TMR2ON : 1; + unsigned T2OUTPS0 : 1; + unsigned T2OUTPS1 : 1; + unsigned T2OUTPS2 : 1; + unsigned T2OUTPS3 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TOUTPS0 : 1; + unsigned TOUTPS1 : 1; + unsigned TOUTPS2 : 1; + unsigned TOUTPS3 : 1; + unsigned : 1; + }; +} __T2CONbits_t; +extern volatile __T2CONbits_t __at (0xFCA) T2CONbits; + +extern __sfr __at (0xFCB) PR2; + +extern __sfr __at (0xFCC) TMR2; + +extern __sfr __at (0xFCD) T1CON; +typedef union { + struct { + unsigned TMR1ON : 1; + unsigned TMR1CS : 1; + unsigned T1SYNC : 1; + unsigned T1OSCEN : 1; + unsigned T1CKPS0 : 1; + unsigned T1CKPS1 : 1; + unsigned T1RUN : 1; + unsigned RD16 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned T1INSYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_T1SYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T1CONbits_t; +extern volatile __T1CONbits_t __at (0xFCD) T1CONbits; + +extern __sfr __at (0xFCE) TMR1L; + +extern __sfr __at (0xFCF) TMR1H; + +extern __sfr __at (0xFD0) RCON; +typedef union { + struct { + unsigned NOT_BOR : 1; + unsigned NOT_POR : 1; + unsigned NOT_PD : 1; + unsigned NOT_TO : 1; + unsigned NOT_RI : 1; + unsigned : 1; + unsigned : 1; + unsigned IPEN : 1; + }; + struct { + unsigned BOR : 1; + unsigned POR : 1; + unsigned PD : 1; + unsigned TO : 1; + unsigned RI : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RCONbits_t; +extern volatile __RCONbits_t __at (0xFD0) RCONbits; + +extern __sfr __at (0xFD1) WDTCON; +typedef union { + struct { + unsigned SWDTE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned SWDTEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __WDTCONbits_t; +extern volatile __WDTCONbits_t __at (0xFD1) WDTCONbits; + +extern __sfr __at (0xFD3) OSCCON; +typedef union { + struct { + unsigned SCS0 : 1; + unsigned SCS1 : 1; + unsigned : 1; + unsigned OSTS : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned IDLEN : 1; + }; +} __OSCCONbits_t; +extern volatile __OSCCONbits_t __at (0xFD3) OSCCONbits; + +extern __sfr __at (0xFD5) T0CON; +typedef union { + struct { + unsigned T0PS0 : 1; + unsigned T0PS1 : 1; + unsigned T0PS2 : 1; + unsigned PSA : 1; + unsigned T0SE : 1; + unsigned T0CS : 1; + unsigned T08BIT : 1; + unsigned TMR0ON : 1; + }; +} __T0CONbits_t; +extern volatile __T0CONbits_t __at (0xFD5) T0CONbits; + +extern __sfr __at (0xFD6) TMR0L; + +extern __sfr __at (0xFD7) TMR0H; + +extern __sfr __at (0xFD8) STATUS; +typedef union { + struct { + unsigned C : 1; + unsigned DC : 1; + unsigned Z : 1; + unsigned OV : 1; + unsigned N : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __STATUSbits_t; +extern volatile __STATUSbits_t __at (0xFD8) STATUSbits; + +extern __sfr __at (0xFD9) FSR2L; + +extern __sfr __at (0xFDA) FSR2H; + +extern __sfr __at (0xFDB) PLUSW2; + +extern __sfr __at (0xFDC) PREINC2; + +extern __sfr __at (0xFDD) POSTDEC2; + +extern __sfr __at (0xFDE) POSTINC2; + +extern __sfr __at (0xFDF) INDF2; + +extern __sfr __at (0xFE0) BSR; + +extern __sfr __at (0xFE1) FSR1L; + +extern __sfr __at (0xFE2) FSR1H; + +extern __sfr __at (0xFE3) PLUSW1; + +extern __sfr __at (0xFE4) PREINC1; + +extern __sfr __at (0xFE5) POSTDEC1; + +extern __sfr __at (0xFE6) POSTINC1; + +extern __sfr __at (0xFE7) INDF1; + +extern __sfr __at (0xFE8) WREG; + +extern __sfr __at (0xFE9) FSR0L; + +extern __sfr __at (0xFEA) FSR0H; + +extern __sfr __at (0xFEB) PLUSW0; + +extern __sfr __at (0xFEC) PREINC0; + +extern __sfr __at (0xFED) POSTDEC0; + +extern __sfr __at (0xFEE) POSTINC0; + +extern __sfr __at (0xFEF) INDF0; + +extern __sfr __at (0xFF0) INTCON3; +typedef union { + struct { + unsigned INT1F : 1; + unsigned INT2F : 1; + unsigned : 1; + unsigned INT1E : 1; + unsigned INT2E : 1; + unsigned : 1; + unsigned INT1P : 1; + unsigned INT2P : 1; + }; + struct { + unsigned INT1IF : 1; + unsigned INT2IF : 1; + unsigned : 1; + unsigned INT1IE : 1; + unsigned INT2IE : 1; + unsigned : 1; + unsigned INT1IP : 1; + unsigned INT2IP : 1; + }; +} __INTCON3bits_t; +extern volatile __INTCON3bits_t __at (0xFF0) INTCON3bits; + +extern __sfr __at (0xFF1) INTCON2; +typedef union { + struct { + unsigned RBIP : 1; + unsigned : 1; + unsigned T0IP : 1; + unsigned : 1; + unsigned INTEDG2 : 1; + unsigned INTEDG1 : 1; + unsigned INTEDG0 : 1; + unsigned NOT_RBPU : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned TMR0IP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RBPU : 1; + }; +} __INTCON2bits_t; +extern volatile __INTCON2bits_t __at (0xFF1) INTCON2bits; + +extern __sfr __at (0xFF2) INTCON; +typedef union { + struct { + unsigned RBIF : 1; + unsigned INT0F : 1; + unsigned T0IF : 1; + unsigned RBIE : 1; + unsigned INT0E : 1; + unsigned T0IE : 1; + unsigned PEIE : 1; + unsigned GIE : 1; + }; + struct { + unsigned : 1; + unsigned INT0IF : 1; + unsigned TMR0IF : 1; + unsigned : 1; + unsigned INT0IE : 1; + unsigned TMR0IE : 1; + unsigned GIEL : 1; + unsigned GIEH : 1; + }; +} __INTCONbits_t; +extern volatile __INTCONbits_t __at (0xFF2) INTCONbits; + +extern __sfr __at (0xFF3) PROD; + +extern __sfr __at (0xFF3) PRODL; + +extern __sfr __at (0xFF4) PRODH; + +extern __sfr __at (0xFF5) TABLAT; + +extern __sfr __at (0xFF6) TBLPTR; + +extern __sfr __at (0xFF6) TBLPTRL; + +extern __sfr __at (0xFF7) TBLPTRH; + +extern __sfr __at (0xFF8) TBLPTRU; + +extern __sfr __at (0xFF9) PC; + +extern __sfr __at (0xFF9) PCL; + +extern __sfr __at (0xFFA) PCLATH; + +extern __sfr __at (0xFFB) PCLATU; + +extern __sfr __at (0xFFC) STKPTR; +typedef union { + struct { + unsigned STKPTR0 : 1; + unsigned STKPTR1 : 1; + unsigned STKPTR2 : 1; + unsigned STKPTR3 : 1; + unsigned STKPTR4 : 1; + unsigned : 1; + unsigned STKUNF : 1; + unsigned STKOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned STKFUL : 1; + }; +} __STKPTRbits_t; +extern volatile __STKPTRbits_t __at (0xFFC) STKPTRbits; + +extern __sfr __at (0xFFD) TOS; + +extern __sfr __at (0xFFD) TOSL; + +extern __sfr __at (0xFFE) TOSH; + +extern __sfr __at (0xFFF) TOSU; + + +#endif + diff --git a/device/include/pic16/pic18f25j10.h b/device/include/pic16/pic18f25j10.h new file mode 100644 index 00000000..9b5513ad --- /dev/null +++ b/device/include/pic16/pic18f25j10.h @@ -0,0 +1,11 @@ +/* + * pic18f25j10.h - device specific declarations + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#include diff --git a/device/include/pic16/pic18f44j10.h b/device/include/pic16/pic18f44j10.h new file mode 100644 index 00000000..556f6473 --- /dev/null +++ b/device/include/pic16/pic18f44j10.h @@ -0,0 +1,1825 @@ +/* + * pic18f44j10.h - device specific declarations + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#ifndef __PIC18F44J10_H__ +#define __PIC18F44J10_H__ 1 + +#define _DEVID1 0x3FFFFE +#define _DEVID2 0x3FFFFF + +extern __sfr __at (0xF80) PORTA; +typedef union { + struct { + unsigned RA0 : 1; + unsigned RA1 : 1; + unsigned RA2 : 1; + unsigned RA3 : 1; + unsigned : 1; + unsigned RA5 : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned AN0 : 1; + unsigned AN1 : 1; + unsigned AN2 : 1; + unsigned AN3 : 1; + unsigned : 1; + unsigned AN4 : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned VREFM : 1; + unsigned VREFP : 1; + unsigned : 1; + unsigned SS1 : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned CVREF : 1; + unsigned : 1; + unsigned : 1; + unsigned C2OUT_PORTA : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_SS1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTAbits_t; +extern volatile __PORTAbits_t __at (0xF80) PORTAbits; + +extern __sfr __at (0xF81) PORTB; +typedef union { + struct { + unsigned RB0 : 1; + unsigned RB1 : 1; + unsigned RB2 : 1; + unsigned RB3 : 1; + unsigned RB4 : 1; + unsigned RB5 : 1; + unsigned RB6 : 1; + unsigned RB7 : 1; + }; + struct { + unsigned INT0 : 1; + unsigned INT1 : 1; + unsigned INT2 : 1; + unsigned CCP2_PORTB : 1; + unsigned KBI0 : 1; + unsigned KBI1 : 1; + unsigned KBI2 : 1; + unsigned KBI3 : 1; + }; + struct { + unsigned AN12 : 1; + unsigned AN10 : 1; + unsigned AN8 : 1; + unsigned AN9 : 1; + unsigned AN11 : 1; + unsigned T0CKI : 1; + unsigned PGC : 1; + unsigned PGD : 1; + }; + struct { + unsigned FLT0 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned C1OUT_PORTB : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTBbits_t; +extern volatile __PORTBbits_t __at (0xF81) PORTBbits; + +extern __sfr __at (0xF82) PORTC; +typedef union { + struct { + unsigned RC0 : 1; + unsigned RC1 : 1; + unsigned RC2 : 1; + unsigned RC3 : 1; + unsigned RC4 : 1; + unsigned RC5 : 1; + unsigned RC6 : 1; + unsigned RC7 : 1; + }; + struct { + unsigned T1OSO : 1; + unsigned T1OSI : 1; + unsigned CCP1 : 1; + unsigned SCK1 : 1; + unsigned SDI1 : 1; + unsigned SDO1 : 1; + unsigned TX : 1; + unsigned RX : 1; + }; + struct { + unsigned T1CKI : 1; + unsigned CCP2_PORTC : 1; + unsigned P1A : 1; + unsigned SCL1 : 1; + unsigned SDA1 : 1; + unsigned SDO : 1; + unsigned CK : 1; + unsigned DT : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SCK : 1; + unsigned SDI : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SCL : 1; + unsigned SDA : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTCbits_t; +extern volatile __PORTCbits_t __at (0xF82) PORTCbits; + +extern __sfr __at (0xF83) PORTD; +typedef union { + struct { + unsigned RD0 : 1; + unsigned RD1 : 1; + unsigned RD2 : 1; + unsigned RD3 : 1; + unsigned RD4 : 1; + unsigned RD5 : 1; + unsigned RD6 : 1; + unsigned RD7 : 1; + }; + struct { + unsigned PSP0 : 1; + unsigned PSP1 : 1; + unsigned PSP2 : 1; + unsigned PSP3 : 1; + unsigned PSP4 : 1; + unsigned PSP5 : 1; + unsigned PSP6 : 1; + unsigned PSP7 : 1; + }; + struct { + unsigned SCL2 : 1; + unsigned SDA2 : 1; + unsigned SDO2 : 1; + unsigned SS2 : 1; + unsigned : 1; + unsigned P1B : 1; + unsigned P1C : 1; + unsigned P1D : 1; + }; + struct { + unsigned SCK2 : 1; + unsigned SDI2 : 1; + unsigned : 1; + unsigned NOT_SS2 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTDbits_t; +extern volatile __PORTDbits_t __at (0xF83) PORTDbits; + +extern __sfr __at (0xF84) PORTE; +typedef union { + struct { + unsigned RE0 : 1; + unsigned RE1 : 1; + unsigned RE2 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned RD : 1; + unsigned WR : 1; + unsigned CS : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned AN5 : 1; + unsigned AN6 : 1; + unsigned AN7 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned NOT_RD : 1; + unsigned NOT_WR : 1; + unsigned NOT_CS : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PORTEbits_t; +extern volatile __PORTEbits_t __at (0xF84) PORTEbits; + +extern __sfr __at (0xF85) SSP2CON2; +typedef union { + struct { + unsigned SEN : 1; + unsigned RSEN : 1; + unsigned PEN : 1; + unsigned RCEN : 1; + unsigned ACKEN : 1; + unsigned ACKDT : 1; + unsigned ACKSTAT : 1; + unsigned GCEN : 1; + }; +} __SSP2CON2bits_t; +extern volatile __SSP2CON2bits_t __at (0xF85) SSP2CON2bits; + +extern __sfr __at (0xF86) SSP2CON1; +typedef union { + struct { + unsigned SSPM0 : 1; + unsigned SSPM1 : 1; + unsigned SSPM2 : 1; + unsigned SSPM3 : 1; + unsigned CKP : 1; + unsigned SSPEN : 1; + unsigned SSPOV : 1; + unsigned WCOL : 1; + }; +} __SSP2CON1bits_t; +extern volatile __SSP2CON1bits_t __at (0xF86) SSP2CON1bits; + +extern __sfr __at (0xF87) SSP2STAT; +typedef union { + struct { + unsigned BF : 1; + unsigned UA : 1; + unsigned R_W : 1; + unsigned S : 1; + unsigned P : 1; + unsigned D_A : 1; + unsigned CKE : 1; + unsigned SMP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned I2C_READ : 1; + unsigned I2C_START : 1; + unsigned I2C_STOP : 1; + unsigned I2C_DAT : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_W : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_A : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned READ_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned DATA_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned R : 1; + unsigned : 1; + unsigned : 1; + unsigned D : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSP2STATbits_t; +extern volatile __SSP2STATbits_t __at (0xF87) SSP2STATbits; + +extern __sfr __at (0xF88) SSP2ADD; + +extern __sfr __at (0xF89) LATA; +typedef union { + struct { + unsigned LATA0 : 1; + unsigned LATA1 : 1; + unsigned LATA2 : 1; + unsigned LATA3 : 1; + unsigned : 1; + unsigned LATA5 : 1; + unsigned : 1; + unsigned : 1; + }; +} __LATAbits_t; +extern volatile __LATAbits_t __at (0xF89) LATAbits; + +extern __sfr __at (0xF8A) LATB; +typedef union { + struct { + unsigned LATB0 : 1; + unsigned LATB1 : 1; + unsigned LATB2 : 1; + unsigned LATB3 : 1; + unsigned LATB4 : 1; + unsigned LATB5 : 1; + unsigned LATB6 : 1; + unsigned LATB7 : 1; + }; +} __LATBbits_t; +extern volatile __LATBbits_t __at (0xF8A) LATBbits; + +extern __sfr __at (0xF8B) LATC; +typedef union { + struct { + unsigned LATC0 : 1; + unsigned LATC1 : 1; + unsigned LATC2 : 1; + unsigned LATC3 : 1; + unsigned LATC4 : 1; + unsigned LATC5 : 1; + unsigned LATC6 : 1; + unsigned LATC7 : 1; + }; +} __LATCbits_t; +extern volatile __LATCbits_t __at (0xF8B) LATCbits; + +extern __sfr __at (0xF8C) LATD; +typedef union { + struct { + unsigned LATD0 : 1; + unsigned LATD1 : 1; + unsigned LATD2 : 1; + unsigned LATD3 : 1; + unsigned LATD4 : 1; + unsigned LATD5 : 1; + unsigned LATD6 : 1; + unsigned LATD7 : 1; + }; +} __LATDbits_t; +extern volatile __LATDbits_t __at (0xF8C) LATDbits; + +extern __sfr __at (0xF8D) LATE; +typedef union { + struct { + unsigned LATE0 : 1; + unsigned LATE1 : 1; + unsigned LATE2 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __LATEbits_t; +extern volatile __LATEbits_t __at (0xF8D) LATEbits; + +extern __sfr __at (0xF8E) SSP2BUF; + +extern __sfr __at (0xF92) DDRA; +typedef union { + struct { + unsigned RA0 : 1; + unsigned RA1 : 1; + unsigned RA2 : 1; + unsigned RA3 : 1; + unsigned : 1; + unsigned RA5 : 1; + unsigned : 1; + unsigned : 1; + }; +} __DDRAbits_t; +extern volatile __DDRAbits_t __at (0xF92) DDRAbits; + +extern __sfr __at (0xF92) TRISA; +typedef union { + struct { + unsigned TRISA0 : 1; + unsigned TRISA1 : 1; + unsigned TRISA2 : 1; + unsigned TRISA3 : 1; + unsigned : 1; + unsigned TRISA5 : 1; + unsigned : 1; + unsigned : 1; + }; +} __TRISAbits_t; +extern volatile __TRISAbits_t __at (0xF92) TRISAbits; + +extern __sfr __at (0xF93) DDRB; +typedef union { + struct { + unsigned RB0 : 1; + unsigned RB1 : 1; + unsigned RB2 : 1; + unsigned RB3 : 1; + unsigned RB4 : 1; + unsigned RB5 : 1; + unsigned RB6 : 1; + unsigned RB7 : 1; + }; +} __DDRBbits_t; +extern volatile __DDRBbits_t __at (0xF93) DDRBbits; + +extern __sfr __at (0xF93) TRISB; +typedef union { + struct { + unsigned TRISB0 : 1; + unsigned TRISB1 : 1; + unsigned TRISB2 : 1; + unsigned TRISB3 : 1; + unsigned TRISB4 : 1; + unsigned TRISB5 : 1; + unsigned TRISB6 : 1; + unsigned TRISB7 : 1; + }; +} __TRISBbits_t; +extern volatile __TRISBbits_t __at (0xF93) TRISBbits; + +extern __sfr __at (0xF94) DDRC; +typedef union { + struct { + unsigned RC0 : 1; + unsigned RC1 : 1; + unsigned RC2 : 1; + unsigned RC3 : 1; + unsigned RC4 : 1; + unsigned RC5 : 1; + unsigned RC6 : 1; + unsigned RC7 : 1; + }; +} __DDRCbits_t; +extern volatile __DDRCbits_t __at (0xF94) DDRCbits; + +extern __sfr __at (0xF94) TRISC; +typedef union { + struct { + unsigned TRISC0 : 1; + unsigned TRISC1 : 1; + unsigned TRISC2 : 1; + unsigned TRISC3 : 1; + unsigned TRISC4 : 1; + unsigned TRISC5 : 1; + unsigned TRISC6 : 1; + unsigned TRISC7 : 1; + }; +} __TRISCbits_t; +extern volatile __TRISCbits_t __at (0xF94) TRISCbits; + +extern __sfr __at (0xF95) DDRD; +typedef union { + struct { + unsigned RD0 : 1; + unsigned RD1 : 1; + unsigned RD2 : 1; + unsigned RD3 : 1; + unsigned RD4 : 1; + unsigned RD5 : 1; + unsigned RD6 : 1; + unsigned RD7 : 1; + }; +} __DDRDbits_t; +extern volatile __DDRDbits_t __at (0xF95) DDRDbits; + +extern __sfr __at (0xF95) TRISD; +typedef union { + struct { + unsigned TRISD0 : 1; + unsigned TRISD1 : 1; + unsigned TRISD2 : 1; + unsigned TRISD3 : 1; + unsigned TRISD4 : 1; + unsigned TRISD5 : 1; + unsigned TRISD6 : 1; + unsigned TRISD7 : 1; + }; +} __TRISDbits_t; +extern volatile __TRISDbits_t __at (0xF95) TRISDbits; + +extern __sfr __at (0xF96) DDRE; +typedef union { + struct { + unsigned RE0 : 1; + unsigned RE1 : 1; + unsigned RE2 : 1; + unsigned RE3 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __DDREbits_t; +extern volatile __DDREbits_t __at (0xF96) DDREbits; + +extern __sfr __at (0xF96) TRISE; +typedef union { + struct { + unsigned TRISE0 : 1; + unsigned TRISE1 : 1; + unsigned TRISE2 : 1; + unsigned : 1; + unsigned PSPMODE : 1; + unsigned IBOV : 1; + unsigned OBF : 1; + unsigned IBF : 1; + }; +} __TRISEbits_t; +extern volatile __TRISEbits_t __at (0xF96) TRISEbits; + +extern __sfr __at (0xF9B) OSCTUNE; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned PLLEN : 1; + unsigned : 1; + }; +} __OSCTUNEbits_t; +extern volatile __OSCTUNEbits_t __at (0xF9B) OSCTUNEbits; + +extern __sfr __at (0xF9D) PIE1; +typedef union { + struct { + unsigned TMR1IE : 1; + unsigned TMR2IE : 1; + unsigned CCP1IE : 1; + unsigned SSPIE : 1; + unsigned TXIE : 1; + unsigned RCIE : 1; + unsigned ADIE : 1; + unsigned PSPIE : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SSP1IE : 1; + unsigned TX1IE : 1; + unsigned RC1IE : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIE1bits_t; +extern volatile __PIE1bits_t __at (0xF9D) PIE1bits; + +extern __sfr __at (0xF9E) PIR1; +typedef union { + struct { + unsigned TMR1IF : 1; + unsigned TMR2IF : 1; + unsigned CCP1IF : 1; + unsigned SSPIF : 1; + unsigned TXIF : 1; + unsigned RCIF : 1; + unsigned ADIF : 1; + unsigned PSPIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SSP1IF : 1; + unsigned TX1IF : 1; + unsigned RC1IF : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIR1bits_t; +extern volatile __PIR1bits_t __at (0xF9E) PIR1bits; + +extern __sfr __at (0xF9F) IPR1; +typedef union { + struct { + unsigned TMR1IP : 1; + unsigned TMR2IP : 1; + unsigned CCP1IP : 1; + unsigned SSPIP : 1; + unsigned TXIP : 1; + unsigned RCIP : 1; + unsigned ADIP : 1; + unsigned PSPIP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned SSP1IP : 1; + unsigned TX1IP : 1; + unsigned RC1IP : 1; + unsigned : 1; + unsigned : 1; + }; +} __IPR1bits_t; +extern volatile __IPR1bits_t __at (0xF9F) IPR1bits; + +extern __sfr __at (0xFA0) PIE2; +typedef union { + struct { + unsigned CCP2IE : 1; + unsigned : 1; + unsigned : 1; + unsigned BCLIE : 1; + unsigned : 1; + unsigned : 1; + unsigned CMIE : 1; + unsigned OSCFIE : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned BCL1IE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIE2bits_t; +extern volatile __PIE2bits_t __at (0xFA0) PIE2bits; + +extern __sfr __at (0xFA1) PIR2; +typedef union { + struct { + unsigned CCP2IF : 1; + unsigned : 1; + unsigned : 1; + unsigned BCLIF : 1; + unsigned : 1; + unsigned : 1; + unsigned CMIF : 1; + unsigned OSCFIF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned BCL1IF : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __PIR2bits_t; +extern volatile __PIR2bits_t __at (0xFA1) PIR2bits; + +extern __sfr __at (0xFA2) IPR2; +typedef union { + struct { + unsigned CCP2IP : 1; + unsigned : 1; + unsigned : 1; + unsigned BCLIP : 1; + unsigned : 1; + unsigned : 1; + unsigned CMIP : 1; + unsigned OSCFIP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned BCL1IP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __IPR2bits_t; +extern volatile __IPR2bits_t __at (0xFA2) IPR2bits; + +extern __sfr __at (0xFA3) PIE3; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned BCL2IE : 1; + unsigned SSP2IE : 1; + }; +} __PIE3bits_t; +extern volatile __PIE3bits_t __at (0xFA3) PIE3bits; + +extern __sfr __at (0xFA4) PIR3; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned BCL2IF : 1; + unsigned SSP2IF : 1; + }; +} __PIR3bits_t; +extern volatile __PIR3bits_t __at (0xFA4) PIR3bits; + +extern __sfr __at (0xFA5) IPR3; +typedef union { + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned BCL2IP : 1; + unsigned SSP2IP : 1; + }; +} __IPR3bits_t; +extern volatile __IPR3bits_t __at (0xFA5) IPR3bits; + +extern __sfr __at (0xFA6) EECON1; +typedef union { + struct { + unsigned : 1; + unsigned WR : 1; + unsigned WREN : 1; + unsigned WRERR : 1; + unsigned FREE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __EECON1bits_t; +extern volatile __EECON1bits_t __at (0xFA6) EECON1bits; + +extern __sfr __at (0xFA7) EECON2; + +extern __sfr __at (0xFAB) RCSTA; +typedef union { + struct { + unsigned RX9D : 1; + unsigned OERR : 1; + unsigned FERR : 1; + unsigned ADDEN : 1; + unsigned CREN : 1; + unsigned SREN : 1; + unsigned RX9 : 1; + unsigned SPEN : 1; + }; + struct { + unsigned RCD8 : 1; + unsigned : 1; + unsigned : 1; + unsigned ADEN : 1; + unsigned : 1; + unsigned : 1; + unsigned RC9 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_RC8 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RC8_9 : 1; + unsigned : 1; + }; +} __RCSTAbits_t; +extern volatile __RCSTAbits_t __at (0xFAB) RCSTAbits; + +extern __sfr __at (0xFAB) RCSTA1; +typedef union { + struct { + unsigned RX9D : 1; + unsigned OERR : 1; + unsigned FERR : 1; + unsigned ADDEN : 1; + unsigned CREN : 1; + unsigned SREN : 1; + unsigned RX9 : 1; + unsigned SPEN : 1; + }; + struct { + unsigned RCD8 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RC9 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_RC8 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RC8_9 : 1; + unsigned : 1; + }; +} __RCSTA1bits_t; +extern volatile __RCSTA1bits_t __at (0xFAB) RCSTA1bits; + +extern __sfr __at (0xFAC) TXSTA; +typedef union { + struct { + unsigned TX9D : 1; + unsigned TRMT : 1; + unsigned BRGH : 1; + unsigned SENDB : 1; + unsigned SYNC : 1; + unsigned TXEN : 1; + unsigned TX9 : 1; + unsigned CSRC : 1; + }; + struct { + unsigned TXD8 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TX8_9 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_TX8 : 1; + unsigned : 1; + }; +} __TXSTAbits_t; +extern volatile __TXSTAbits_t __at (0xFAC) TXSTAbits; + +extern __sfr __at (0xFAC) TXSTA1; +typedef union { + struct { + unsigned TX9D : 1; + unsigned TRMT : 1; + unsigned BRGH : 1; + unsigned SENDB : 1; + unsigned SYNC : 1; + unsigned TXEN : 1; + unsigned TX9 : 1; + unsigned CSRC : 1; + }; + struct { + unsigned TXD8 : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TX8_9 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_TX8 : 1; + unsigned : 1; + }; +} __TXSTA1bits_t; +extern volatile __TXSTA1bits_t __at (0xFAC) TXSTA1bits; + +extern __sfr __at (0xFAD) TXREG; + +extern __sfr __at (0xFAD) TXREG1; + +extern __sfr __at (0xFAE) RCREG; + +extern __sfr __at (0xFAE) RCREG1; + +extern __sfr __at (0xFAF) SPBRG; + +extern __sfr __at (0xFAF) SPBRG1; + +extern __sfr __at (0xFB0) SPBRGH; + +extern __sfr __at (0xFB4) CMCON; +typedef union { + struct { + unsigned CM0 : 1; + unsigned CM1 : 1; + unsigned CM2 : 1; + unsigned CIS : 1; + unsigned C1INV : 1; + unsigned C2INV : 1; + unsigned C1OUT_CMCON : 1; + unsigned C2OUT_CMCON : 1; + }; +} __CMCONbits_t; +extern volatile __CMCONbits_t __at (0xFB4) CMCONbits; + +extern __sfr __at (0xFB5) CVRCON; +typedef union { + struct { + unsigned CVR0 : 1; + unsigned CVR1 : 1; + unsigned CVR2 : 1; + unsigned CVR3 : 1; + unsigned CVRSS : 1; + unsigned CVRR : 1; + unsigned CVROE : 1; + unsigned CVREN : 1; + }; +} __CVRCONbits_t; +extern volatile __CVRCONbits_t __at (0xFB5) CVRCONbits; + +extern __sfr __at (0xFB6) ECCP1AS; +typedef union { + struct { + unsigned PSSBD0 : 1; + unsigned PSSBD1 : 1; + unsigned PSSAC0 : 1; + unsigned PSSAC1 : 1; + unsigned ECCPAS0 : 1; + unsigned ECCPAS1 : 1; + unsigned ECCPAS2 : 1; + unsigned ECCPASE : 1; + }; +} __ECCP1ASbits_t; +extern volatile __ECCP1ASbits_t __at (0xFB6) ECCP1ASbits; + +extern __sfr __at (0xFB7) ECCP1DEL; +typedef union { + struct { + unsigned PDC0 : 1; + unsigned PDC1 : 1; + unsigned PDC2 : 1; + unsigned PDC3 : 1; + unsigned PDC4 : 1; + unsigned PDC5 : 1; + unsigned PDC6 : 1; + unsigned PRSEN : 1; + }; +} __ECCP1DELbits_t; +extern volatile __ECCP1DELbits_t __at (0xFB7) ECCP1DELbits; + +extern __sfr __at (0xFB7) PWM1CON; +typedef union { + struct { + unsigned PDC0 : 1; + unsigned PDC1 : 1; + unsigned PDC2 : 1; + unsigned PDC3 : 1; + unsigned PDC4 : 1; + unsigned PDC5 : 1; + unsigned PDC6 : 1; + unsigned PRSEN : 1; + }; +} __PWM1CONbits_t; +extern volatile __PWM1CONbits_t __at (0xFB7) PWM1CONbits; + +extern __sfr __at (0xFB8) BAUDCON; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned : 1; + unsigned RCIDL : 1; + unsigned ABDOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RCMT : 1; + unsigned : 1; + }; +} __BAUDCONbits_t; +extern volatile __BAUDCONbits_t __at (0xFB8) BAUDCONbits; + +extern __sfr __at (0xFB8) BAUDCTL; +typedef union { + struct { + unsigned ABDEN : 1; + unsigned WUE : 1; + unsigned : 1; + unsigned BRG16 : 1; + unsigned SCKP : 1; + unsigned : 1; + unsigned RCIDL : 1; + unsigned ABDOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RCMT : 1; + unsigned : 1; + }; +} __BAUDCTLbits_t; +extern volatile __BAUDCTLbits_t __at (0xFB8) BAUDCTLbits; + +extern __sfr __at (0xFBA) CCP2CON; +typedef union { + struct { + unsigned CCP2M0 : 1; + unsigned CCP2M1 : 1; + unsigned CCP2M2 : 1; + unsigned CCP2M3 : 1; + unsigned DC2B0 : 1; + unsigned DC2B1 : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP2Y : 1; + unsigned CCP2X : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP2CONbits_t; +extern volatile __CCP2CONbits_t __at (0xFBA) CCP2CONbits; + +extern __sfr __at (0xFBB) CCPR2; + +extern __sfr __at (0xFBB) CCPR2L; + +extern __sfr __at (0xFBC) CCPR2H; + +extern __sfr __at (0xFBD) CCP1CON; +typedef union { + struct { + unsigned CCP1M0 : 1; + unsigned CCP1M1 : 1; + unsigned CCP1M2 : 1; + unsigned CCP1M3 : 1; + unsigned DC1B0 : 1; + unsigned DC1B1 : 1; + unsigned P1M0 : 1; + unsigned P1M1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP1Y : 1; + unsigned CCP1X : 1; + unsigned : 1; + unsigned : 1; + }; +} __CCP1CONbits_t; +extern volatile __CCP1CONbits_t __at (0xFBD) CCP1CONbits; + +extern __sfr __at (0xFBD) ECCP1CON; +typedef union { + struct { + unsigned CCP1M0 : 1; + unsigned CCP1M1 : 1; + unsigned CCP1M2 : 1; + unsigned CCP1M3 : 1; + unsigned DC1B0 : 1; + unsigned DC1B1 : 1; + unsigned P1M0 : 1; + unsigned P1M1 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned CCP1Y : 1; + unsigned CCP1X : 1; + unsigned : 1; + unsigned : 1; + }; +} __ECCP1CONbits_t; +extern volatile __ECCP1CONbits_t __at (0xFBD) ECCP1CONbits; + +extern __sfr __at (0xFBE) CCPR1; + +extern __sfr __at (0xFBE) CCPR1L; + +extern __sfr __at (0xFBF) CCPR1H; + +extern __sfr __at (0xFC0) ADCON2; +typedef union { + struct { + unsigned ADCS0 : 1; + unsigned ADCS1 : 1; + unsigned ADCS2 : 1; + unsigned ACQT0 : 1; + unsigned ACQT1 : 1; + unsigned ACQT2 : 1; + unsigned : 1; + unsigned ADFM : 1; + }; +} __ADCON2bits_t; +extern volatile __ADCON2bits_t __at (0xFC0) ADCON2bits; + +extern __sfr __at (0xFC1) ADCON1; +typedef union { + struct { + unsigned PCFG0 : 1; + unsigned PCFG1 : 1; + unsigned PCFG2 : 1; + unsigned PCFG3 : 1; + unsigned VCFG0 : 1; + unsigned VCFG1 : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON1bits_t; +extern volatile __ADCON1bits_t __at (0xFC1) ADCON1bits; + +extern __sfr __at (0xFC2) ADCON0; +typedef union { + struct { + unsigned ADON : 1; + unsigned DONE : 1; + unsigned CHS0 : 1; + unsigned CHS1 : 1; + unsigned CHS2 : 1; + unsigned CHS3 : 1; + unsigned : 1; + unsigned ADCAL : 1; + }; + struct { + unsigned : 1; + unsigned GO_DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned GO : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned NOT_DONE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __ADCON0bits_t; +extern volatile __ADCON0bits_t __at (0xFC2) ADCON0bits; + +extern __sfr __at (0xFC3) ADRES; + +extern __sfr __at (0xFC3) ADRESL; + +extern __sfr __at (0xFC4) ADRESH; + +extern __sfr __at (0xFC5) SSP1CON2; +typedef union { + struct { + unsigned SEN : 1; + unsigned RSEN : 1; + unsigned PEN : 1; + unsigned RCEN : 1; + unsigned ACKEN : 1; + unsigned ACKDT : 1; + unsigned ACKSTAT : 1; + unsigned GCEN : 1; + }; +} __SSP1CON2bits_t; +extern volatile __SSP1CON2bits_t __at (0xFC5) SSP1CON2bits; + +extern __sfr __at (0xFC5) SSPCON2; +typedef union { + struct { + unsigned SEN : 1; + unsigned RSEN : 1; + unsigned PEN : 1; + unsigned RCEN : 1; + unsigned ACKEN : 1; + unsigned ACKDT : 1; + unsigned ACKSTAT : 1; + unsigned GCEN : 1; + }; +} __SSPCON2bits_t; +extern volatile __SSPCON2bits_t __at (0xFC5) SSPCON2bits; + +extern __sfr __at (0xFC6) SSP1CON1; +typedef union { + struct { + unsigned SSPM0 : 1; + unsigned SSPM1 : 1; + unsigned SSPM2 : 1; + unsigned SSPM3 : 1; + unsigned CKP : 1; + unsigned SSPEN : 1; + unsigned SSPOV : 1; + unsigned WCOL : 1; + }; +} __SSP1CON1bits_t; +extern volatile __SSP1CON1bits_t __at (0xFC6) SSP1CON1bits; + +extern __sfr __at (0xFC6) SSPCON1; +typedef union { + struct { + unsigned SSPM0 : 1; + unsigned SSPM1 : 1; + unsigned SSPM2 : 1; + unsigned SSPM3 : 1; + unsigned CKP : 1; + unsigned SSPEN : 1; + unsigned SSPOV : 1; + unsigned WCOL : 1; + }; +} __SSPCON1bits_t; +extern volatile __SSPCON1bits_t __at (0xFC6) SSPCON1bits; + +extern __sfr __at (0xFC7) SSP1STAT; +typedef union { + struct { + unsigned BF : 1; + unsigned UA : 1; + unsigned R_W : 1; + unsigned S : 1; + unsigned P : 1; + unsigned D_A : 1; + unsigned CKE : 1; + unsigned SMP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned I2C_READ : 1; + unsigned I2C_START : 1; + unsigned I2C_STOP : 1; + unsigned I2C_DAT : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_W : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_A : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned READ_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned DATA_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned R : 1; + unsigned : 1; + unsigned : 1; + unsigned D : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSP1STATbits_t; +extern volatile __SSP1STATbits_t __at (0xFC7) SSP1STATbits; + +extern __sfr __at (0xFC7) SSPSTAT; +typedef union { + struct { + unsigned BF : 1; + unsigned UA : 1; + unsigned R_W : 1; + unsigned S : 1; + unsigned P : 1; + unsigned D_A : 1; + unsigned CKE : 1; + unsigned SMP : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned I2C_READ : 1; + unsigned I2C_START : 1; + unsigned I2C_STOP : 1; + unsigned I2C_DAT : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_W : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_A : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned NOT_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned READ_WRITE : 1; + unsigned : 1; + unsigned : 1; + unsigned DATA_ADDRESS : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned R : 1; + unsigned : 1; + unsigned : 1; + unsigned D : 1; + unsigned : 1; + unsigned : 1; + }; +} __SSPSTATbits_t; +extern volatile __SSPSTATbits_t __at (0xFC7) SSPSTATbits; + +extern __sfr __at (0xFC8) SSP1ADD; + +extern __sfr __at (0xFC8) SSPADD; + +extern __sfr __at (0xFC9) SSP1BUF; + +extern __sfr __at (0xFC9) SSPBUF; + +extern __sfr __at (0xFCA) T2CON; +typedef union { + struct { + unsigned T2CKPS0 : 1; + unsigned T2CKPS1 : 1; + unsigned TMR2ON : 1; + unsigned T2OUTPS0 : 1; + unsigned T2OUTPS1 : 1; + unsigned T2OUTPS2 : 1; + unsigned T2OUTPS3 : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned TOUTPS0 : 1; + unsigned TOUTPS1 : 1; + unsigned TOUTPS2 : 1; + unsigned TOUTPS3 : 1; + unsigned : 1; + }; +} __T2CONbits_t; +extern volatile __T2CONbits_t __at (0xFCA) T2CONbits; + +extern __sfr __at (0xFCB) PR2; + +extern __sfr __at (0xFCC) TMR2; + +extern __sfr __at (0xFCD) T1CON; +typedef union { + struct { + unsigned TMR1ON : 1; + unsigned TMR1CS : 1; + unsigned T1SYNC : 1; + unsigned T1OSCEN : 1; + unsigned T1CKPS0 : 1; + unsigned T1CKPS1 : 1; + unsigned T1RUN : 1; + unsigned RD16 : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned T1INSYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned NOT_T1SYNC : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __T1CONbits_t; +extern volatile __T1CONbits_t __at (0xFCD) T1CONbits; + +extern __sfr __at (0xFCE) TMR1L; + +extern __sfr __at (0xFCF) TMR1H; + +extern __sfr __at (0xFD0) RCON; +typedef union { + struct { + unsigned NOT_BOR : 1; + unsigned NOT_POR : 1; + unsigned NOT_PD : 1; + unsigned NOT_TO : 1; + unsigned NOT_RI : 1; + unsigned : 1; + unsigned : 1; + unsigned IPEN : 1; + }; + struct { + unsigned BOR : 1; + unsigned POR : 1; + unsigned PD : 1; + unsigned TO : 1; + unsigned RI : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __RCONbits_t; +extern volatile __RCONbits_t __at (0xFD0) RCONbits; + +extern __sfr __at (0xFD1) WDTCON; +typedef union { + struct { + unsigned SWDTE : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; + struct { + unsigned SWDTEN : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __WDTCONbits_t; +extern volatile __WDTCONbits_t __at (0xFD1) WDTCONbits; + +extern __sfr __at (0xFD3) OSCCON; +typedef union { + struct { + unsigned SCS0 : 1; + unsigned SCS1 : 1; + unsigned : 1; + unsigned OSTS : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned IDLEN : 1; + }; +} __OSCCONbits_t; +extern volatile __OSCCONbits_t __at (0xFD3) OSCCONbits; + +extern __sfr __at (0xFD5) T0CON; +typedef union { + struct { + unsigned T0PS0 : 1; + unsigned T0PS1 : 1; + unsigned T0PS2 : 1; + unsigned PSA : 1; + unsigned T0SE : 1; + unsigned T0CS : 1; + unsigned T08BIT : 1; + unsigned TMR0ON : 1; + }; +} __T0CONbits_t; +extern volatile __T0CONbits_t __at (0xFD5) T0CONbits; + +extern __sfr __at (0xFD6) TMR0L; + +extern __sfr __at (0xFD7) TMR0H; + +extern __sfr __at (0xFD8) STATUS; +typedef union { + struct { + unsigned C : 1; + unsigned DC : 1; + unsigned Z : 1; + unsigned OV : 1; + unsigned N : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + }; +} __STATUSbits_t; +extern volatile __STATUSbits_t __at (0xFD8) STATUSbits; + +extern __sfr __at (0xFD9) FSR2L; + +extern __sfr __at (0xFDA) FSR2H; + +extern __sfr __at (0xFDB) PLUSW2; + +extern __sfr __at (0xFDC) PREINC2; + +extern __sfr __at (0xFDD) POSTDEC2; + +extern __sfr __at (0xFDE) POSTINC2; + +extern __sfr __at (0xFDF) INDF2; + +extern __sfr __at (0xFE0) BSR; + +extern __sfr __at (0xFE1) FSR1L; + +extern __sfr __at (0xFE2) FSR1H; + +extern __sfr __at (0xFE3) PLUSW1; + +extern __sfr __at (0xFE4) PREINC1; + +extern __sfr __at (0xFE5) POSTDEC1; + +extern __sfr __at (0xFE6) POSTINC1; + +extern __sfr __at (0xFE7) INDF1; + +extern __sfr __at (0xFE8) WREG; + +extern __sfr __at (0xFE9) FSR0L; + +extern __sfr __at (0xFEA) FSR0H; + +extern __sfr __at (0xFEB) PLUSW0; + +extern __sfr __at (0xFEC) PREINC0; + +extern __sfr __at (0xFED) POSTDEC0; + +extern __sfr __at (0xFEE) POSTINC0; + +extern __sfr __at (0xFEF) INDF0; + +extern __sfr __at (0xFF0) INTCON3; +typedef union { + struct { + unsigned INT1F : 1; + unsigned INT2F : 1; + unsigned : 1; + unsigned INT1E : 1; + unsigned INT2E : 1; + unsigned : 1; + unsigned INT1P : 1; + unsigned INT2P : 1; + }; + struct { + unsigned INT1IF : 1; + unsigned INT2IF : 1; + unsigned : 1; + unsigned INT1IE : 1; + unsigned INT2IE : 1; + unsigned : 1; + unsigned INT1IP : 1; + unsigned INT2IP : 1; + }; +} __INTCON3bits_t; +extern volatile __INTCON3bits_t __at (0xFF0) INTCON3bits; + +extern __sfr __at (0xFF1) INTCON2; +typedef union { + struct { + unsigned RBIP : 1; + unsigned : 1; + unsigned T0IP : 1; + unsigned : 1; + unsigned INTEDG2 : 1; + unsigned INTEDG1 : 1; + unsigned INTEDG0 : 1; + unsigned NOT_RBPU : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned TMR0IP : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned RBPU : 1; + }; +} __INTCON2bits_t; +extern volatile __INTCON2bits_t __at (0xFF1) INTCON2bits; + +extern __sfr __at (0xFF2) INTCON; +typedef union { + struct { + unsigned RBIF : 1; + unsigned INT0F : 1; + unsigned T0IF : 1; + unsigned RBIE : 1; + unsigned INT0E : 1; + unsigned T0IE : 1; + unsigned PEIE : 1; + unsigned GIE : 1; + }; + struct { + unsigned : 1; + unsigned INT0IF : 1; + unsigned TMR0IF : 1; + unsigned : 1; + unsigned INT0IE : 1; + unsigned TMR0IE : 1; + unsigned GIEL : 1; + unsigned GIEH : 1; + }; +} __INTCONbits_t; +extern volatile __INTCONbits_t __at (0xFF2) INTCONbits; + +extern __sfr __at (0xFF3) PROD; + +extern __sfr __at (0xFF3) PRODL; + +extern __sfr __at (0xFF4) PRODH; + +extern __sfr __at (0xFF5) TABLAT; + +extern __sfr __at (0xFF6) TBLPTR; + +extern __sfr __at (0xFF6) TBLPTRL; + +extern __sfr __at (0xFF7) TBLPTRH; + +extern __sfr __at (0xFF8) TBLPTRU; + +extern __sfr __at (0xFF9) PC; + +extern __sfr __at (0xFF9) PCL; + +extern __sfr __at (0xFFA) PCLATH; + +extern __sfr __at (0xFFB) PCLATU; + +extern __sfr __at (0xFFC) STKPTR; +typedef union { + struct { + unsigned STKPTR0 : 1; + unsigned STKPTR1 : 1; + unsigned STKPTR2 : 1; + unsigned STKPTR3 : 1; + unsigned STKPTR4 : 1; + unsigned : 1; + unsigned STKUNF : 1; + unsigned STKOVF : 1; + }; + struct { + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned : 1; + unsigned STKFUL : 1; + }; +} __STKPTRbits_t; +extern volatile __STKPTRbits_t __at (0xFFC) STKPTRbits; + +extern __sfr __at (0xFFD) TOS; + +extern __sfr __at (0xFFD) TOSL; + +extern __sfr __at (0xFFE) TOSH; + +extern __sfr __at (0xFFF) TOSU; + + +#endif + diff --git a/device/include/pic16/pic18f45j10.h b/device/include/pic16/pic18f45j10.h new file mode 100644 index 00000000..cb779cf2 --- /dev/null +++ b/device/include/pic16/pic18f45j10.h @@ -0,0 +1,11 @@ +/* + * pic18f45j10.h - device specific declarations + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#include diff --git a/device/include/pic16/pic18fregs.h b/device/include/pic16/pic18fregs.h index 82a6bb43..02f85abf 100644 --- a/device/include/pic16/pic18fregs.h +++ b/device/include/pic16/pic18fregs.h @@ -67,12 +67,18 @@ #elif defined(pic18f2455) # include +#elif defined(pic18f24j10) +# include + #elif defined(pic18f2525) # include /* just a 2620 core with less flash */ #elif defined(pic18f2550) # include +#elif defined(pic18f25j10) +# include + #elif defined(pic18f2620) # include @@ -97,6 +103,9 @@ #elif defined(pic18f4455) # include +#elif defined(pic18f44j10) +# include + #elif defined(pic18f4520) # include @@ -106,6 +115,9 @@ #elif defined(pic18f4550) # include /* Might use 2550.h */ +#elif defined(pic18f45j10) +# include + #elif defined(pic18f4620) # include diff --git a/device/lib/pic16/libdev/pic18f24j10.c b/device/lib/pic16/libdev/pic18f24j10.c new file mode 100644 index 00000000..4c304314 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f24j10.c @@ -0,0 +1,314 @@ +/* + * pic18f24j10.c - device specific definitions + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#include + + +__sfr __at (0xF80) PORTA; +volatile __PORTAbits_t __at (0xF80) PORTAbits; + +__sfr __at (0xF81) PORTB; +volatile __PORTBbits_t __at (0xF81) PORTBbits; + +__sfr __at (0xF82) PORTC; +volatile __PORTCbits_t __at (0xF82) PORTCbits; + +__sfr __at (0xF89) LATA; +volatile __LATAbits_t __at (0xF89) LATAbits; + +__sfr __at (0xF8A) LATB; +volatile __LATBbits_t __at (0xF8A) LATBbits; + +__sfr __at (0xF8B) LATC; +volatile __LATCbits_t __at (0xF8B) LATCbits; + +__sfr __at (0xF92) DDRA; +volatile __DDRAbits_t __at (0xF92) DDRAbits; + +__sfr __at (0xF92) TRISA; +volatile __TRISAbits_t __at (0xF92) TRISAbits; + +__sfr __at (0xF93) DDRB; +volatile __DDRBbits_t __at (0xF93) DDRBbits; + +__sfr __at (0xF93) TRISB; +volatile __TRISBbits_t __at (0xF93) TRISBbits; + +__sfr __at (0xF94) DDRC; +volatile __DDRCbits_t __at (0xF94) DDRCbits; + +__sfr __at (0xF94) TRISC; +volatile __TRISCbits_t __at (0xF94) TRISCbits; + +__sfr __at (0xF9B) OSCTUNE; +volatile __OSCTUNEbits_t __at (0xF9B) OSCTUNEbits; + +__sfr __at (0xF9D) PIE1; +volatile __PIE1bits_t __at (0xF9D) PIE1bits; + +__sfr __at (0xF9E) PIR1; +volatile __PIR1bits_t __at (0xF9E) PIR1bits; + +__sfr __at (0xF9F) IPR1; +volatile __IPR1bits_t __at (0xF9F) IPR1bits; + +__sfr __at (0xFA0) PIE2; +volatile __PIE2bits_t __at (0xFA0) PIE2bits; + +__sfr __at (0xFA1) PIR2; +volatile __PIR2bits_t __at (0xFA1) PIR2bits; + +__sfr __at (0xFA2) IPR2; +volatile __IPR2bits_t __at (0xFA2) IPR2bits; + +__sfr __at (0xFA3) PIE3; +volatile __PIE3bits_t __at (0xFA3) PIE3bits; + +__sfr __at (0xFA4) PIR3; +volatile __PIR3bits_t __at (0xFA4) PIR3bits; + +__sfr __at (0xFA5) IPR3; +volatile __IPR3bits_t __at (0xFA5) IPR3bits; + +__sfr __at (0xFA6) EECON1; +volatile __EECON1bits_t __at (0xFA6) EECON1bits; + +__sfr __at (0xFA7) EECON2; + +__sfr __at (0xFAB) RCSTA; +volatile __RCSTAbits_t __at (0xFAB) RCSTAbits; + +__sfr __at (0xFAB) RCSTA1; +volatile __RCSTA1bits_t __at (0xFAB) RCSTA1bits; + +__sfr __at (0xFAC) TXSTA; +volatile __TXSTAbits_t __at (0xFAC) TXSTAbits; + +__sfr __at (0xFAC) TXSTA1; +volatile __TXSTA1bits_t __at (0xFAC) TXSTA1bits; + +__sfr __at (0xFAD) TXREG; + +__sfr __at (0xFAD) TXREG1; + +__sfr __at (0xFAE) RCREG; + +__sfr __at (0xFAE) RCREG1; + +__sfr __at (0xFAF) SPBRG; + +__sfr __at (0xFAF) SPBRG1; + +__sfr __at (0xFB0) SPBRGH; + +__sfr __at (0xFB4) CMCON; +volatile __CMCONbits_t __at (0xFB4) CMCONbits; + +__sfr __at (0xFB5) CVRCON; +volatile __CVRCONbits_t __at (0xFB5) CVRCONbits; + +__sfr __at (0xFB6) ECCP1AS; +volatile __ECCP1ASbits_t __at (0xFB6) ECCP1ASbits; + +__sfr __at (0xFB7) ECCP1DEL; +volatile __ECCP1DELbits_t __at (0xFB7) ECCP1DELbits; + +__sfr __at (0xFB7) PWM1CON; +volatile __PWM1CONbits_t __at (0xFB7) PWM1CONbits; + +__sfr __at (0xFB8) BAUDCON; +volatile __BAUDCONbits_t __at (0xFB8) BAUDCONbits; + +__sfr __at (0xFB8) BAUDCTL; +volatile __BAUDCTLbits_t __at (0xFB8) BAUDCTLbits; + +__sfr __at (0xFBA) CCP2CON; +volatile __CCP2CONbits_t __at (0xFBA) CCP2CONbits; + +__sfr __at (0xFBB) CCPR2; + +__sfr __at (0xFBB) CCPR2L; + +__sfr __at (0xFBC) CCPR2H; + +__sfr __at (0xFBD) CCP1CON; +volatile __CCP1CONbits_t __at (0xFBD) CCP1CONbits; + +__sfr __at (0xFBE) CCPR1; + +__sfr __at (0xFBE) CCPR1L; + +__sfr __at (0xFBF) CCPR1H; + +__sfr __at (0xFC0) ADCON2; +volatile __ADCON2bits_t __at (0xFC0) ADCON2bits; + +__sfr __at (0xFC1) ADCON1; +volatile __ADCON1bits_t __at (0xFC1) ADCON1bits; + +__sfr __at (0xFC2) ADCON0; +volatile __ADCON0bits_t __at (0xFC2) ADCON0bits; + +__sfr __at (0xFC3) ADRES; + +__sfr __at (0xFC3) ADRESL; + +__sfr __at (0xFC4) ADRESH; + +__sfr __at (0xFC5) SSP1CON2; +volatile __SSP1CON2bits_t __at (0xFC5) SSP1CON2bits; + +__sfr __at (0xFC5) SSPCON2; +volatile __SSPCON2bits_t __at (0xFC5) SSPCON2bits; + +__sfr __at (0xFC6) SSP1CON1; +volatile __SSP1CON1bits_t __at (0xFC6) SSP1CON1bits; + +__sfr __at (0xFC6) SSPCON1; +volatile __SSPCON1bits_t __at (0xFC6) SSPCON1bits; + +__sfr __at (0xFC7) SSP1STAT; +volatile __SSP1STATbits_t __at (0xFC7) SSP1STATbits; + +__sfr __at (0xFC7) SSPSTAT; +volatile __SSPSTATbits_t __at (0xFC7) SSPSTATbits; + +__sfr __at (0xFC8) SSP1ADD; + +__sfr __at (0xFC8) SSPADD; + +__sfr __at (0xFC9) SSP1BUF; + +__sfr __at (0xFC9) SSPBUF; + +__sfr __at (0xFCA) T2CON; +volatile __T2CONbits_t __at (0xFCA) T2CONbits; + +__sfr __at (0xFCB) PR2; + +__sfr __at (0xFCC) TMR2; + +__sfr __at (0xFCD) T1CON; +volatile __T1CONbits_t __at (0xFCD) T1CONbits; + +__sfr __at (0xFCE) TMR1L; + +__sfr __at (0xFCF) TMR1H; + +__sfr __at (0xFD0) RCON; +volatile __RCONbits_t __at (0xFD0) RCONbits; + +__sfr __at (0xFD1) WDTCON; +volatile __WDTCONbits_t __at (0xFD1) WDTCONbits; + +__sfr __at (0xFD3) OSCCON; +volatile __OSCCONbits_t __at (0xFD3) OSCCONbits; + +__sfr __at (0xFD5) T0CON; +volatile __T0CONbits_t __at (0xFD5) T0CONbits; + +__sfr __at (0xFD6) TMR0L; + +__sfr __at (0xFD7) TMR0H; + +__sfr __at (0xFD8) STATUS; +volatile __STATUSbits_t __at (0xFD8) STATUSbits; + +__sfr __at (0xFD9) FSR2L; + +__sfr __at (0xFDA) FSR2H; + +__sfr __at (0xFDB) PLUSW2; + +__sfr __at (0xFDC) PREINC2; + +__sfr __at (0xFDD) POSTDEC2; + +__sfr __at (0xFDE) POSTINC2; + +__sfr __at (0xFDF) INDF2; + +__sfr __at (0xFE0) BSR; + +__sfr __at (0xFE1) FSR1L; + +__sfr __at (0xFE2) FSR1H; + +__sfr __at (0xFE3) PLUSW1; + +__sfr __at (0xFE4) PREINC1; + +__sfr __at (0xFE5) POSTDEC1; + +__sfr __at (0xFE6) POSTINC1; + +__sfr __at (0xFE7) INDF1; + +__sfr __at (0xFE8) WREG; + +__sfr __at (0xFE9) FSR0L; + +__sfr __at (0xFEA) FSR0H; + +__sfr __at (0xFEB) PLUSW0; + +__sfr __at (0xFEC) PREINC0; + +__sfr __at (0xFED) POSTDEC0; + +__sfr __at (0xFEE) POSTINC0; + +__sfr __at (0xFEF) INDF0; + +__sfr __at (0xFF0) INTCON3; +volatile __INTCON3bits_t __at (0xFF0) INTCON3bits; + +__sfr __at (0xFF1) INTCON2; +volatile __INTCON2bits_t __at (0xFF1) INTCON2bits; + +__sfr __at (0xFF2) INTCON; +volatile __INTCONbits_t __at (0xFF2) INTCONbits; + +__sfr __at (0xFF3) PROD; + +__sfr __at (0xFF3) PRODL; + +__sfr __at (0xFF4) PRODH; + +__sfr __at (0xFF5) TABLAT; + +__sfr __at (0xFF6) TBLPTR; + +__sfr __at (0xFF6) TBLPTRL; + +__sfr __at (0xFF7) TBLPTRH; + +__sfr __at (0xFF8) TBLPTRU; + +__sfr __at (0xFF9) PC; + +__sfr __at (0xFF9) PCL; + +__sfr __at (0xFFA) PCLATH; + +__sfr __at (0xFFB) PCLATU; + +__sfr __at (0xFFC) STKPTR; +volatile __STKPTRbits_t __at (0xFFC) STKPTRbits; + +__sfr __at (0xFFD) TOS; + +__sfr __at (0xFFD) TOSL; + +__sfr __at (0xFFE) TOSH; + +__sfr __at (0xFFF) TOSU; + + diff --git a/device/lib/pic16/libdev/pic18f25j10.c b/device/lib/pic16/libdev/pic18f25j10.c new file mode 100644 index 00000000..ac77a070 --- /dev/null +++ b/device/lib/pic16/libdev/pic18f25j10.c @@ -0,0 +1,12 @@ +/* + * pic18f25j10.c - device specific definitions + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#include + diff --git a/device/lib/pic16/libdev/pic18f44j10.c b/device/lib/pic16/libdev/pic18f44j10.c new file mode 100644 index 00000000..bbb70efa --- /dev/null +++ b/device/lib/pic16/libdev/pic18f44j10.c @@ -0,0 +1,354 @@ +/* + * pic18f44j10.c - device specific definitions + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#include + + +__sfr __at (0xF80) PORTA; +volatile __PORTAbits_t __at (0xF80) PORTAbits; + +__sfr __at (0xF81) PORTB; +volatile __PORTBbits_t __at (0xF81) PORTBbits; + +__sfr __at (0xF82) PORTC; +volatile __PORTCbits_t __at (0xF82) PORTCbits; + +__sfr __at (0xF83) PORTD; +volatile __PORTDbits_t __at (0xF83) PORTDbits; + +__sfr __at (0xF84) PORTE; +volatile __PORTEbits_t __at (0xF84) PORTEbits; + +__sfr __at (0xF85) SSP2CON2; +volatile __SSP2CON2bits_t __at (0xF85) SSP2CON2bits; + +__sfr __at (0xF86) SSP2CON1; +volatile __SSP2CON1bits_t __at (0xF86) SSP2CON1bits; + +__sfr __at (0xF87) SSP2STAT; +volatile __SSP2STATbits_t __at (0xF87) SSP2STATbits; + +__sfr __at (0xF88) SSP2ADD; + +__sfr __at (0xF89) LATA; +volatile __LATAbits_t __at (0xF89) LATAbits; + +__sfr __at (0xF8A) LATB; +volatile __LATBbits_t __at (0xF8A) LATBbits; + +__sfr __at (0xF8B) LATC; +volatile __LATCbits_t __at (0xF8B) LATCbits; + +__sfr __at (0xF8C) LATD; +volatile __LATDbits_t __at (0xF8C) LATDbits; + +__sfr __at (0xF8D) LATE; +volatile __LATEbits_t __at (0xF8D) LATEbits; + +__sfr __at (0xF8E) SSP2BUF; + +__sfr __at (0xF92) DDRA; +volatile __DDRAbits_t __at (0xF92) DDRAbits; + +__sfr __at (0xF92) TRISA; +volatile __TRISAbits_t __at (0xF92) TRISAbits; + +__sfr __at (0xF93) DDRB; +volatile __DDRBbits_t __at (0xF93) DDRBbits; + +__sfr __at (0xF93) TRISB; +volatile __TRISBbits_t __at (0xF93) TRISBbits; + +__sfr __at (0xF94) DDRC; +volatile __DDRCbits_t __at (0xF94) DDRCbits; + +__sfr __at (0xF94) TRISC; +volatile __TRISCbits_t __at (0xF94) TRISCbits; + +__sfr __at (0xF95) DDRD; +volatile __DDRDbits_t __at (0xF95) DDRDbits; + +__sfr __at (0xF95) TRISD; +volatile __TRISDbits_t __at (0xF95) TRISDbits; + +__sfr __at (0xF96) DDRE; +volatile __DDREbits_t __at (0xF96) DDREbits; + +__sfr __at (0xF96) TRISE; +volatile __TRISEbits_t __at (0xF96) TRISEbits; + +__sfr __at (0xF9B) OSCTUNE; +volatile __OSCTUNEbits_t __at (0xF9B) OSCTUNEbits; + +__sfr __at (0xF9D) PIE1; +volatile __PIE1bits_t __at (0xF9D) PIE1bits; + +__sfr __at (0xF9E) PIR1; +volatile __PIR1bits_t __at (0xF9E) PIR1bits; + +__sfr __at (0xF9F) IPR1; +volatile __IPR1bits_t __at (0xF9F) IPR1bits; + +__sfr __at (0xFA0) PIE2; +volatile __PIE2bits_t __at (0xFA0) PIE2bits; + +__sfr __at (0xFA1) PIR2; +volatile __PIR2bits_t __at (0xFA1) PIR2bits; + +__sfr __at (0xFA2) IPR2; +volatile __IPR2bits_t __at (0xFA2) IPR2bits; + +__sfr __at (0xFA3) PIE3; +volatile __PIE3bits_t __at (0xFA3) PIE3bits; + +__sfr __at (0xFA4) PIR3; +volatile __PIR3bits_t __at (0xFA4) PIR3bits; + +__sfr __at (0xFA5) IPR3; +volatile __IPR3bits_t __at (0xFA5) IPR3bits; + +__sfr __at (0xFA6) EECON1; +volatile __EECON1bits_t __at (0xFA6) EECON1bits; + +__sfr __at (0xFA7) EECON2; + +__sfr __at (0xFAB) RCSTA; +volatile __RCSTAbits_t __at (0xFAB) RCSTAbits; + +__sfr __at (0xFAB) RCSTA1; +volatile __RCSTA1bits_t __at (0xFAB) RCSTA1bits; + +__sfr __at (0xFAC) TXSTA; +volatile __TXSTAbits_t __at (0xFAC) TXSTAbits; + +__sfr __at (0xFAC) TXSTA1; +volatile __TXSTA1bits_t __at (0xFAC) TXSTA1bits; + +__sfr __at (0xFAD) TXREG; + +__sfr __at (0xFAD) TXREG1; + +__sfr __at (0xFAE) RCREG; + +__sfr __at (0xFAE) RCREG1; + +__sfr __at (0xFAF) SPBRG; + +__sfr __at (0xFAF) SPBRG1; + +__sfr __at (0xFB0) SPBRGH; + +__sfr __at (0xFB4) CMCON; +volatile __CMCONbits_t __at (0xFB4) CMCONbits; + +__sfr __at (0xFB5) CVRCON; +volatile __CVRCONbits_t __at (0xFB5) CVRCONbits; + +__sfr __at (0xFB6) ECCP1AS; +volatile __ECCP1ASbits_t __at (0xFB6) ECCP1ASbits; + +__sfr __at (0xFB7) ECCP1DEL; +volatile __ECCP1DELbits_t __at (0xFB7) ECCP1DELbits; + +__sfr __at (0xFB7) PWM1CON; +volatile __PWM1CONbits_t __at (0xFB7) PWM1CONbits; + +__sfr __at (0xFB8) BAUDCON; +volatile __BAUDCONbits_t __at (0xFB8) BAUDCONbits; + +__sfr __at (0xFB8) BAUDCTL; +volatile __BAUDCTLbits_t __at (0xFB8) BAUDCTLbits; + +__sfr __at (0xFBA) CCP2CON; +volatile __CCP2CONbits_t __at (0xFBA) CCP2CONbits; + +__sfr __at (0xFBB) CCPR2; + +__sfr __at (0xFBB) CCPR2L; + +__sfr __at (0xFBC) CCPR2H; + +__sfr __at (0xFBD) CCP1CON; +volatile __CCP1CONbits_t __at (0xFBD) CCP1CONbits; + +__sfr __at (0xFBD) ECCP1CON; +volatile __ECCP1CONbits_t __at (0xFBD) ECCP1CONbits; + +__sfr __at (0xFBE) CCPR1; + +__sfr __at (0xFBE) CCPR1L; + +__sfr __at (0xFBF) CCPR1H; + +__sfr __at (0xFC0) ADCON2; +volatile __ADCON2bits_t __at (0xFC0) ADCON2bits; + +__sfr __at (0xFC1) ADCON1; +volatile __ADCON1bits_t __at (0xFC1) ADCON1bits; + +__sfr __at (0xFC2) ADCON0; +volatile __ADCON0bits_t __at (0xFC2) ADCON0bits; + +__sfr __at (0xFC3) ADRES; + +__sfr __at (0xFC3) ADRESL; + +__sfr __at (0xFC4) ADRESH; + +__sfr __at (0xFC5) SSP1CON2; +volatile __SSP1CON2bits_t __at (0xFC5) SSP1CON2bits; + +__sfr __at (0xFC5) SSPCON2; +volatile __SSPCON2bits_t __at (0xFC5) SSPCON2bits; + +__sfr __at (0xFC6) SSP1CON1; +volatile __SSP1CON1bits_t __at (0xFC6) SSP1CON1bits; + +__sfr __at (0xFC6) SSPCON1; +volatile __SSPCON1bits_t __at (0xFC6) SSPCON1bits; + +__sfr __at (0xFC7) SSP1STAT; +volatile __SSP1STATbits_t __at (0xFC7) SSP1STATbits; + +__sfr __at (0xFC7) SSPSTAT; +volatile __SSPSTATbits_t __at (0xFC7) SSPSTATbits; + +__sfr __at (0xFC8) SSP1ADD; + +__sfr __at (0xFC8) SSPADD; + +__sfr __at (0xFC9) SSP1BUF; + +__sfr __at (0xFC9) SSPBUF; + +__sfr __at (0xFCA) T2CON; +volatile __T2CONbits_t __at (0xFCA) T2CONbits; + +__sfr __at (0xFCB) PR2; + +__sfr __at (0xFCC) TMR2; + +__sfr __at (0xFCD) T1CON; +volatile __T1CONbits_t __at (0xFCD) T1CONbits; + +__sfr __at (0xFCE) TMR1L; + +__sfr __at (0xFCF) TMR1H; + +__sfr __at (0xFD0) RCON; +volatile __RCONbits_t __at (0xFD0) RCONbits; + +__sfr __at (0xFD1) WDTCON; +volatile __WDTCONbits_t __at (0xFD1) WDTCONbits; + +__sfr __at (0xFD3) OSCCON; +volatile __OSCCONbits_t __at (0xFD3) OSCCONbits; + +__sfr __at (0xFD5) T0CON; +volatile __T0CONbits_t __at (0xFD5) T0CONbits; + +__sfr __at (0xFD6) TMR0L; + +__sfr __at (0xFD7) TMR0H; + +__sfr __at (0xFD8) STATUS; +volatile __STATUSbits_t __at (0xFD8) STATUSbits; + +__sfr __at (0xFD9) FSR2L; + +__sfr __at (0xFDA) FSR2H; + +__sfr __at (0xFDB) PLUSW2; + +__sfr __at (0xFDC) PREINC2; + +__sfr __at (0xFDD) POSTDEC2; + +__sfr __at (0xFDE) POSTINC2; + +__sfr __at (0xFDF) INDF2; + +__sfr __at (0xFE0) BSR; + +__sfr __at (0xFE1) FSR1L; + +__sfr __at (0xFE2) FSR1H; + +__sfr __at (0xFE3) PLUSW1; + +__sfr __at (0xFE4) PREINC1; + +__sfr __at (0xFE5) POSTDEC1; + +__sfr __at (0xFE6) POSTINC1; + +__sfr __at (0xFE7) INDF1; + +__sfr __at (0xFE8) WREG; + +__sfr __at (0xFE9) FSR0L; + +__sfr __at (0xFEA) FSR0H; + +__sfr __at (0xFEB) PLUSW0; + +__sfr __at (0xFEC) PREINC0; + +__sfr __at (0xFED) POSTDEC0; + +__sfr __at (0xFEE) POSTINC0; + +__sfr __at (0xFEF) INDF0; + +__sfr __at (0xFF0) INTCON3; +volatile __INTCON3bits_t __at (0xFF0) INTCON3bits; + +__sfr __at (0xFF1) INTCON2; +volatile __INTCON2bits_t __at (0xFF1) INTCON2bits; + +__sfr __at (0xFF2) INTCON; +volatile __INTCONbits_t __at (0xFF2) INTCONbits; + +__sfr __at (0xFF3) PROD; + +__sfr __at (0xFF3) PRODL; + +__sfr __at (0xFF4) PRODH; + +__sfr __at (0xFF5) TABLAT; + +__sfr __at (0xFF6) TBLPTR; + +__sfr __at (0xFF6) TBLPTRL; + +__sfr __at (0xFF7) TBLPTRH; + +__sfr __at (0xFF8) TBLPTRU; + +__sfr __at (0xFF9) PC; + +__sfr __at (0xFF9) PCL; + +__sfr __at (0xFFA) PCLATH; + +__sfr __at (0xFFB) PCLATU; + +__sfr __at (0xFFC) STKPTR; +volatile __STKPTRbits_t __at (0xFFC) STKPTRbits; + +__sfr __at (0xFFD) TOS; + +__sfr __at (0xFFD) TOSL; + +__sfr __at (0xFFE) TOSH; + +__sfr __at (0xFFF) TOSU; + + diff --git a/device/lib/pic16/libdev/pic18f45j10.c b/device/lib/pic16/libdev/pic18f45j10.c new file mode 100644 index 00000000..fa5ba12f --- /dev/null +++ b/device/lib/pic16/libdev/pic18f45j10.c @@ -0,0 +1,12 @@ +/* + * pic18f45j10.c - device specific definitions + * + * This file is part of the GNU PIC library for SDCC, + * originally devised by Vangelis Rokas + * + * It has been automatically generated by inc2h-pic16.pl, + * (c) 2007 by Raphael Neider + */ + +#include + diff --git a/device/lib/pic16/libio/adc.ignore b/device/lib/pic16/libio/adc.ignore index d256bd82..ab654e72 100644 --- a/device/lib/pic16/libio/adc.ignore +++ b/device/lib/pic16/libio/adc.ignore @@ -3,3 +3,9 @@ 4221 4321 +# devices not supported by gputils as of 2007-05-14 +24j10 +25j10 +44j10 +45j10 + diff --git a/device/lib/pic16/libio/i2c.ignore b/device/lib/pic16/libio/i2c.ignore index eb21c341..a39cee8e 100644 --- a/device/lib/pic16/libio/i2c.ignore +++ b/device/lib/pic16/libio/i2c.ignore @@ -11,3 +11,9 @@ 4331 4431 +# devices not supported by gputils as of 2007-05-14 +24j10 +25j10 +44j10 +45j10 + diff --git a/device/lib/pic16/libio/usart.ignore b/device/lib/pic16/libio/usart.ignore index d256bd82..ab654e72 100644 --- a/device/lib/pic16/libio/usart.ignore +++ b/device/lib/pic16/libio/usart.ignore @@ -3,3 +3,9 @@ 4221 4321 +# devices not supported by gputils as of 2007-05-14 +24j10 +25j10 +44j10 +45j10 + diff --git a/device/lib/pic16/pics.all b/device/lib/pic16/pics.all index caf09a48..b6e614f0 100644 --- a/device/lib/pic16/pics.all +++ b/device/lib/pic16/pics.all @@ -18,8 +18,10 @@ 2331 2431 2455 +24j10 2525 2550 +25j10 2620 4220 @@ -29,9 +31,11 @@ 4331 4431 4455 +44j10 4520 4525 4550 +45j10 4620 6520 diff --git a/doc/sdccman.lyx b/doc/sdccman.lyx index d4618487..d89102d4 100644 --- a/doc/sdccman.lyx +++ b/doc/sdccman.lyx @@ -1,4 +1,4 @@ -#LyX 1.4.4 created this file. For more info see http://www.lyx.org/ +#LyX 1.4.3 created this file. For more info see http://www.lyx.org/ \lyxformat 245 \begin_document \begin_header @@ -730,7 +730,7 @@ open source freeware \emph default ; source code for all the sub-packages (pre-processor, assemblers, linkers - etc) is distributed with the package. + etc.) is distributed with the package. This documentation is maintained using a free open source word processor (LyX). \newline @@ -836,8 +836,20 @@ It would be fine to add to each item, in which version was it changed. \begin_layout Itemize short is now equivalent to int (16 bits), it used to be equivalent to char (8 bits) which is not ANSI compliant. - To maintain compatibility, old programs may be compiled using the --short-is-8b -its commandline option (see + To maintain compatibility, old programs may be compiled using the - +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-short-is-8bits commandline option (see \begin_inset LatexCommand \vref{lyx:--short-is-8bits} \end_inset @@ -1404,7 +1416,25 @@ status collapsed \end_inset --disable-pic-port Excludes the PIC port +-disable-pic-port Excludes the PIC14 port +\end_layout + +\begin_layout List +\labelwidthstring 00.00.0000 +- +\begin_inset ERT +status collapsed + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-disable-pic16-port Excludes the PIC16 port \end_layout \begin_layout List @@ -1534,14 +1564,14 @@ status collapsed \end_inset --help` and the man/info pages of `configure` for details. +-help' and the man/info pages of `configure' for details. \newline \newline The names of the standard libraries STD_LIB, STD_INT_LIB, STD_LONG_LIB, STD_FP_LIB, STD_DS390_LI B, STD_XA51_LIB and the environment variables SDCC_DIR_NAME, SDCC_INCLUDE_NAME, - SDCC_LIB_NAME are defined by `configure` too. + SDCC_LIB_NAME are defined by `configure' too. At the moment it's not possible to change the default settings (it was simply never required). \newline @@ -2811,7 +2841,7 @@ model \begin_layout Standard \noindent -The install paths can still be changed during `make install` with e.g.: +The install paths can still be changed during `make install' with e.g.: \end_layout \begin_layout LyX-Code @@ -4611,8 +4641,8 @@ This is not only usefull for building different binaries, e.g. generated files are not scattered between the source files. And the best thing is: if you want to change a file you can leave the original file untouched in the source directory. - Simply copy it to the build directory, edit it, enter `make clean`, `rm - Makefile.dep` and `make`. + Simply copy it to the build directory, edit it, enter `make clean', `rm + Makefile.dep' and `make'. \series bold make @@ -8265,7 +8295,20 @@ status collapsed \labelwidthstring 00.00.0000 \series bold ---stack-8-bit - switches off the 10-bit mode +- +\begin_inset ERT +status open + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + +-stack-8-bit - switches off the 10-bit mode \end_layout \end_inset @@ -8306,7 +8349,7 @@ status collapsed \series bold - \begin_inset ERT -status collapsed +status open \begin_layout Standard @@ -9404,7 +9447,41 @@ reentrant Parameters and Local Variables for more details. If this option is used all source files in the project should be compiled with this option. - It automatically implies --int-long-reent and --float-reent. + It automatically implies - +\series bold + +\begin_inset ERT +status open + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + + +\series default +-int-long-reent and - +\series bold + +\begin_inset ERT +status open + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + + +\series default +-float-reent. \end_layout @@ -9749,7 +9826,24 @@ status collapsed unsigned \family default . - To set the signess for characters to unsigned, use the option --funsigned-char. + To set the signess for characters to unsigned, use the option - +\series bold + +\begin_inset ERT +status open + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + + +\series default +-funsigned-char. If this option is set and no signedness keyword (unsigned/signed) is given, a char will be signed. All other types are unaffected. @@ -9977,8 +10071,24 @@ status collapsed \series default - Don't include peep-hole comments in the generated asm files even if --fverbose- -asm option is specified. + Don't include peep-hole comments in the generated asm files even if - +\series bold + +\begin_inset ERT +status open + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + + +\series default +-fverbose-asm option is specified. \end_layout \begin_layout List @@ -10696,7 +10806,7 @@ status collapsed \series default - Will create a dump of iCode's, after global subexpression elimination + Will create a dump of iCodes, after global subexpression elimination \begin_inset LatexCommand \index{Global subexpression elimination} \end_inset @@ -10730,7 +10840,7 @@ status collapsed \series default - Will create a dump of iCode's, after deadcode elimination + Will create a dump of iCodes, after deadcode elimination \begin_inset LatexCommand \index{Dead-code elimination} \end_inset @@ -10767,7 +10877,7 @@ status collapsed \size large \size default -Will create a dump of iCode's, after loop optimizations +Will create a dump of iCodes, after loop optimizations \begin_inset LatexCommand \index{Loop optimization} \end_inset @@ -10804,7 +10914,7 @@ status collapsed \size large \size default -Will create a dump of iCode's, after live range analysis +Will create a dump of iCodes, after live range analysis \begin_inset LatexCommand \index{Live range analysis} \end_inset @@ -10873,7 +10983,7 @@ status collapsed \series default \bar default -Will create a dump of iCode's, after register assignment +Will create a dump of iCodes, after register assignment \begin_inset LatexCommand \index{Register assignment} \end_inset @@ -10954,7 +11064,7 @@ Redirecting output on Windows Shells \end_layout \begin_layout Standard -By default SDCC writes it's error messages to +By default SDCC writes its error messages to \begin_inset Quotes sld \end_inset @@ -15114,7 +15224,24 @@ The compiler triggers the linker to link certain initialization modules called crt. Only the necessary ones are linked, for instance crtxstack.asm (GSINIT1, - GSINIT5) is not linked unless the --xstack option is used. + GSINIT5) is not linked unless the - +\series bold + +\begin_inset ERT +status open + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + + +\series default +-xstack option is used. These modules are highly entangled by the use of special segments/areas, but a common layout is shown below: \end_layout @@ -21368,7 +21495,7 @@ less_pedantic \end_inset -- the compiler will not warn you anymore for obvious mistakes, you'r on +- the compiler will not warn you anymore for obvious mistakes, you're on your own now ;-( . See also the command line option - \begin_inset ERT @@ -22133,7 +22260,7 @@ int foo () \begin_layout Standard The compiler will generate a warning message when extra space is allocated. - It is strongly recommended that the save and restore pragma's be used when + It is strongly recommended that the save and restore pragmas be used when changing options for a function. \newline @@ -22837,29 +22964,34 @@ The HC08 port passes the regression test suite (see section \end_layout \begin_layout Section -The PIC14 port -\end_layout +The PIC14 +\begin_inset LatexCommand \index{PIC14} -\begin_layout Standard -The PIC14 port adds support for Microchip(TM)'s 14 -\begin_inset ERT -status open +\end_inset + + port +\end_layout \begin_layout Standard +The PIC14 port adds support for Microchip +\begin_inset LatexCommand \index{Microchip} +\end_inset -\backslash -, -\end_layout +\begin_inset Formula $^{\text{TM}}$ \end_inset -bit PIC + PIC \begin_inset LatexCommand \index{PIC14} \end_inset - MCUs. + +\begin_inset Formula $^{\text{TM}}$ +\end_inset + + MCUs with 14 bit wide instructions. This port is not yet mature and still lacks many features. However, it can work for simple code. \end_layout @@ -22972,7 +23104,7 @@ For devices that have multiple code pages it is more efficient to use the \begin_layout Enumerate And as for any 8 bit micro (especially for PIC14 as they have a very simple - instruction set), use 'unsigned char' wherever possible instead of 'int'. + instruction set), use `unsigned char' wherever possible instead of `int'. \end_layout \begin_layout Subsection @@ -23045,7 +23177,7 @@ Interrupt Code \end_layout \begin_layout Standard -For the interrupt function, use the keyword '__interrupt' +For the interrupt function, use the keyword `__interrupt' \begin_inset LatexCommand \index{PIC14!interrupt} \end_inset @@ -23329,15 +23461,7 @@ device/lib \end_layout \begin_layout Subsubsection -error: missing definition for symbol -\begin_inset Quotes sld -\end_inset - -__gptrget1 -\begin_inset Quotes srd -\end_inset - - +error: missing definition for symbol ``__gptrget1'' \end_layout \begin_layout Standard @@ -23360,15 +23484,7 @@ libsdcc.lib \end_layout \begin_layout Subsubsection -Processor mismatch in file -\begin_inset Quotes sld -\end_inset - -XXX -\begin_inset Quotes srd -\end_inset - -. +Processor mismatch in file ``XXX''. \end_layout \begin_layout Standard @@ -23452,20 +23568,27 @@ The PIC16 \end_layout \begin_layout Standard -The PIC16 -\begin_inset LatexCommand \index{PIC16} +The PIC16 port adds support for Microchip +\begin_inset LatexCommand \index{Microchip} \end_inset - port is the portion of SDCC that is responsible to produce code for the - Microchip -\begin_inset LatexCommand \index{Microchip} +\begin_inset Formula $^{\text{TM}}$ \end_inset -(TM) microcontrollers with 16 bit core. - Currently this family of microcontrollers contains the PIC18Fxxx and PIC18Fxxxx. - Currently supported devices are: + PIC +\begin_inset LatexCommand \index{PIC} + +\end_inset + + +\begin_inset Formula $^{\text{TM}}$ +\end_inset + + MCUs with 16 bit wide instructions. + Currently this family of microcontrollers contains the PIC18Fxxx and PIC18Fxxxx +; devices supported by the port include: \end_layout \begin_layout Standard @@ -23477,11 +23600,13 @@ The PIC16 \end_layout \begin_layout Standard -18F: 2220, 2221, 2320, 2321, 2331, 2431, 2455, 2525, 2550, 2620 +18F: 2220, 2221, 2320, 2321, 2331, 2431, 2455, 24j10, 2525, 2550, 25j10, + 2620 \end_layout \begin_layout Standard -18F: 4220, 4221, 4320, 4321, 4331, 4431, 4455, 4520, 4525, 4550, 4620 +18F: 4220, 4221, 4320, 4321, 4331, 4431, 4455, 44j10, 4520, 4525, 4550, + 45j10, 4620 \end_layout \begin_layout Standard @@ -26093,7 +26218,7 @@ not Address of the specific interrupt. This is not a problem for the LOW priority interrupts, but it is a problem for the RESET and the HIGH priority interrupts because code may be written - at the next interrupt´s vector address and cause undeterminate program + at the next interrupt's vector address and cause undeterminate program behaviour if that interrupt is raised. \begin_inset Foot status open @@ -26111,7 +26236,7 @@ disabled \end_layout \begin_layout Enumerate -when the ISR is small enough not to reach the next interrupt´s vector address. +when the ISR is small enough not to reach the next interrupt's vector address. \end_layout \end_inset @@ -26124,7 +26249,7 @@ when the ISR is small enough not to reach the next interrupt \emph on n \emph default - is possible to be omitted. + may be omitted. This way a function is generated similar to an ISR, but it is not assigned to any interrupt. \end_layout @@ -32248,7 +32373,24 @@ Subversion Source Code Repository The output of \family sans \series bold -sdcc --version +sdcc - +\family default + +\begin_inset ERT +status open + +\begin_layout Standard + + +\backslash +/ +\end_layout + +\end_inset + + +\family sans +-version \family default \series default or the filenames of the snapshot versions of SDCC include date and its diff --git a/src/pic16/devices.inc b/src/pic16/devices.inc index fd83ac3b..da00ab89 100644 --- a/src/pic16/devices.inc +++ b/src/pic16/devices.inc @@ -429,6 +429,28 @@ { 0, 0 }, { 0, 0 }, { 0, 0 } } } }, + { + {"p18f24j10", "18f24j10", "pic18f24j10", "f24j10"}, /* also 18f[24][45]j10 */ + 0, + 0x1000, /* 4096 */ + 0x80, + 0, + { 0xf80, 0xfff }, /* PIC18F24j10 range of SFR's */ + { + /* PIC18F24j10 configuration words */ + 0x300000, + 0x30000d, + { { 0xe1, 0, 0xff } /* 0 */ , { 0x07, 0, 0xff } /* 1 */ , { 0xc7, 0, 0xff } /* 2 */ , + { 0x0f, 0, 0xff } /* 3 */ , { -1, 0, 0xff } /* 4 */ , { 0x01, 0, 0xff } /* 5 */ , + { -1, 0, 0xff } /* 6 */ , { -1, 0, 0xff } /* 7 */ , { -1, 0, 0xff } /* 8 */ , + { -1, 0, 0xff } /* 9 */ , { -1, 0, 0xff } /* a */ , { -1, 0, 0xff } /* b */ , + { -1, 0, 0xff } /* c */ , { -1, 0, 0xff } /* d */ } + }, + { 0x200000, 0x200007, + { { 0, 0 }, { 0, 0 }, { 0, 0 }, { 0, 0 }, { 0, 0 }, + { 0, 0 }, { 0, 0 }, { 0, 0 } } + } + }, { {"p18f2525", "18f2525", "pic18f2525", "f2525"}, 0, @@ -473,6 +495,28 @@ { 0, 0 }, { 0, 0 }, { 0, 0 } } } }, + { + {"p18f25j10", "18f25j10", "pic18f25j10", "f25j10"}, /* also 18f[24][45]j10 */ + 0, + 0x1000, /* 4096 */ + 0x80, + 0, + { 0xf80, 0xfff }, /* PIC18F25j10 range of SFR's */ + { + /* PIC18F25j10 configuration words */ + 0x300000, + 0x30000d, + { { 0xe1, 0, 0xff } /* 0 */ , { 0x07, 0, 0xff } /* 1 */ , { 0xc7, 0, 0xff } /* 2 */ , + { 0x0f, 0, 0xff } /* 3 */ , { -1, 0, 0xff } /* 4 */ , { 0x01, 0, 0xff } /* 5 */ , + { -1, 0, 0xff } /* 6 */ , { -1, 0, 0xff } /* 7 */ , { -1, 0, 0xff } /* 8 */ , + { -1, 0, 0xff } /* 9 */ , { -1, 0, 0xff } /* a */ , { -1, 0, 0xff } /* b */ , + { -1, 0, 0xff } /* c */ , { -1, 0, 0xff } /* d */ } + }, + { 0x200000, 0x200007, + { { 0, 0 }, { 0, 0 }, { 0, 0 }, { 0, 0 }, { 0, 0 }, + { 0, 0 }, { 0, 0 }, { 0, 0 } } + } + }, { {"p18f2620", "18f2620", "pic18f2620", "f2620"}, 0, @@ -653,6 +697,28 @@ { 0, 0 }, { 0, 0 }, { 0, 0 } } } }, + { + {"p18f44j10", "18f44j10", "pic18f44j10", "f44j10"}, /* also 18f[24][45]j10 */ + 0, + 0x1000, /* 4096 */ + 0x80, + 0, + { 0xf80, 0xfff }, /* PIC18F44j10 range of SFR's */ + { + /* PIC18F44j10 configuration words */ + 0x300000, + 0x30000d, + { { 0xe1, 0, 0xff } /* 0 */ , { 0x07, 0, 0xff } /* 1 */ , { 0xc7, 0, 0xff } /* 2 */ , + { 0x0f, 0, 0xff } /* 3 */ , { -1, 0, 0xff } /* 4 */ , { 0x01, 0, 0xff } /* 5 */ , + { -1, 0, 0xff } /* 6 */ , { -1, 0, 0xff } /* 7 */ , { -1, 0, 0xff } /* 8 */ , + { -1, 0, 0xff } /* 9 */ , { -1, 0, 0xff } /* a */ , { -1, 0, 0xff } /* b */ , + { -1, 0, 0xff } /* c */ , { -1, 0, 0xff } /* d */ } + }, + { 0x200000, 0x200007, + { { 0, 0 }, { 0, 0 }, { 0, 0 }, { 0, 0 }, { 0, 0 }, + { 0, 0 }, { 0, 0 }, { 0, 0 } } + } + }, { {"p18f4520", "18f4520", "pic18f4520", "f4520"}, 0, @@ -719,6 +785,28 @@ { 0, 0 }, { 0, 0 }, { 0, 0 } } } }, + { + {"p18f45j10", "18f45j10", "pic18f45j10", "f45j10"}, /* also 18f[24][45]j10 */ + 0, + 0x1000, /* 4096 */ + 0x80, + 0, + { 0xf80, 0xfff }, /* PIC18F45j10 range of SFR's */ + { + /* PIC18F45j10 configuration words */ + 0x300000, + 0x30000d, + { { 0xe1, 0, 0xff } /* 0 */ , { 0x07, 0, 0xff } /* 1 */ , { 0xc7, 0, 0xff } /* 2 */ , + { 0x0f, 0, 0xff } /* 3 */ , { -1, 0, 0xff } /* 4 */ , { 0x01, 0, 0xff } /* 5 */ , + { -1, 0, 0xff } /* 6 */ , { -1, 0, 0xff } /* 7 */ , { -1, 0, 0xff } /* 8 */ , + { -1, 0, 0xff } /* 9 */ , { -1, 0, 0xff } /* a */ , { -1, 0, 0xff } /* b */ , + { -1, 0, 0xff } /* c */ , { -1, 0, 0xff } /* d */ } + }, + { 0x200000, 0x200007, + { { 0, 0 }, { 0, 0 }, { 0, 0 }, { 0, 0 }, { 0, 0 }, + { 0, 0 }, { 0, 0 }, { 0, 0 } } + } + }, { {"p18f4620", "18f4620", "pic18f4620", "f4620"}, 0, -- 2.30.2