}
-void dump_cblock(FILE *of)
+void dump_sfr(FILE *of)
{
+
int start=-1;
int addr=0;
int bank_base;
+ static int udata_flag=0;
//dump_map(); /* display the register map */
-
+ fprintf(stdout,";dump_sfr \n");
if (pic->maxRAMaddress < 0) {
fprintf(stderr, "missing \"#pragma maxram\" setting\n");
return;
* assumes that the first register in the contiguous group
* of registers represents the bank for the whole group */
- fprintf(of," cblock 0X%04X\t; Bank %d\n",start,finalMapping[start].bank);
+ if ( (start != addr) && (!udata_flag) ) {
+ udata_flag = 1;
+ //fprintf(of,"\tudata\n");
+ }
for( ; start < addr; start++) {
- if((finalMapping[start].reg) && !finalMapping[start].reg->isEmitted ) {
- fprintf(of,"\t%s",finalMapping[start].reg->name);
+ if((finalMapping[start].reg) &&
+ (!finalMapping[start].reg->isEmitted) &&
+ (!finalMapping[start].instance) &&
+ (!finalMapping[start].isSFR)) {
- /* If this register is aliased in multiple banks, then
- * mangle the variable name with the alias address: */
- if(finalMapping[start].alias & start)
- fprintf(of,"_%x",bank_base);
+ fprintf(of,"%s\tres\t%i\n",
+ finalMapping[start].reg->name,
+ finalMapping[start].reg->size);
- if(finalMapping[start].instance)
- fprintf(of,"_%d",finalMapping[start].instance);
-
-
- fputc('\n',of);
-
- //finalMapping[start].reg->isEmitted = 1;
+ finalMapping[start].reg->isEmitted = 1;
}
}
- fprintf(of," endc\n");
-
start = -1;
}
do {
- //fprintf(stdout,"mapping %s to address 0x%02x, reg size = %d\n",reg->name, (reg->address+alias+i),reg->size);
+ fprintf(stdout,"mapping %s to address 0x%02x, reg size = %d\n",reg->name, (reg->address+alias+i),reg->size);
finalMapping[reg->address + alias + i].reg = reg;
finalMapping[reg->address + alias + i].instance = i;
} while (alias>=0);
}
- // fprintf(stderr,"%s - %s addr = 0x%03x, size %d\n",__FUNCTION__,reg->name, reg->address,reg->size);
+ fprintf(stderr,"%s - %s addr = 0x%03x, size %d\n",__FUNCTION__,reg->name, reg->address,reg->size);
reg->isMapped = 1;
{
int i;
- //fprintf(stderr,"%s - %s start_address = 0x%03x\n",__FUNCTION__,reg->name, start_address);
+ fprintf(stderr,"%s - %s start_address = 0x%03x\n",__FUNCTION__,reg->name, start_address);
if(reg->isFixed) {
if (validAddress(reg->address,reg->size)) {
for (reg = setFirstItem(regset) ; reg ;
reg = setNextItem(regset)) {
- //fprintf(stdout,"assigning %s isFixed=%d, wasUsed=%d\n",reg->name,reg->isFixed,reg->wasUsed);
+ fprintf(stdout,"assigning %s isFixed=%d, wasUsed=%d\n",reg->name,reg->isFixed,reg->wasUsed);
if((!reg->isFixed) && ( used || reg->wasUsed))
address = assignRegister(reg,address);
static void printIval (symbol * sym, sym_link * type, initList * ilist, pBlock *pb);
extern int noAlloc;
extern set *publics;
+extern set *externs;
extern unsigned maxInterrupts;
extern int maxRegBank;
extern symbol *mainf;
extern void printChar (FILE * ofile, char *s, int plen);
void pCodeInitRegisters(void);
+int getConfigWord(int address);
/*-----------------------------------------------------------------*/
/* aopLiteral - string from a literal value */
/* print the area name */
for (sym = setFirstItem (map->syms); sym;
- sym = setNextItem (map->syms))
- {
+ sym = setNextItem (map->syms)) {
- /* if extern then do nothing */
- if (IS_EXTERN (sym->etype))
- continue;
+ printf("%s\n",sym->name);
- /* if allocation required check is needed
- then check if the symbol really requires
- allocation only for local variables */
- if (arFlag && !IS_AGGREGATE (sym->type) &&
- !(sym->_isparm && !IS_REGPARM (sym->etype)) &&
- !sym->allocreq && sym->level)
- continue;
-
- /* if global variable & not static or extern
- and addPublics allowed then add it to the public set */
- if ((sym->level == 0 ||
- (sym->_isparm && !IS_REGPARM (sym->etype))) &&
- addPublics &&
- !IS_STATIC (sym->etype))
- addSetHead (&publics, sym);
+ /* if extern then add it into the extern list */
+ if (IS_EXTERN (sym->etype)) {
+ addSetHead (&externs, sym);
+ continue;
+ }
- /* if extern then do nothing or is a function
- then do nothing */
- if (IS_FUNC (sym->type))
- continue;
+ /* if allocation required check is needed
+ then check if the symbol really requires
+ allocation only for local variables */
+ if (arFlag && !IS_AGGREGATE (sym->type) &&
+ !(sym->_isparm && !IS_REGPARM (sym->etype)) &&
+ !sym->allocreq && sym->level)
+ continue;
+
+ /* if global variable & not static or extern
+ and addPublics allowed then add it to the public set */
+ if ((sym->level == 0 ||
+ (sym->_isparm && !IS_REGPARM (sym->etype))) &&
+ addPublics &&
+ !IS_STATIC (sym->etype))
+ addSetHead (&publics, sym);
+
+ /* if extern then do nothing or is a function
+ then do nothing */
+ if (IS_FUNC (sym->type))
+ continue;
#if 0
- /* print extra debug info if required */
- if (options.debug || sym->level == 0)
- {
- if (!sym->level) /* global */
- if (IS_STATIC (sym->etype))
- fprintf (map->oFile, "F%s_", moduleName); /* scope is file */
- else
- fprintf (map->oFile, "G_"); /* scope is global */
+ /* print extra debug info if required */
+ if (options.debug || sym->level == 0)
+ {
+ if (!sym->level) /* global */
+ if (IS_STATIC (sym->etype))
+ fprintf (map->oFile, "F%s_", moduleName); /* scope is file */
else
- /* symbol is local */
- fprintf (map->oFile, "L%s_", (sym->localof ? sym->localof->name : "-null-"));
- fprintf (map->oFile, "%s_%d_%d", sym->name, sym->level, sym->block);
- }
+ fprintf (map->oFile, "G_"); /* scope is global */
+ else
+ /* symbol is local */
+ fprintf (map->oFile, "L%s_", (sym->localof ? sym->localof->name : "-null-"));
+ fprintf (map->oFile, "%s_%d_%d", sym->name, sym->level, sym->block);
+ }
#endif
- /* if is has an absolute address then generate
- an equate for this no need to allocate space */
- if (SPEC_ABSA (sym->etype))
- {
- //if (options.debug || sym->level == 0)
- //fprintf (map->oFile,"; == 0x%04x\n",SPEC_ADDR (sym->etype));
-
- fprintf (map->oFile, "%s\tEQU\t0x%04x\n",
- sym->rname,
- SPEC_ADDR (sym->etype));
- }
- else
- {
- /* allocate space */
+ /* if it has an absolute address then generate
+ an equate for this no need to allocate space */
+ if (SPEC_ABSA (sym->etype))
+ {
+ //if (options.debug || sym->level == 0)
+ //fprintf (map->oFile,"; == 0x%04x\n",SPEC_ADDR (sym->etype));
- /* If this is a bit variable, then allocate storage after 8 bits have been declared */
- /* unlike the 8051, the pic does not have a separate bit area. So we emulate bit ram */
- /* by grouping the bits together into groups of 8 and storing them in the normal ram. */
- if (IS_BITVAR (sym->etype))
- {
- bitvars++;
- }
- else
- {
- fprintf (map->oFile, "\t%s\n", sym->rname);
- if ((size = (unsigned int) getSize (sym->type) & 0xffff) > 1)
- {
- for (i = 1; i < size; i++)
- fprintf (map->oFile, "\t%s_%d\n", sym->rname, i);
- }
- }
- //fprintf (map->oFile, "\t.ds\t0x%04x\n", (unsigned int)getSize (sym->type) & 0xffff);
- }
+ fprintf (map->oFile, "%s\tEQU\t0x%04x\n",
+ sym->rname,
+ SPEC_ADDR (sym->etype));
+ }
+ else
+ {
+ /* allocate space */
+
+ /* If this is a bit variable, then allocate storage after 8 bits have been declared */
+ /* unlike the 8051, the pic does not have a separate bit area. So we emulate bit ram */
+ /* by grouping the bits together into groups of 8 and storing them in the normal ram. */
+ if (IS_BITVAR (sym->etype))
+ {
+ bitvars++;
+ }
+ else
+ {
+ fprintf (map->oFile, "%s\tres\t%d\n", sym->rname,getSize (sym->type) & 0xffff);
+ /*
+ if ((size = (unsigned int) getSize (sym->type) & 0xffff) > 1)
+ {
+ for (i = 1; i < size; i++)
+ fprintf (map->oFile, "\t%s_%d\n", sym->rname, i);
+ }
+ */
+ }
+ //fprintf (map->oFile, "\t.ds\t0x%04x\n", (unsigned int)getSize (sym->type) & 0xffff);
+ }
- /* if it has a initial value then do it only if
- it is a global variable */
- if (sym->ival && sym->level == 0) {
- ast *ival = NULL;
+ /* if it has a initial value then do it only if
+ it is a global variable */
+ if (sym->ival && sym->level == 0) {
+ ast *ival = NULL;
- if (IS_AGGREGATE (sym->type))
- ival = initAggregates (sym, sym->ival, NULL);
- else
- ival = newNode ('=', newAst_VALUE(symbolVal (sym)),
- decorateType (resolveSymbols (list2expr (sym->ival))));
- codeOutFile = statsg->oFile;
- GcurMemmap = statsg;
- eBBlockFromiCode (iCodeFromAst (ival));
- sym->ival = NULL;
- }
+ if (IS_AGGREGATE (sym->type))
+ ival = initAggregates (sym, sym->ival, NULL);
+ else
+ ival = newNode ('=', newAst_VALUE(symbolVal (sym)),
+ decorateType (resolveSymbols (list2expr (sym->ival))));
+ codeOutFile = statsg->oFile;
+ GcurMemmap = statsg;
+ eBBlockFromiCode (iCodeFromAst (ival));
+ sym->ival = NULL;
}
+ }
}
static void
pic14createInterruptVect (FILE * vFile)
{
- unsigned i = 0;
mainf = newSymbol ("main", 0);
mainf->block = 0;
return;
}
- fprintf (vFile, ";\t.area\t%s\n", CODE_NAME);
- fprintf (vFile, ";__interrupt_vect:\n");
-
-
- if (!port->genIVT || !(port->genIVT (vFile, interrupts, maxInterrupts)))
- {
- /* "generic" interrupt table header (if port doesn't specify one).
-
- * Look suspiciously like 8051 code to me...
- */
-
- fprintf (vFile, ";\tljmp\t__sdcc_gsinit_startup\n");
+ fprintf (vFile, "%s", iComments2);
+ fprintf (vFile, "; config word \n");
+ fprintf (vFile, "%s", iComments2);
+ fprintf (vFile, "\t__config 0x%x\n", getConfigWord(0x2007));
+ fprintf (vFile, "%s", iComments2);
+ fprintf (vFile, "; reset and interrupt vectors \n");
+ fprintf (vFile, "%s", iComments2);
+ fprintf (vFile, "STARTUP\t%s\n", CODE_NAME);
+ fprintf (vFile, "\tgoto\t__sdcc_gsinit_startup\n");
+ fprintf (vFile, "\tnop\n");
+ fprintf (vFile, "\tnop\n");
+ fprintf (vFile, "\tgoto\t__sdcc_interrupt\n");
- /* now for the other interrupts */
- for (; i < maxInterrupts; i++)
- {
- if (interrupts[i])
- fprintf (vFile, ";\tljmp\t%s\n;\t.ds\t5\n", interrupts[i]->rname);
- else
- fprintf (vFile, ";\treti\n;\t.ds\t7\n");
- }
- }
}
}
+/*-----------------------------------------------------------------*/
+/* printExterns - generates extern for external variables */
+/*-----------------------------------------------------------------*/
+static void
+pic14printExterns (FILE * afile)
+{
+ symbol *sym;
+
+ fprintf (afile, "%s", iComments2);
+ fprintf (afile, "; extern variables in this module\n");
+ fprintf (afile, "%s", iComments2);
+
+ for (sym = setFirstItem (externs); sym;
+ sym = setNextItem (externs))
+ fprintf (afile, "\textern %s\n", sym->rname);
+}
+
/*-----------------------------------------------------------------*/
/* printPublics - generates .global for publics */
/*-----------------------------------------------------------------*/
fprintf (afile, "%s", iComments2);
for (sym = setFirstItem (publics); sym;
- sym = setNextItem (publics))
- fprintf (afile, ";\t.globl %s\n", sym->rname);
+ sym = setNextItem (publics)) {
+ if(!IS_BITFIELD(sym->type) && ((IS_FUNC(sym->type) || sym->allocreq)))
+ fprintf (afile, "\tglobal %s\n", sym->rname);
+ else
+ fprintf (afile, ";\tglobal %s\n", sym->rname);
+ }
}
-
-
/*-----------------------------------------------------------------*/
/* emitOverlay - will emit code for the overlay stuff */
/*-----------------------------------------------------------------*/
set *ovrset;
if (!elementsInSet (ovrSetSets))
- fprintf (afile, ";\t.area\t%s\n", port->mem.overlay_name);
+ fprintf (afile, "\t%s\n", port->mem.overlay_name);
/* for each of the sets in the overlay segment do */
for (ovrset = setFirstItem (ovrSetSets); ovrset;
otherwise the assembler will append each of these
declarations into one chunk and will not overlay
sad but true */
+
+ /* I don't think this applies to us. We are using gpasm. CRF */
+
fprintf (afile, ";\t.area _DUMMY\n");
/* output the area informtion */
fprintf (afile, ";\t.area\t%s\n", port->mem.overlay_name); /* MOF */
port->genAssemblerPreamble(asmFile);
}
+ /* print the extern variables in this module */
+ pic14printExterns (asmFile);
+
/* print the global variables in this module */
pic14printPublics (asmFile);
-
/* copy the sfr segment */
fprintf (asmFile, "%s", iComments2);
fprintf (asmFile, "; special function registers\n");
fprintf (asmFile, "%s", iComments2);
copyFile (asmFile, sfr->oFile);
-
+
+ fprintf (asmFile, "%s", iComments2);
+ fprintf (asmFile, "; udata\n");
+ fprintf (asmFile, "%s", iComments2);
+ fprintf (asmFile, "\tudata\n");
+ copyFile (asmFile, data->oFile);
/* Put all variables into a cblock */
AnalyzeBanking();
fprintf (asmFile, "%s", iComments2);
copyFile (asmFile, ovrFile);
+#if 0
+
/* create the stack segment MOF */
if (mainf && IFFUNC_HASBODY(mainf->type)) {
fprintf (asmFile, "%s", iComments2);
fprintf (asmFile,";\t.area XSEG (XDATA)\n"); /* MOF */
fprintf (asmFile,";\t.ds 256\n");
}
-
-
+
/* copy xtern ram data */
fprintf (asmFile, "%s", iComments2);
fprintf (asmFile, "; external ram data\n");
fprintf (asmFile, "%s", iComments2);
copyFile (asmFile, xdata->oFile);
-
+
+#endif
/* copy the bit segment */
fprintf (asmFile, "%s", iComments2);
fprintf (asmFile, "%s", iComments2);
copyFile (asmFile, bit->oFile);
-
- fprintf (asmFile, "\tORG 0\n");
-
/* copy the interrupt vector table */
if (mainf && IFFUNC_HASBODY(mainf->type)) {
+ copyFile (asmFile, vFile);
+
fprintf (asmFile, "%s", iComments2);
- fprintf (asmFile, "; interrupt vector \n");
+ fprintf (asmFile, "; initialization and interrupt code \n");
fprintf (asmFile, "%s", iComments2);
- copyFile (asmFile, vFile);
+
+ /* initialize data memory */
+ fprintf (asmFile, "code_init\t%s\t0x10\n", CODE_NAME);
+ fprintf (asmFile,"__sdcc_gsinit_startup:\n");
+ /* FIXME: This is temporary. The idata section should be used. If
+ not, we could add a special feature to the linker. This will
+ work in the mean time. Put all initalized data in main.c */
+ copypCode(asmFile, statsg->dbName);
+ fprintf (asmFile,"\tpagesel _main\n");
+ fprintf (asmFile,"\tgoto _main\n");
+
+ /* interrupt service routine */
+ fprintf (asmFile, "__sdcc_interrupt:\n");
+ copypCode(asmFile, 'I');
+ fprintf (asmFile,"\tgoto $\n");
}
-
+
+#if 0
+
/* copy global & static initialisations */
fprintf (asmFile, "%s", iComments2);
fprintf (asmFile, "; global & static initialisations\n");
fprintf (asmFile, "%s", iComments2);
-
- /* Everywhere we generate a reference to the static_name area,
- * (which is currently only here), we immediately follow it with a
- * definition of the post_static_name area. This guarantees that
- * the post_static_name area will immediately follow the static_name
- * area.
- */
- fprintf (asmFile, ";\t.area %s\n", port->mem.static_name); /* MOF */
- fprintf (asmFile, ";\t.area %s\n", port->mem.post_static_name);
- fprintf (asmFile, ";\t.area %s\n", port->mem.static_name);
-
- if (mainf && IFFUNC_HASBODY(mainf->type)) {
- fprintf (asmFile,"__sdcc_gsinit_startup:\n");
- /* if external stack is specified then the
- higher order byte of the xdatalocation is
- going into P2 and the lower order going into
- spx */
- if (options.useXstack) {
- fprintf(asmFile,";\tmov\tP2,#0x%02x\n",
- (((unsigned int)options.xdata_loc) >> 8) & 0xff);
- fprintf(asmFile,";\tmov\t_spx,#0x%02x\n",
- (unsigned int)options.xdata_loc & 0xff);
- }
+ copypCode(asmFile, statsg->dbName);
- }
+#endif
- if (port->general.glue_up_main && mainf && IFFUNC_HASBODY(mainf->type))
- {
- /* This code is generated in the post-static area.
- * This area is guaranteed to follow the static area
- * by the ugly shucking and jiving about 20 lines ago.
- */
- fprintf(asmFile, ";\t.area %s\n", port->mem.post_static_name);
- fprintf (asmFile,";\tljmp\t__sdcc_program_startup\n");
- }
-
/* copy over code */
fprintf (asmFile, "%s", iComments2);
fprintf (asmFile, "; code\n");
fprintf (asmFile, "%s", iComments2);
- fprintf (asmFile, ";\t.area %s\n", port->mem.code_name);
-
- //copyFile (stderr, code->oFile);
+ fprintf (asmFile, "code_%s\t%s\n", moduleName, port->mem.code_name);
- copypCode(asmFile, 'I');
- copypCode(asmFile, statsg->dbName);
+ /* unknown */
copypCode(asmFile, 'X');
+
+ /* _main function */
copypCode(asmFile, 'M');
+
+ /* other functions */
copypCode(asmFile, code->dbName);
- copypCode(asmFile, 'P');
+ /* unknown */
+ copypCode(asmFile, 'P');
fprintf (asmFile,"\tend\n");
// Eventually this will go into device dependent files:
-pCodeOpReg pc_status = {{PO_STATUS, "_STATUS"}, -1, NULL,0,NULL};
+pCodeOpReg pc_status = {{PO_STATUS, "STATUS"}, -1, NULL,0,NULL};
pCodeOpReg pc_indf = {{PO_INDF, "INDF"}, -1, NULL,0,NULL};
pCodeOpReg pc_fsr = {{PO_FSR, "FSR"}, -1, NULL,0,NULL};
pCodeOpReg pc_intcon = {{PO_INTCON, ""}, -1, NULL,0,NULL};
pCodeOpReg pc_pcl = {{PO_PCL, "PCL"}, -1, NULL,0,NULL};
-pCodeOpReg pc_pclath = {{PO_PCLATH, "_PCLATH"}, -1, NULL,0,NULL};
+pCodeOpReg pc_pclath = {{PO_PCLATH, "PCLATH"}, -1, NULL,0,NULL};
pCodeOpReg pc_kzero = {{PO_GPR_REGISTER, "KZ"}, -1, NULL,0,NULL};
pCodeOpReg pc_wsave = {{PO_GPR_REGISTER, "WSAVE"}, -1, NULL,0,NULL};
/* Hardcoded flags to change the behavior of the PIC port */
static int peepOptimizing = 1; /* run the peephole optimizer if nonzero */
static int functionInlining = 1; /* inline functions if nonzero */
-int debug_verbose = 1; /* Set true to inundate .asm file */
+int debug_verbose = 0; /* Set true to inundate .asm file */
// static int GpCodeSequenceNumber = 1;
int GpcFlowSeq = 1;
initStack(0xfff, 8);
init_pic(port->processor);
- pc_status.r = allocProcessorRegister(IDX_STATUS,"_STATUS", PO_STATUS, 0x80);
+ pc_status.r = allocProcessorRegister(IDX_STATUS,"STATUS", PO_STATUS, 0x80);
pc_pcl.r = allocProcessorRegister(IDX_PCL,"PCL", PO_PCL, 0x80);
- pc_pclath.r = allocProcessorRegister(IDX_PCLATH,"_PCLATH", PO_PCLATH, 0x80);
+ pc_pclath.r = allocProcessorRegister(IDX_PCLATH,"PCLATH", PO_PCLATH, 0x80);
pc_fsr.r = allocProcessorRegister(IDX_FSR,"FSR", PO_FSR, 0x80);
pc_indf.r = allocProcessorRegister(IDX_INDF,"INDF", PO_INDF, 0x80);
pc_intcon.r = allocProcessorRegister(IDX_INTCON,"INTCON", PO_INTCON, 0x80);
if(getpBlock_dbName(pb) == dbName) {
pBlockStats(of,pb);
printpBlock(of,pb);
+ fprintf (of, "\n");
}
}
if(PCOI(pcop)->_const) {
if( PCOI(pcop)->offset && PCOI(pcop)->offset<4) {
- SAFE_snprintf(&s,&size,"(((%s+%d) >> %d)&0xff)",
- pcop->name,
- PCOI(pcop)->index,
- 8 * PCOI(pcop)->offset );
+ switch(PCOI(pcop)->offset) {
+ case 0:
+ SAFE_snprintf(&s,&size,"low %s",pcop->name);
+ break;
+ case 1:
+ SAFE_snprintf(&s,&size,"high %s",pcop->name);
+ break;
+ default:
+ SAFE_snprintf(&s,&size,"(((%s+%d) >> %d)&0xff)",
+ pcop->name,
+ PCOI(pcop)->index,
+ 8 * PCOI(pcop)->offset );
+ }
} else
SAFE_snprintf(&s,&size,"LOW(%s+%d)",pcop->name,PCOI(pcop)->index);
} else {
pcop->name,
PCOI(pcop)->index );
} else {
- if(PCOI(pcop)->offset)
- SAFE_snprintf(&s,&size,"(%s >> %d)&0xff",pcop->name, 8*PCOI(pcop)->offset);
- else
+ switch(PCOI(pcop)->offset) {
+ case 0:
SAFE_snprintf(&s,&size,"%s",pcop->name);
+ break;
+ case 1:
+ SAFE_snprintf(&s,&size,"high %s",pcop->name);
+ break;
+ default:
+ SAFE_snprintf(&s,&size,"(%s >> %d)&0xff",pcop->name, 8*PCOI(pcop)->offset);
+ }
}
}
*buffer = 's';
dReg->name = Safe_strdup(buffer);
}
- //fprintf(stderr,"newReg: %s, rIdx = 0x%02x\n",dReg->name,rIdx);
+ fprintf(stderr,"newReg: %s, rIdx = 0x%02x\n",dReg->name,rIdx);
dReg->isFree = 0;
dReg->wasUsed = 1;
if(type == REG_SFR)
extern void assignFixedRegisters(set *regset);
extern void assignRelocatableRegisters(set *regset,int used);
extern void dump_map(void);
-extern void dump_cblock(FILE *of);
-
+extern void dump_sfr(FILE *of);
void packBits(set *bregs)
{
breg = regset->item;
breg->isBitField = 1;
- //fprintf(stderr,"bit reg: %s\n",breg->name);
+ fprintf(stderr,"bit reg: %s\n",breg->name);
if(breg->isFixed) {
- //fprintf(stderr,"packing bit at fixed address = 0x%03x\n",breg->address);
+ fprintf(stderr,"packing bit at fixed address = 0x%03x\n",breg->address);
bitfield = typeRegWithIdx (breg->address >> 3, -1 , 1);
breg->rIdx = breg->address & 7;
if(!bitfield) {
sprintf (buffer, "fbitfield%02x", breg->address);
- //fprintf(stderr,"new bit field\n");
+ fprintf(stderr,"new bit field\n");
bitfield = newReg(REG_SFR, PO_GPR_BIT,breg->address,buffer,1,0);
bitfield->isBitField = 1;
bitfield->isFixed = 1;
bitfield->address = breg->address;
- addSet(&dynDirectRegs,bitfield);
+ //addSet(&dynDirectRegs,bitfield);
+ addSet(&dynInternalRegs,bitfield);
//hTabAddItem(&dynDirectRegNames, regname2key(buffer), bitfield);
} else {
//fprintf(stderr," which is occupied by %s (addr = %d)\n",bitfield->name,bitfield->address);
byte_no++;
bit_no=0;
sprintf (buffer, "bitfield%d", byte_no);
- //fprintf(stderr,"new relocatable bit field\n");
+ fprintf(stderr,"new relocatable bit field\n");
relocbitfield = newReg(REG_GPR, PO_GPR_BIT,rDirectIdx++,buffer,1,0);
relocbitfield->isBitField = 1;
- addSet(&dynDirectRegs,relocbitfield);
+ //addSet(&dynDirectRegs,relocbitfield);
+ addSet(&dynInternalRegs,relocbitfield);
//hTabAddItem(&dynDirectRegNames, regname2key(buffer), relocbitfield);
}
for (reg = setFirstItem(fregs) ; reg ;
reg = setNextItem(fregs)) {
- if(!reg->isEmitted && reg->wasUsed) {
+ //if(!reg->isEmitted && reg->wasUsed) {
+ if(reg->wasUsed) {
if(use_rIdx)
fprintf (of, "%s\tEQU\t0x%03x\n",
reg->name,
{
packBits(dynDirectBitRegs);
-
assignFixedRegisters(dynAllocRegs);
+ printf("assignFixedRegisters(dynAllocRegs);\n");
assignFixedRegisters(dynStackRegs);
+ printf("assignFixedRegisters(dynStackRegs);\n");
assignFixedRegisters(dynDirectRegs);
+ printf("assignFixedRegisters(dynDirectRegs);\n");
assignRelocatableRegisters(dynInternalRegs,0);
+ printf("assignRelocatableRegisters(dynInternalRegs,0);\n");
assignRelocatableRegisters(dynAllocRegs,0);
+ printf("assignRelocatableRegisters(dynAllocRegs,0);\n");
assignRelocatableRegisters(dynStackRegs,0);
+ printf("assignRelocatableRegisters(dynStackRegs,0);\n");
+/*
assignRelocatableRegisters(dynDirectRegs,0);
-
+ printf("assignRelocatableRegisters(dynDirectRegs,0);\n");
+*/
//dump_map();
- dump_cblock(of);
+ dump_sfr(of);
bitEQUs(of,dynDirectBitRegs);
+/*
aliasEQUs(of,dynAllocRegs,0);
aliasEQUs(of,dynDirectRegs,0);
aliasEQUs(of,dynStackRegs,0);
aliasEQUs(of,dynProcessorRegs,1);
-
+*/
}
#if 0
projects / fw / sdcc / commitdiff